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Searched refs:asic_reset (Results 1 – 7 of 7) sorted by relevance

/drivers/gpu/drm/radeon/
A Dradeon_asic.c203 .asic_reset = &r100_asic_reset,
271 .asic_reset = &r100_asic_reset,
367 .asic_reset = &r300_asic_reset,
435 .asic_reset = &r300_asic_reset,
503 .asic_reset = &r300_asic_reset,
571 .asic_reset = &r300_asic_reset,
937 .asic_reset = &r600_asic_reset,
1022 .asic_reset = &r600_asic_reset,
1921 .asic_reset = &si_asic_reset,
2091 .asic_reset = &cik_asic_reset,
[all …]
A Dradeon_device.c1629 rdev->asic->asic_reset(rdev, true); in radeon_suspend_kms()
A Dradeon.h1837 int (*asic_reset)(struct radeon_device *rdev, bool hard); member
2697 #define radeon_asic_reset(rdev) (rdev)->asic->asic_reset((rdev), false)
/drivers/gpu/drm/amd/amdgpu/
A Dsoc15.c628 goto asic_reset; in soc15_asic_reset()
634 asic_reset: in soc15_asic_reset()
/drivers/gpu/drm/amd/pm/powerplay/
A Damd_powerplay.c1448 if (hwmgr->hwmgr_func->asic_reset == NULL) { in pp_asic_reset_mode_2()
1453 return hwmgr->hwmgr_func->asic_reset(hwmgr, SMU_ASIC_RESET_MODE_2); in pp_asic_reset_mode_2()
/drivers/gpu/drm/amd/pm/powerplay/inc/
A Dhwmgr.h359 int (*asic_reset)(struct pp_hwmgr *hwmgr, enum SMU_ASIC_RESET_MODE mode); member
/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
A Dsmu10_hwmgr.c1682 .asic_reset = smu10_asic_reset,

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