| /drivers/accel/habanalabs/common/ |
| A D | habanalabs_drv.c | 127 asic_type = ASIC_GOYA; in get_asic_type() 130 asic_type = ASIC_GAUDI; in get_asic_type() 133 asic_type = ASIC_GAUDI_SEC; in get_asic_type() 138 asic_type = ASIC_GAUDI2; in get_asic_type() 141 asic_type = ASIC_GAUDI2B; in get_asic_type() 144 asic_type = ASIC_GAUDI2C; in get_asic_type() 147 asic_type = ASIC_GAUDI2D; in get_asic_type() 157 return asic_type; in get_asic_type() 162 switch (asic_type) { in is_asic_secured() 357 switch (hdev->asic_type) { in fixup_device_params_per_asic() [all …]
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| /drivers/gpu/drm/amd/amdgpu/ |
| A D | nbio_v7_4.c | 113 if (adev->asic_type == CHIP_ALDEBARAN) in nbio_v7_4_get_rev_id() 186 if (adev->asic_type == CHIP_ALDEBARAN) in nbio_v7_4_vcn_doorbell_range() 369 if (adev->asic_type == CHIP_ALDEBARAN) in nbio_v7_4_handle_ras_controller_intr_no_bifring() 380 if (adev->asic_type == CHIP_ALDEBARAN) in nbio_v7_4_handle_ras_controller_intr_no_bifring() 426 if (adev->asic_type == CHIP_ALDEBARAN) in nbio_v7_4_handle_ras_err_event_athub_intr_no_bifring() 438 if (adev->asic_type == CHIP_ALDEBARAN) in nbio_v7_4_handle_ras_err_event_athub_intr_no_bifring() 459 if (adev->asic_type == CHIP_ALDEBARAN) in nbio_v7_4_set_ras_controller_irq_state() 504 if (adev->asic_type == CHIP_ALDEBARAN) in nbio_v7_4_set_ras_err_event_athub_irq_state() 593 if (adev->asic_type == CHIP_ALDEBARAN) in nbio_v7_4_query_ras_error_count() 603 if (adev->asic_type == CHIP_ALDEBARAN) in nbio_v7_4_query_ras_error_count() [all …]
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| A D | umc_v6_1.c | 100 if (adev->asic_type == CHIP_ARCTURUS) { in umc_v6_1_clear_error_count_per_channel() 178 if (adev->asic_type == CHIP_ARCTURUS) { in umc_v6_1_query_correctable_error_count() 233 if (adev->asic_type == CHIP_ARCTURUS) { in umc_v6_1_querry_uncorrectable_error_count() 268 if ((adev->asic_type == CHIP_ARCTURUS) && in umc_v6_1_query_ras_error_count() 285 if ((adev->asic_type == CHIP_ARCTURUS) && in umc_v6_1_query_ras_error_count() 305 if (adev->asic_type == CHIP_ARCTURUS) { in umc_v6_1_query_error_address() 367 if ((adev->asic_type == CHIP_ARCTURUS) && in umc_v6_1_query_ras_error_address() 383 if ((adev->asic_type == CHIP_ARCTURUS) && in umc_v6_1_query_ras_error_address() 397 if (adev->asic_type == CHIP_ARCTURUS) { in umc_v6_1_err_cnt_init_per_channel()
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| A D | gfxhub_v1_1.c | 52 if (adev->asic_type == CHIP_ALDEBARAN) { in gfxhub_v1_1_get_xgmi_info() 70 switch (adev->asic_type) { in gfxhub_v1_1_get_xgmi_info() 94 if (adev->asic_type == CHIP_ALDEBARAN) { in gfxhub_v1_1_get_xgmi_info()
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| A D | vce_v3_0.c | 305 if (adev->asic_type >= CHIP_STONEY) in vce_v3_0_start() 342 if (adev->asic_type >= CHIP_STONEY) in vce_v3_0_stop() 368 if ((adev->asic_type == CHIP_FIJI) || in vce_v3_0_get_harvest_config() 369 (adev->asic_type == CHIP_STONEY)) in vce_v3_0_get_harvest_config() 389 if ((adev->asic_type == CHIP_POLARIS10) || in vce_v3_0_get_harvest_config() 390 (adev->asic_type == CHIP_POLARIS11) || in vce_v3_0_get_harvest_config() 391 (adev->asic_type == CHIP_POLARIS12) || in vce_v3_0_get_harvest_config() 392 (adev->asic_type == CHIP_VEGAM)) in vce_v3_0_get_harvest_config() 565 if (adev->asic_type >= CHIP_STONEY) { in vce_v3_0_mc_resume() 971 if (adev->asic_type >= CHIP_STONEY) { in vce_v3_0_set_ring_funcs()
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| A D | amdgpu_acp.c | 307 adev->acp.acp_cell[0].platform_data = &adev->asic_type; in acp_hw_init() 308 adev->acp.acp_cell[0].pdata_size = sizeof(adev->asic_type); in acp_hw_init() 345 switch (adev->asic_type) { in acp_hw_init() 357 switch (adev->asic_type) { in acp_hw_init() 374 switch (adev->asic_type) { in acp_hw_init() 415 adev->acp.acp_cell[0].platform_data = &adev->asic_type; in acp_hw_init() 416 adev->acp.acp_cell[0].pdata_size = sizeof(adev->asic_type); in acp_hw_init()
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| A D | vi.c | 105 #define ASIC_IS_P22(asic_type, rid) ((asic_type >= CHIP_POLARIS10) && \ argument 260 switch (adev->asic_type) { in vi_query_video_codecs() 496 switch (adev->asic_type) { in vi_init_golden_registers() 546 switch (adev->asic_type) { in vi_get_xclk() 902 switch (adev->asic_type) { in vi_asic_supports_baco() 928 switch (adev->asic_type) { in vi_asic_reset_method() 1130 if (adev->asic_type < CHIP_POLARIS10) in vi_program_aspm() 1334 switch (adev->asic_type) { in vi_need_full_reset() 1482 switch (adev->asic_type) { in vi_common_early_init() 1956 switch (adev->asic_type) { in vi_common_set_clockgating_state() [all …]
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| A D | df_v3_6.c | 223 if ((adev->asic_type == CHIP_ARCTURUS && in df_v3_6_query_hashes() 225 (adev->asic_type == CHIP_ALDEBARAN && in df_v3_6_query_hashes() 280 if (adev->asic_type == CHIP_ALDEBARAN) { in df_v3_6_get_fb_channel_number() 520 switch (adev->asic_type) { in df_v3_6_pmc_start() 562 switch (adev->asic_type) { in df_v3_6_pmc_stop() 601 switch (adev->asic_type) { in df_v3_6_pmc_get_count()
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| A D | amdgpu_doorbell_mgr.c | 197 if (adev->asic_type < CHIP_BONAIRE) { in amdgpu_doorbell_init() 226 if (adev->asic_type >= CHIP_VEGA10) in amdgpu_doorbell_init()
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| A D | amdgpu_uvd.c | 194 switch (adev->asic_type) { in amdgpu_uvd_sw_init() 277 if (adev->asic_type < CHIP_VEGA20) { in amdgpu_uvd_sw_init() 298 if ((adev->asic_type == CHIP_POLARIS10 || in amdgpu_uvd_sw_init() 299 adev->asic_type == CHIP_POLARIS11) && in amdgpu_uvd_sw_init() 350 switch (adev->asic_type) { in amdgpu_uvd_sw_init() 364 adev->uvd.use_ctx_buf = adev->asic_type >= CHIP_POLARIS10; in amdgpu_uvd_sw_init() 431 if (adev->asic_type < CHIP_POLARIS10) { in amdgpu_uvd_prepare_suspend() 1143 if (adev->asic_type >= CHIP_VEGA10) in amdgpu_uvd_send_msg()
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| A D | gfx_v8_0.c | 740 switch (adev->asic_type) { in gfx_v8_0_init_golden_registers() 951 switch (adev->asic_type) { in gfx_v8_0_init_microcode() 983 if (adev->asic_type >= CHIP_POLARIS10 && adev->asic_type <= CHIP_POLARIS12) { in gfx_v8_0_init_microcode() 1003 if (adev->asic_type >= CHIP_POLARIS10 && adev->asic_type <= CHIP_POLARIS12) { in gfx_v8_0_init_microcode() 1024 if (adev->asic_type >= CHIP_POLARIS10 && adev->asic_type <= CHIP_POLARIS12) { in gfx_v8_0_init_microcode() 1104 if (adev->asic_type >= CHIP_POLARIS10 && adev->asic_type <= CHIP_POLARIS12) { in gfx_v8_0_init_microcode() 1126 if (adev->asic_type >= CHIP_POLARIS10 && adev->asic_type <= CHIP_POLARIS12) { in gfx_v8_0_init_microcode() 1647 switch (adev->asic_type) { in gfx_v8_0_gpu_early_init() 1894 switch (adev->asic_type) { in gfx_v8_0_sw_init() 2076 switch (adev->asic_type) { in gfx_v8_0_tiling_mode_table_init() [all …]
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| A D | gmc_v8_0.c | 123 switch (adev->asic_type) { in gmc_v8_0_init_golden_registers() 224 switch (adev->asic_type) { in gmc_v8_0_init_microcode() 589 switch (adev->asic_type) { in gmc_v8_0_mc_init() 1102 if ((adev->asic_type == CHIP_FIJI) || in gmc_v8_0_sw_init() 1103 (adev->asic_type == CHIP_VEGAM)) in gmc_v8_0_sw_init() 1210 if (adev->asic_type == CHIP_TONGA) { in gmc_v8_0_hw_init() 1216 } else if (adev->asic_type == CHIP_POLARIS11 || in gmc_v8_0_hw_init() 1217 adev->asic_type == CHIP_POLARIS10 || in gmc_v8_0_hw_init() 1218 adev->asic_type == CHIP_POLARIS12) { in gmc_v8_0_hw_init() 1668 switch (adev->asic_type) { in gmc_v8_0_set_clockgating_state()
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| A D | mmhub_v1_0.c | 505 if (adev->asic_type != CHIP_RAVEN) { in mmhub_v1_0_update_medium_grain_clock_gating() 521 if (adev->asic_type != CHIP_RAVEN) in mmhub_v1_0_update_medium_grain_clock_gating() 538 if (adev->asic_type != CHIP_RAVEN) in mmhub_v1_0_update_medium_grain_clock_gating() 551 if (adev->asic_type != CHIP_RAVEN) in mmhub_v1_0_update_medium_grain_clock_gating() 557 if (adev->asic_type != CHIP_RAVEN && def2 != data2) in mmhub_v1_0_update_medium_grain_clock_gating() 583 switch (adev->asic_type) { in mmhub_v1_0_set_clockgating()
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| A D | isp_v4_1_0.c | 81 isp->isp_pdata->asic_type = adev->asic_type; in isp_v4_1_0_hw_init()
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| A D | amdgpu_vm_pt.c | 405 if (adev->asic_type >= CHIP_VEGA10) { in amdgpu_vm_pt_clear() 689 } else if (adev->asic_type >= CHIP_VEGA10 && in amdgpu_vm_pte_update_flags() 759 if (params->adev->asic_type < CHIP_VEGA10) in amdgpu_vm_pte_fragment() 832 } else if (adev->asic_type < CHIP_VEGA10 && in amdgpu_vm_ptes_update()
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| A D | si.c | 1006 switch (adev->asic_type) { in si_query_video_codecs() 2059 switch (adev->asic_type) { in si_common_early_init() 2168 switch (adev->asic_type) { in si_init_golden_registers() 2491 if ((adev->asic_type != CHIP_OLAND) && (adev->asic_type != CHIP_HAINAN)) { in si_program_aspm() 2540 if ((adev->asic_type == CHIP_OLAND) || (adev->asic_type == CHIP_HAINAN)) in si_program_aspm() 2547 if ((adev->asic_type == CHIP_OLAND) || (adev->asic_type == CHIP_HAINAN)) in si_program_aspm() 2701 switch (adev->asic_type) { in si_set_ip_blocks()
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| A D | cik.c | 133 switch (adev->asic_type) { in cik_query_video_codecs() 832 switch (adev->asic_type) { in cik_init_golden_registers() 1380 switch (adev->asic_type) { in cik_asic_supports_baco() 1402 switch (adev->asic_type) { in cik_asic_reset_method() 2005 switch (adev->asic_type) { in cik_common_early_init() 2109 if (adev->asic_type == CHIP_KABINI) { in cik_common_early_init() 2199 switch (adev->asic_type) { in cik_set_ip_blocks()
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| A D | nbio_v2_3.c | 499 if (!((adev->asic_type >= CHIP_NAVI10) && in nbio_v2_3_apply_lc_spc_mode_wa() 500 (adev->asic_type <= CHIP_NAVI12))) in nbio_v2_3_apply_lc_spc_mode_wa() 523 if (adev->asic_type != CHIP_NAVI10) in nbio_v2_3_apply_l1_link_width_reconfig_wa()
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| A D | amdgpu_device.c | 500 switch (adev->asic_type) { in amdgpu_device_detect_runtime_pm_mode() 1731 if (adev->asic_type >= CHIP_BONAIRE) in amdgpu_device_resize_fb_bar() 1788 if (adev->asic_type == CHIP_FIJI) { in amdgpu_device_need_post() 1814 if (adev->asic_type >= CHIP_BONAIRE) in amdgpu_device_need_post() 2051 adev->asic_type < CHIP_RAVEN) in amdgpu_device_init_apu_flags() 2054 switch (adev->asic_type) { in amdgpu_device_init_apu_flags() 2573 switch (adev->asic_type) { in amdgpu_device_parse_gpu_info_fw() 2703 switch (adev->asic_type) { in amdgpu_device_ip_early_init() 4104 switch (asic_type) { in amdgpu_device_asic_has_dc_support() 5611 switch (adev->asic_type) { in amdgpu_device_should_recover_gpu() [all …]
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| A D | dce_v11_0.c | 165 switch (adev->asic_type) { in dce_v11_0_init_golden_registers() 491 switch (adev->asic_type) { in dce_v11_0_get_num_crtc() 1478 switch (adev->asic_type) { in dce_v11_0_audio_init() 2292 if ((adev->asic_type == CHIP_POLARIS10) || in dce_v11_0_pick_pll() 2293 (adev->asic_type == CHIP_POLARIS11) || in dce_v11_0_pick_pll() 2294 (adev->asic_type == CHIP_POLARIS12) || in dce_v11_0_pick_pll() 2295 (adev->asic_type == CHIP_VEGAM)) { in dce_v11_0_pick_pll() 2714 if ((adev->asic_type == CHIP_POLARIS10) || in dce_v11_0_crtc_mode_set() 2717 (adev->asic_type == CHIP_VEGAM)) { in dce_v11_0_crtc_mode_set() 2892 switch (adev->asic_type) { in dce_v11_0_early_init() [all …]
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| /drivers/gpu/drm/amd/amdkfd/ |
| A D | kfd_flat_memory.c | 396 switch (dev->adev->asic_type) { in kfd_init_apertures() 413 dev->adev->asic_type); in kfd_init_apertures()
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| A D | kfd_device.c | 204 uint32_t asic_type = kfd->adev->asic_type; in kfd_device_info_init() local 255 if (asic_type != CHIP_KAVERI && in kfd_device_info_init() 256 asic_type != CHIP_HAWAII && in kfd_device_info_init() 257 asic_type != CHIP_TONGA) in kfd_device_info_init() 260 if (asic_type != CHIP_HAWAII && !vf) in kfd_device_info_init() 271 switch (adev->asic_type) { in kgd2kfd_probe() 481 amdgpu_asic_name[adev->asic_type], vf ? "VF" : ""); in kgd2kfd_probe()
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| /drivers/net/ethernet/pensando/ionic/ |
| A D | ionic_dev.c | 133 u8 asic_type = ionic->idev.dev_info.asic_type; in ionic_doorbell_wa() local 135 return !asic_type || asic_type == IONIC_ASIC_TYPE_ELBA; in ionic_doorbell_wa() 185 idev->dev_info.asic_type = ioread8(&idev->dev_info_regs->asic_type); in ionic_init_devinfo()
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| /drivers/gpu/drm/amd/pm/legacy-dpm/ |
| A D | kv_dpm.c | 764 if (adev->asic_type == CHIP_KABINI || adev->asic_type == CHIP_MULLINS) in kv_unforce_levels() 1387 if (adev->asic_type == CHIP_MULLINS) in kv_dpm_disable() 1747 if (adev->asic_type == CHIP_KABINI || adev->asic_type == CHIP_MULLINS) in kv_dpm_powergate_acp() 1928 if (adev->asic_type == CHIP_KABINI || adev->asic_type == CHIP_MULLINS) { in kv_dpm_set_power_state() 1954 if (adev->asic_type == CHIP_MULLINS) in kv_dpm_set_power_state() 2008 if (adev->asic_type == CHIP_KABINI || adev->asic_type == CHIP_MULLINS) { 2113 if (adev->asic_type == CHIP_KABINI || adev->asic_type == CHIP_MULLINS) in kv_force_dpm_highest() 2133 if (adev->asic_type == CHIP_KABINI || adev->asic_type == CHIP_MULLINS) in kv_force_dpm_lowest() 2289 if (adev->asic_type == CHIP_KABINI || adev->asic_type == CHIP_MULLINS) { in kv_apply_state_adjust_rules() 2350 if (adev->asic_type == CHIP_KABINI || adev->asic_type == CHIP_MULLINS) { in kv_calculate_nbps_level_settings() [all …]
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| /drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
| A D | smu7_baco.c | 71 switch (adev->asic_type) { in smu7_baco_set_state()
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