Home
last modified time | relevance | path

Searched refs:atc (Results 1 – 12 of 12) sorted by relevance

/drivers/base/
A Dtransport_class.c91 int anon_transport_class_register(struct anon_transport_class *atc) in anon_transport_class_register() argument
94 atc->container.class = &atc->tclass.class; in anon_transport_class_register()
95 attribute_container_set_no_classdevs(&atc->container); in anon_transport_class_register()
96 error = attribute_container_register(&atc->container); in anon_transport_class_register()
99 atc->tclass.setup = anon_transport_dummy_function; in anon_transport_class_register()
100 atc->tclass.remove = anon_transport_dummy_function; in anon_transport_class_register()
113 void anon_transport_class_unregister(struct anon_transport_class *atc) in anon_transport_class_unregister() argument
115 if (unlikely(attribute_container_unregister(&atc->container))) in anon_transport_class_unregister()
/drivers/video/fbdev/
A Dvga16fb.c539 u8 atc[VGA_ATT_C]; in vga16fb_set_par() local
574 atc[i] = i; in vga16fb_set_par()
576 atc[VGA_ATC_MODE] = 0x04; in vga16fb_set_par()
578 atc[VGA_ATC_MODE] = 0x41; in vga16fb_set_par()
580 atc[VGA_ATC_MODE] = 0x81; in vga16fb_set_par()
581 atc[VGA_ATC_OVERSCAN] = 0x00; /* 0 for EGA, 0xFF for VGA */ in vga16fb_set_par()
582 atc[VGA_ATC_PLANE_ENABLE] = 0x0F; in vga16fb_set_par()
584 atc[VGA_ATC_PEL] = (info->var.xoffset & 3) << 1; in vga16fb_set_par()
586 atc[VGA_ATC_PEL] = info->var.xoffset & 7; in vga16fb_set_par()
587 atc[VGA_ATC_COLOR_PAGE] = 0x00; in vga16fb_set_par()
[all …]
A Di740fb.c49 u8 atc[VGA_ATT_C]; member
555 par->atc[i] = i; in i740fb_decode_var()
556 par->atc[VGA_ATC_MODE] = 0x81; in i740fb_decode_var()
557 par->atc[VGA_ATC_OVERSCAN] = 0x00; /* 0 for EGA, 0xFF for VGA */ in i740fb_decode_var()
558 par->atc[VGA_ATC_PLANE_ENABLE] = 0x0F; in i740fb_decode_var()
559 par->atc[VGA_ATC_COLOR_PAGE] = 0x00; in i740fb_decode_var()
643 par->atc[VGA_ATC_OVERSCAN] = 0; in i740fb_decode_var()
800 i740outb(par, VGA_ATT_IW, par->atc[i]); in i740fb_set_par()
/drivers/gpu/drm/radeon/
A Dcik_reg.h232 uint32_t atc:1; member
/drivers/gpu/drm/amd/amdkfd/
A Dkfd_pm4_headers_vi.h463 unsigned int atc:1; member
A Dkfd_packet_manager_vi.c287 packet->bitfields2.atc = 0; in pm_release_mem_vi()
/drivers/iommu/arm/arm-smmu-v3/
A Darm-smmu-v3.c328 cmd[0] |= FIELD_PREP(CMDQ_ATC_0_GLOBAL, ent->atc.global); in arm_smmu_cmdq_build_cmd()
329 cmd[0] |= FIELD_PREP(CMDQ_ATC_0_SSID, ent->atc.ssid); in arm_smmu_cmdq_build_cmd()
330 cmd[0] |= FIELD_PREP(CMDQ_ATC_0_SID, ent->atc.sid); in arm_smmu_cmdq_build_cmd()
331 cmd[1] |= FIELD_PREP(CMDQ_ATC_1_SIZE, ent->atc.size); in arm_smmu_cmdq_build_cmd()
332 cmd[1] |= ent->atc.addr & CMDQ_ATC_1_ADDR_MASK; in arm_smmu_cmdq_build_cmd()
2125 .atc.ssid = ssid, in arm_smmu_atc_inv_to_cmd()
2129 cmd->atc.size = ATC_INV_SIZE_ALL; in arm_smmu_atc_inv_to_cmd()
2161 cmd->atc.addr = page_start << inval_grain_shift; in arm_smmu_atc_inv_to_cmd()
2162 cmd->atc.size = log2_span; in arm_smmu_atc_inv_to_cmd()
2176 cmd.atc.sid = master->streams[i].id; in arm_smmu_atc_inv_master()
[all …]
A Darm-smmu-v3.h571 } atc; member
/drivers/net/dsa/b53/
A Db53_common.c2554 u32 atc; in b53_set_ageing_time() local
2562 atc = DIV_ROUND_CLOSEST(msecs, 1000); in b53_set_ageing_time()
2565 atc |= AGE_CHANGE; in b53_set_ageing_time()
2567 b53_write32(dev, B53_MGMT_PAGE, reg, atc); in b53_set_ageing_time()
/drivers/net/ethernet/freescale/enetc/
A Denetc_hw.h798 u8 atc; /* init gate value */ member
A Denetc_qos.c89 gcl_config->atc = 0xff; in enetc_setup_taprio()
/drivers/pinctrl/tegra/
A Dpinctrl-tegra20.c2048 MUX_PG(atc, IDE, NAND, GMI, SDIO4, 0x14, 2, 0x80, 22, 0xa0, 4),

Completed in 62 milliseconds