Searched refs:bank_width (Results 1 – 8 of 8) sorted by relevance
| /drivers/gpio/ |
| A D | gpio-brcmstb.c | 593 u32 bank_width; in brcmstb_gpio_probe() local
636 of_property_for_each_u32(np, "brcm,gpio-bank-widths", bank_width) { in brcmstb_gpio_probe()
644 if (bank_width == 0) { in brcmstb_gpio_probe()
660 if (bank_width <= 0 || bank_width > MAX_GPIO_PER_BANK) { in brcmstb_gpio_probe()
661 dev_err(dev, "Invalid bank width %d\n", bank_width); in brcmstb_gpio_probe()
665 bank->width = bank_width; in brcmstb_gpio_probe()
|
| A D | gpio-omap.c | 1364 .bank_width = 32,
1370 .bank_width = 32,
1376 .bank_width = 32,
1425 bank->width = pdata->bank_width; in omap_gpio_probe()
|
| /drivers/gpu/drm/amd/display/dc/core/ |
| A D | dc_debug.c | 111 update->plane_info->tiling_info.gfx8.bank_width, in update_surface_trace()
|
| /drivers/gpu/drm/amd/display/dc/dce/ |
| A D | dce_mem_input.c | 452 GRPH_BANK_WIDTH, info->gfx8.bank_width, in program_tiling()
469 GRPH_BANK_WIDTH, info->gfx8.bank_width, in program_tiling()
|
| /drivers/edac/ |
| A D | thunderx_edac.c | 190 int bank_width; member
499 bank ^= get_bits(addr, 12 + lmc->xbits, lmc->bank_width); in thunderx_faddr_to_phys()
740 lmc->bank_width = (FIELD_GET(LMC_DDR_PLL_CTL_DDR4, lmc_ddr_pll_ctl) && in thunderx_lmc_probe()
750 lmc->col_hi_lsb = lmc->bank_lsb + lmc->bank_width; in thunderx_lmc_probe()
|
| /drivers/gpu/drm/amd/display/dc/ |
| A D | dc_hw_types.h | 369 unsigned int bank_width; member
|
| /drivers/gpu/drm/amd/display/dc/dce110/ |
| A D | dce110_mem_input_v.c | 173 set_reg_field_value(value, info->gfx8.bank_width, in program_tiling()
|
| /drivers/gpu/drm/amd/display/amdgpu_dm/ |
| A D | amdgpu_dm_plane.c | 199 tiling_info->gfx8.bank_width = bankw; in amdgpu_dm_plane_fill_gfx8_tiling_info_from_flags()
|
Completed in 30 milliseconds