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Searched refs:base0 (Results 1 – 22 of 22) sorted by relevance

/drivers/clk/renesas/
A Drenesas-cpg-mssr.c267 readb(priv->pub.base0 + priv->control_regs[reg]); in cpg_mstp_clock_endisable()
268 barrier_data(priv->pub.base0 + priv->control_regs[reg]); in cpg_mstp_clock_endisable()
301 priv->pub.base0 + priv->control_regs[reg], bit); in cpg_mstp_clock_endisable()
430 priv->pub.base0 + core->offset, in cpg_mssr_register_core_clk()
974 readb(priv->pub.base0 + priv->control_regs[reg]) : in cpg_mssr_suspend_noirq()
975 readl(priv->pub.base0 + priv->control_regs[reg]); in cpg_mssr_suspend_noirq()
1016 readb(priv->pub.base0 + priv->control_regs[reg]); in cpg_mssr_resume_noirq()
1142 priv->pub.base0 = of_iomap(np, 0); in cpg_mssr_common_init()
1143 if (!priv->pub.base0) { in cpg_mssr_common_init()
1197 if (priv->pub.base0) in cpg_mssr_common_init()
[all …]
A Dr7s9210-cpg-mssr.c164 void __iomem *base = pub->base0; in rza2_cpg_clk_register()
A Drenesas-cpg-mssr.h52 void __iomem *base0; member
A Dr8a77970-cpg-mssr.c225 void __iomem *base = pub->base0; in r8a77970_cpg_clk_register()
A Dr9a09g077-cpg.c229 void __iomem *base = RZT2H_REG_BLOCK(offset) ? pub->base1 : pub->base0; in r9a09g077_cpg_clk_register()
A Drcar-gen2-cpg.c280 void __iomem *base = pub->base0; in rcar_gen2_cpg_clk_register()
A Drcar-gen3-cpg.c351 void __iomem *base = pub->base0; in rcar_gen3_cpg_clk_register()
A Drcar-gen4-cpg.c424 void __iomem *base = pub->base0; in rcar_gen4_cpg_clk_register()
/drivers/mfd/
A Dmcp-sa11x0.c28 void __iomem *base0; member
35 #define MCCR0(m) ((m)->base0 + 0x00)
36 #define MCDR0(m) ((m)->base0 + 0x08)
37 #define MCDR1(m) ((m)->base0 + 0x0c)
38 #define MCDR2(m) ((m)->base0 + 0x10)
39 #define MCSR(m) ((m)->base0 + 0x18)
195 m->base0 = ioremap(mem0->start, resource_size(mem0)); in mcp_sa11x0_probe()
197 if (!m->base0 || !m->base1) { in mcp_sa11x0_probe()
225 iounmap(m->base0); in mcp_sa11x0_probe()
250 iounmap(m->base0); in mcp_sa11x0_remove()
/drivers/thermal/qcom/
A Dtsens-v2.c142 struct regmap *map, u32 mode, u32 base0, u32 base1) in tsens_v2_calibrate_sensor() argument
163 slope = (TWO_PT_SHIFTED_GAIN / (base1 - base0)); in tsens_v2_calibrate_sensor()
165 czero = (base0 + sensor->offset - ((base1 - base0) / 3)); in tsens_v2_calibrate_sensor()
169 czero = base0 + sensor->offset - ONE_PT_CZERO_CONST; in tsens_v2_calibrate_sensor()
190 u32 mode, base0, base1; in tsens_v2_calibration() local
204 ret = nvmem_cell_read_variable_le_u32(priv->dev, "base0", &base0); in tsens_v2_calibration()
215 mode, base0, base1); in tsens_v2_calibration()
/drivers/pinctrl/bcm/
A Dpinctrl-nsp-mux.c111 void __iomem *base0; member
425 base_address = pinctrl->base0; in nsp_pinmux_set()
484 val = readl(pinctrl->base0); in nsp_gpio_request_enable()
488 writel(val, pinctrl->base0); in nsp_gpio_request_enable()
505 val = readl(pinctrl->base0); in nsp_gpio_disable_free()
510 writel(val, pinctrl->base0); in nsp_gpio_disable_free()
568 pinctrl->base0 = devm_platform_ioremap_resource(pdev, 0); in nsp_pinmux_probe()
569 if (IS_ERR(pinctrl->base0)) in nsp_pinmux_probe()
570 return PTR_ERR(pinctrl->base0); in nsp_pinmux_probe()
A Dpinctrl-cygnus-mux.c103 void __iomem *base0; member
813 val = readl(pinctrl->base0 + grp->mux.offset); in cygnus_pinmux_set()
816 writel(val, pinctrl->base0 + grp->mux.offset); in cygnus_pinmux_set()
948 pinctrl->base0 = devm_platform_ioremap_resource(pdev, 0); in cygnus_pinmux_probe()
949 if (IS_ERR(pinctrl->base0)) { in cygnus_pinmux_probe()
951 return PTR_ERR(pinctrl->base0); in cygnus_pinmux_probe()
A Dpinctrl-ns2-mux.c117 void __iomem *base0; member
609 base_address = pinctrl->base0; in ns2_pinmux_set()
1039 pinctrl->base0 = devm_platform_ioremap_resource(pdev, 0); in ns2_pinmux_probe()
1040 if (IS_ERR(pinctrl->base0)) in ns2_pinmux_probe()
1041 return PTR_ERR(pinctrl->base0); in ns2_pinmux_probe()
/drivers/perf/arm_cspmu/
A Darm_cspmu.c478 writel(PMCR_C | PMCR_P, cspmu->base0 + PMCR); in arm_cspmu_reset_counters()
483 writel(PMCR_E, cspmu->base0 + PMCR); in arm_cspmu_start_counters()
488 writel(0, cspmu->base0 + PMCR); in arm_cspmu_stop_counters()
726 writel(BIT(reg_bit), cspmu->base0 + inten_off); in arm_cspmu_enable_counter()
727 writel(BIT(reg_bit), cspmu->base0 + cnten_off); in arm_cspmu_enable_counter()
764 writel(hwc->config, cspmu->base0 + offset); in arm_cspmu_set_event()
783 writel(filter, cspmu->base0 + PMCCFILTR); in arm_cspmu_set_cc_filter()
915 if (IS_ERR(cspmu->base0)) { in arm_cspmu_init_mmio()
917 return PTR_ERR(cspmu->base0); in arm_cspmu_init_mmio()
921 cspmu->base1 = cspmu->base0; in arm_cspmu_init_mmio()
[all …]
A Dampere_cspmu.c153 writel(threshold, cspmu->base0 + PMAUXR0); in ampere_cspmu_set_ev_filter()
154 writel(rank, cspmu->base0 + PMAUXR1); in ampere_cspmu_set_ev_filter()
155 writel(bank, cspmu->base0 + PMAUXR2); in ampere_cspmu_set_ev_filter()
A Dnvidia_cspmu.c193 writel(filter, cspmu->base0 + offset); in nv_cspmu_set_ev_filter()
201 writel(filter, cspmu->base0 + PMCCFILTR); in nv_cspmu_set_cc_filter()
A Darm_cspmu.h195 void __iomem *base0; member
/drivers/gpio/
A Dgpio-em.c24 void __iomem *base0; member
61 return ioread32(p->base0 + offs); in em_gio_read()
70 iowrite32(value, p->base0 + offs); in em_gio_write()
292 p->base0 = devm_platform_ioremap_resource(pdev, 0); in em_gio_probe()
293 if (IS_ERR(p->base0)) in em_gio_probe()
294 return PTR_ERR(p->base0); in em_gio_probe()
/drivers/pinctrl/
A Dpinctrl-keembay.c116 void __iomem *base0; member
1188 return keembay_read_pin(kpc->base0 + offset, pin); in keembay_gpio_get()
1196 reg_val = keembay_read_gpio_reg(kpc->base0 + KEEMBAY_GPIO_DATA_OUT, pin); in keembay_gpio_set()
1199 kpc->base0 + KEEMBAY_GPIO_DATA_HIGH, pin); in keembay_gpio_set()
1202 kpc->base0 + KEEMBAY_GPIO_DATA_LOW, pin); in keembay_gpio_set()
1271 val = keembay_read_pin(kpc->base0 + KEEMBAY_GPIO_DATA_IN, pin); in keembay_gpio_irq_handler()
1669 kpc->base0 = devm_platform_ioremap_resource(pdev, 0); in keembay_pinctrl_probe()
1670 if (IS_ERR(kpc->base0)) in keembay_pinctrl_probe()
1671 return PTR_ERR(kpc->base0); in keembay_pinctrl_probe()
/drivers/bluetooth/
A Dbtmrvl_sdio.c565 u8 base0, base1; in btmrvl_sdio_download_fw_w_helper() local
613 base0 = sdio_readb(card->func, in btmrvl_sdio_download_fw_w_helper()
619 base0, base0); in btmrvl_sdio_download_fw_w_helper()
634 len = (((u16) base1) << 8) | base0; in btmrvl_sdio_download_fw_w_helper()
/drivers/net/wireless/marvell/mwifiex/
A Dsdio.c1450 u8 base0, base1; in mwifiex_prog_fw_w_helper() local
1492 &base0); in mwifiex_prog_fw_w_helper()
1497 base0, base0); in mwifiex_prog_fw_w_helper()
1509 len = (u16) (((base1 & 0xff) << 8) | (base0 & 0xff)); in mwifiex_prog_fw_w_helper()
/drivers/edac/
A Damd64_edac.c1517 u32 *base0 = &pvt->csels[0].csbases[cs]; in dct_read_base_mask() local
1520 if (!amd64_read_dct_pci_cfg(pvt, 0, reg0, base0)) in dct_read_base_mask()
1522 cs, *base0, reg0); in dct_read_base_mask()

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