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Searched refs:base_addr (Results 1 – 25 of 381) sorted by relevance

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/drivers/w1/masters/
A Damd_axi_w1.c60 void __iomem *base_addr; member
81 iowrite32(IRQ, amd_axi_w1_local->base_addr + AXIW1_IRQE_REG); in amd_axi_w1_wait_irq_interruptible_timeout()
127 amd_axi_w1_local->base_addr + AXIW1_INST_REG); in amd_axi_w1_touch_bit()
130 iowrite32(AXIW1_GO, amd_axi_w1_local->base_addr + AXIW1_CTRL_REG); in amd_axi_w1_touch_bit()
173 iowrite32(AXIW1_GO, amd_axi_w1_local->base_addr + AXIW1_CTRL_REG); in amd_axi_w1_read_byte()
214 iowrite32(AXIW1_GO, amd_axi_w1_local->base_addr + AXIW1_CTRL_REG); in amd_axi_w1_write_byte()
308 lp->base_addr = devm_platform_ioremap_resource(pdev, 0); in amd_axi_w1_probe()
309 if (IS_ERR(lp->base_addr)) in amd_axi_w1_probe()
310 return PTR_ERR(lp->base_addr); in amd_axi_w1_probe()
328 if (ioread32(lp->base_addr + AXIW1_IPID_REG) != AXIW1_IPID) { in amd_axi_w1_probe()
[all …]
/drivers/irqchip/
A Dirq-ftintc010.c26 #define FT010_IRQ_SOURCE(base_addr) (base_addr + 0x00) argument
27 #define FT010_IRQ_MASK(base_addr) (base_addr + 0x04) argument
28 #define FT010_IRQ_CLEAR(base_addr) (base_addr + 0x08) argument
30 #define FT010_IRQ_MODE(base_addr) (base_addr + 0x0C) argument
32 #define FT010_IRQ_POLARITY(base_addr) (base_addr + 0x10) argument
33 #define FT010_IRQ_STATUS(base_addr) (base_addr + 0x14) argument
34 #define FT010_FIQ_SOURCE(base_addr) (base_addr + 0x20) argument
35 #define FT010_FIQ_MASK(base_addr) (base_addr + 0x24) argument
36 #define FT010_FIQ_CLEAR(base_addr) (base_addr + 0x28) argument
37 #define FT010_FIQ_MODE(base_addr) (base_addr + 0x2C) argument
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/drivers/char/ipmi/
A Dipmi_dmi.c70 p.addr = base_addr; in dmi_add_platform_ipmi()
83 info->addr = base_addr; in dmi_add_platform_ipmi()
101 unsigned long base_addr) in ipmi_dmi_get_slave_addr() argument
108 info->addr == base_addr) in ipmi_dmi_get_slave_addr()
130 unsigned long base_addr; in dmi_decode_ipmi() local
143 if (!base_addr) { in dmi_decode_ipmi()
150 base_addr = data[DMI_IPMI_ADDR] >> 1; in dmi_decode_ipmi()
151 if (base_addr == 0) { in dmi_decode_ipmi()
161 if (base_addr & 1) { in dmi_decode_ipmi()
163 base_addr &= DMI_IPMI_IO_MASK; in dmi_decode_ipmi()
[all …]
/drivers/parisc/
A Ddino.c177 void __iomem *base_addr = d->hba.base_addr; in dino_cfg_read() local
185 __raw_writel(v, base_addr + DINO_PCI_ADDR); in dino_cfg_read()
193 *val = readl(base_addr + DINO_CONFIG_DATA); in dino_cfg_read()
212 void __iomem *base_addr = d->hba.base_addr; in dino_cfg_write() local
221 __raw_readl(base_addr + DINO_CONFIG_DATA); in dino_cfg_write()
224 __raw_writel(v, base_addr + DINO_PCI_ADDR); in dino_cfg_write()
231 writel(val, base_addr + DINO_CONFIG_DATA); in dino_cfg_write()
322 __raw_readl(dino_dev->hba.base_addr+DINO_IPR); in dino_unmask_irq()
424 dino_dev->hba.base_addr, mask); in dino_isr()
713 dino_dev->hba.base_addr+DINO_IO_COMMAND); in dino_card_init()
[all …]
A Dlba_pci.c358 LBA_CFG_RESTORE(d, d->hba.base_addr); in lba_rd_cfg()
421 LBA_CFG_RESTORE(d, d->hba.base_addr); in lba_wr_cfg()
1358 d->hba.base_addr, in lba_hw_init()
1359 READ_REG64(d->hba.base_addr + LBA_STAT_CTL), in lba_hw_init()
1364 READ_REG64(d->hba.base_addr + LBA_ARB_MASK), in lba_hw_init()
1365 READ_REG64(d->hba.base_addr + LBA_ARB_PRI), in lba_hw_init()
1366 READ_REG64(d->hba.base_addr + LBA_ARB_MODE), in lba_hw_init()
1555 lba_dev->hba.base_addr = addr; in lba_driver_probe()
1707 WRITE_REG32( imask, base_addr + LBA_IMASK); in lba_set_iregs()
1708 WRITE_REG32( ibase, base_addr + LBA_IBASE); in lba_set_iregs()
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/drivers/staging/axis-fifo/
A Daxis-fifo.c165 fifo->base_addr + XLLF_IER_OFFSET); in reset_ip_core()
408 ioread32(fifo->base_addr in axis_fifo_irq()
418 fifo->base_addr + XLLF_ISR_OFFSET); in axis_fifo_irq()
426 fifo->base_addr + XLLF_ISR_OFFSET); in axis_fifo_irq()
431 fifo->base_addr + XLLF_ISR_OFFSET); in axis_fifo_irq()
436 fifo->base_addr + XLLF_ISR_OFFSET); in axis_fifo_irq()
441 fifo->base_addr + XLLF_ISR_OFFSET); in axis_fifo_irq()
446 fifo->base_addr + XLLF_ISR_OFFSET); in axis_fifo_irq()
451 fifo->base_addr + XLLF_ISR_OFFSET); in axis_fifo_irq()
696 if (IS_ERR(fifo->base_addr)) { in axis_fifo_probe()
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/drivers/net/ethernet/ti/
A Dtlan.c504 dev->base_addr = pci_io_base; in tlan_probe1()
521 dev->base_addr = ioaddr; in tlan_probe1()
579 (int)dev->base_addr, in tlan_probe1()
1221 tlan_print_dio(dev->base_addr); in tlan_get_stats()
2507 tlan_mii_sync(dev->base_addr); in tlan_phy_power_down()
2513 tlan_mii_sync(dev->base_addr); in tlan_phy_power_down()
2534 tlan_mii_sync(dev->base_addr); in tlan_phy_power_up()
2537 tlan_mii_sync(dev->base_addr); in tlan_phy_power_up()
2559 tlan_mii_sync(dev->base_addr); in tlan_phy_reset()
2848 tlan_mii_sync(dev->base_addr); in __tlan_mii_read_reg()
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A Dtlan.h444 static inline u8 tlan_dio_read8(u16 base_addr, u16 internal_addr) in tlan_dio_read8() argument
446 outw(internal_addr, base_addr + TLAN_DIO_ADR); in tlan_dio_read8()
456 outw(internal_addr, base_addr + TLAN_DIO_ADR); in tlan_dio_read16()
466 outw(internal_addr, base_addr + TLAN_DIO_ADR); in tlan_dio_read32()
467 return inl(base_addr + TLAN_DIO_DATA); in tlan_dio_read32()
476 outw(internal_addr, base_addr + TLAN_DIO_ADR); in tlan_dio_write8()
477 outb(data, base_addr + TLAN_DIO_DATA + (internal_addr & 0x3)); in tlan_dio_write8()
486 outw(internal_addr, base_addr + TLAN_DIO_ADR); in tlan_dio_write16()
487 outw(data, base_addr + TLAN_DIO_DATA + (internal_addr & 0x2)); in tlan_dio_write16()
496 outw(internal_addr, base_addr + TLAN_DIO_ADR); in tlan_dio_write32()
[all …]
/drivers/gpio/
A Dgpio-zynq.c128 void __iomem *base_addr; member
682 readl_relaxed(gpio->base_addr + in zynq_gpio_save_context()
713 gpio->base_addr + in zynq_gpio_restore_context()
716 gpio->base_addr + in zynq_gpio_restore_context()
719 gpio->base_addr + in zynq_gpio_restore_context()
722 gpio->base_addr + in zynq_gpio_restore_context()
725 gpio->base_addr + in zynq_gpio_restore_context()
728 gpio->base_addr + in zynq_gpio_restore_context()
731 gpio->base_addr + in zynq_gpio_restore_context()
922 if (IS_ERR(gpio->base_addr)) in zynq_gpio_probe()
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A Dgpio-ts4800.c22 void __iomem *base_addr; in ts4800_gpio_probe() local
30 base_addr = devm_platform_ioremap_resource(pdev, 0); in ts4800_gpio_probe()
31 if (IS_ERR(base_addr)) in ts4800_gpio_probe()
32 return PTR_ERR(base_addr); in ts4800_gpio_probe()
44 retval = bgpio_init(chip, &pdev->dev, 2, base_addr + INPUT_REG_OFFSET, in ts4800_gpio_probe()
45 base_addr + OUTPUT_REG_OFFSET, NULL, in ts4800_gpio_probe()
46 base_addr + DIRECTION_REG_OFFSET, NULL, 0); in ts4800_gpio_probe()
/drivers/net/phy/
A Dphy_package.c27 u8 base_addr; member
59 u8 base_addr = shared->base_addr; in phy_package_address() local
61 if (addr_offset >= PHY_MAX_ADDR - base_addr) in phy_package_address()
67 return base_addr + addr_offset; in phy_package_address()
215 if (base_addr < 0 || base_addr >= PHY_MAX_ADDR) in phy_package_join()
219 shared = bus->shared[base_addr]; in phy_package_join()
231 shared->base_addr = base_addr; in phy_package_join()
234 bus->shared[base_addr] = shared; in phy_package_join()
279 u32 base_addr; in of_phy_package_join() local
333 bus->shared[shared->base_addr] = NULL; in phy_package_leave()
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/drivers/fpga/
A Daltera-freeze-bridge.c34 void __iomem *base_addr; member
45 void __iomem *csr_illegal_req_addr = priv->base_addr + in altera_freeze_br_req_ack()
91 void __iomem *csr_ctrl_addr = priv->base_addr + in altera_freeze_br_do_freeze()
126 void __iomem *csr_ctrl_addr = priv->base_addr + in altera_freeze_br_do_unfreeze()
212 void __iomem *base_addr; in altera_freeze_br_probe() local
220 base_addr = devm_platform_ioremap_resource(pdev, 0); in altera_freeze_br_probe()
221 if (IS_ERR(base_addr)) in altera_freeze_br_probe()
222 return PTR_ERR(base_addr); in altera_freeze_br_probe()
224 revision = readl(base_addr + FREEZE_CSR_REG_VERSION); in altera_freeze_br_probe()
240 status = readl(base_addr + FREEZE_CSR_STATUS_OFFSET); in altera_freeze_br_probe()
[all …]
/drivers/net/hamradio/
A Dbaycom_ser_fdx.c262 msr = inb(MSR(dev->base_addr)); in ser12_interrupt()
269 inb(LSR(dev->base_addr)); in ser12_interrupt()
273 inb(RBR(dev->base_addr)); in ser12_interrupt()
302 iir = inb(IIR(dev->base_addr)); in ser12_interrupt()
382 if (!dev->base_addr || dev->base_addr > 0xffff-SER12_EXTENT || in ser12_open()
396 dev->base_addr); in ser12_open()
408 outb(0x0d, MCR(dev->base_addr)); in ser12_open()
409 outb(0, IER(dev->base_addr)); in ser12_open()
426 outb(0x0a, IER(dev->base_addr)); in ser12_open()
450 outb(0, IER(dev->base_addr)); in ser12_close()
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A Dbaycom_ser_hdx.c160 outb(0, DLM(dev->base_addr)); in ser12_set_divisor()
167 outb(0x00, THR(dev->base_addr)); in ser12_set_divisor()
377 inb(LSR(dev->base_addr)); in ser12_interrupt()
381 inb(RBR(dev->base_addr)); in ser12_interrupt()
398 inb(MSR(dev->base_addr)); in ser12_interrupt()
401 iir = inb(IIR(dev->base_addr)); in ser12_interrupt()
463 if (!dev->base_addr || dev->base_addr > 0x1000-SER12_EXTENT || in ser12_open()
476 outb(0, IER(dev->base_addr)); in ser12_open()
485 outb(2, IER(dev->base_addr)); in ser12_open()
508 outb(0, IER(dev->base_addr)); in ser12_close()
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A Dyam.c465 outb(0, IER(dev->base_addr)); in yam_set_uart()
468 outb(0, DLM(dev->base_addr)); in yam_set_uart()
475 inb(RBR(dev->base_addr)); in yam_set_uart()
476 inb(MSR(dev->base_addr)); in yam_set_uart()
686 outb(b, THR(dev->base_addr)); in yam_tx_byte()
845 if (!dev->base_addr || dev->base_addr > 0x1000 - YAM_EXTENT || in yam_open()
864 outb(0, IER(dev->base_addr)); in yam_open()
881 inb(LSR(yam_dev->base_addr)); in yam_open()
907 outb(0, IER(dev->base_addr)); in yam_close()
908 outb(1, MCR(dev->base_addr)); in yam_close()
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/drivers/net/ethernet/xilinx/
A Dxilinx_emaclite.c127 void __iomem *base_addr; member
158 drvdata->base_addr + XEL_TSR_OFFSET); in xemaclite_enable_interrupts()
184 drvdata->base_addr + XEL_TSR_OFFSET); in xemaclite_disable_interrupts()
189 drvdata->base_addr + XEL_RSR_OFFSET); in xemaclite_disable_interrupts()
643 void __iomem *base_addr = lp->base_addr; in xemaclite_interrupt() local
737 lp->base_addr + XEL_MDIOADDR_OFFSET); in xemaclite_mdio_read()
739 lp->base_addr + XEL_MDIOCTRL_OFFSET); in xemaclite_mdio_read()
786 lp->base_addr + XEL_MDIOADDR_OFFSET); in xemaclite_mdio_write()
789 lp->base_addr + XEL_MDIOCTRL_OFFSET); in xemaclite_mdio_write()
1120 if (IS_ERR(lp->base_addr)) in xemaclite_of_probe()
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/drivers/net/ethernet/8390/
A Dsmc-ultra.c142 int base_addr = dev->base_addr; in do_ultra_probe() local
146 return ultra_probe1(dev, base_addr); in do_ultra_probe()
147 else if (base_addr != 0) /* Don't probe at all. */ in do_ultra_probe()
279 dev->base_addr = ioaddr+ULTRA_NIC_OFFSET; in ultra_probe1()
361 dev->base_addr = pnp_port_start(idev, 0); in ultra_probe_isapnp()
366 dev->base_addr, dev->irq); in ultra_probe_isapnp()
370 dev->base_addr); in ultra_probe_isapnp()
412 outb_p(E8390_NODMA+E8390_PAGE0, dev->base_addr); in ultra_open()
413 outb(0xff, dev->base_addr + EN0_ERWCNT); in ultra_open()
468 outb(ULTRA_MEMENB, dev->base_addr - ULTRA_NIC_OFFSET); in ultra_block_input()
[all …]
A Dne.c155 #define NE_BASE (dev->base_addr)
209 unsigned long base_addr = dev->base_addr; in do_ne_probe() local
231 for (base_addr = 0; netcard_portlist[base_addr] != 0; base_addr++) { in do_ne_probe()
275 dev->base_addr); in ne_probe_isapnp()
500 dev->base_addr = ioaddr; in ne_probe1()
574 int nic_base = dev->base_addr; in ne_get_8390_hdr()
616 int nic_base = dev->base_addr; in ne_block_input()
797 dev->base_addr = res->start; in ne_drv_probe()
804 dev->base_addr = io[this_dev]; in ne_drv_probe()
820 io[this_dev] = dev->base_addr; in ne_drv_probe()
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/drivers/clocksource/
A Dtimer-cadence-ttc.c75 void __iomem *base_addr; member
145 readl_relaxed(timer->base_addr + TTC_ISR_OFFSET); in ttc_clock_event_interrupt()
162 return (u64)readl_relaxed(timer->base_addr + in __ttc_clocksource_read()
276 readl_relaxed(ttccs->ttc.base_addr + in ttc_rate_change_clocksource_cb()
302 ttccs->ttc.base_addr + TTC_CLK_CNTRL_OFFSET); in ttc_rate_change_clocksource_cb()
312 ttccs->ttc.base_addr + TTC_CLK_CNTRL_OFFSET); in ttc_rate_change_clocksource_cb()
360 ttccs->ttc.base_addr = base; in ttc_setup_clocksource()
374 ttccs->ttc.base_addr + TTC_CLK_CNTRL_OFFSET); in ttc_setup_clocksource()
376 ttccs->ttc.base_addr + TTC_CNT_CNTRL_OFFSET); in ttc_setup_clocksource()
443 ttcce->ttc.base_addr = base; in ttc_setup_clockevent()
[all …]
/drivers/clk/mediatek/
A Dclk-apmixed.c22 void __iomem *base_addr; member
34 return (readl(tx->base_addr) & REF2USB_EN_MASK) == REF2USB_EN_MASK; in mtk_ref2usb_tx_is_prepared()
42 val = readl(tx->base_addr); in mtk_ref2usb_tx_prepare()
45 writel(val, tx->base_addr); in mtk_ref2usb_tx_prepare()
49 writel(val, tx->base_addr); in mtk_ref2usb_tx_prepare()
52 writel(val, tx->base_addr); in mtk_ref2usb_tx_prepare()
62 val = readl(tx->base_addr); in mtk_ref2usb_tx_unprepare()
64 writel(val, tx->base_addr); in mtk_ref2usb_tx_unprepare()
84 tx->base_addr = reg; in mtk_clk_register_ref2usb_tx()
/drivers/net/arcnet/
A Dcom90io.c73 int ioaddr = dev->base_addr; in get_buffer_byte()
85 int ioaddr = dev->base_addr; in put_buffer_byte()
98 int ioaddr = dev->base_addr; in get_whole_buffer()
114 int ioaddr = dev->base_addr; in put_whole_buffer()
224 int ioaddr = dev->base_addr; in com90io_found()
282 short ioaddr = dev->base_addr; in com90io_reset()
313 short ioaddr = dev->base_addr; in com90io_command()
320 short ioaddr = dev->base_addr; in com90io_status()
327 short ioaddr = dev->base_addr; in com90io_setmask()
392 dev->base_addr = io; in com90io_init()
[all …]
/drivers/net/wwan/t7xx/
A Dt7xx_mhccif.c34 void __iomem *mhccif_pbase = t7xx_dev->base_addr.mhccif_rc_base; in t7xx_mhccif_clear_interrupts()
82 return ioread32(t7xx_dev->base_addr.mhccif_rc_base + REG_EP2RC_SW_INT_STS); in t7xx_mhccif_read_sw_int_sts()
87 iowrite32(val, t7xx_dev->base_addr.mhccif_rc_base + REG_EP2RC_SW_INT_EAP_MASK_SET); in t7xx_mhccif_mask_set()
92 iowrite32(val, t7xx_dev->base_addr.mhccif_rc_base + REG_EP2RC_SW_INT_EAP_MASK_CLR); in t7xx_mhccif_mask_clr()
97 return ioread32(t7xx_dev->base_addr.mhccif_rc_base + REG_EP2RC_SW_INT_EAP_MASK); in t7xx_mhccif_mask_get()
107 t7xx_dev->base_addr.mhccif_rc_base = t7xx_dev->base_addr.pcie_ext_reg_base + in t7xx_mhccif_init()
109 t7xx_dev->base_addr.pcie_dev_reg_trsl_addr; in t7xx_mhccif_init()
118 void __iomem *mhccif_pbase = t7xx_dev->base_addr.mhccif_rc_base; in t7xx_mhccif_h2d_swint_trigger()
/drivers/net/ethernet/natsemi/
A Dxtsonic.c71 (0xffff & *((volatile unsigned int *)dev->base_addr+reg))
74 *((volatile unsigned int *)dev->base_addr+reg) = val
127 unsigned int base_addr = dev->base_addr; in sonic_probe1() local
132 if (!request_mem_region(base_addr, 0x100, xtsonic_string)) in sonic_probe1()
190 release_region(dev->base_addr, SONIC_MEM_SIZE); in sonic_probe1()
221 dev->base_addr = resmem->start; in xtsonic_probe()
228 dev->base_addr, dev->dev_addr, dev->irq); in xtsonic_probe()
241 release_region(dev->base_addr, SONIC_MEM_SIZE); in xtsonic_probe()
261 release_region (dev->base_addr, SONIC_MEM_SIZE); in xtsonic_device_remove()
/drivers/gpu/drm/msm/disp/
A Dmsm_disp_snapshot_util.c12 static void msm_disp_state_dump_regs(u32 **reg, u32 aligned_len, void __iomem *base_addr) in msm_disp_state_dump_regs() argument
25 addr = base_addr; in msm_disp_state_dump_regs()
26 end_addr = base_addr + aligned_len; in msm_disp_state_dump_regs()
49 void __iomem *base_addr, struct drm_printer *p) in msm_disp_state_print_regs() argument
60 addr = base_addr; in msm_disp_state_print_regs()
65 (unsigned long)(addr - base_addr), in msm_disp_state_print_regs()
90 msm_disp_state_print_regs(block->state, block->size, block->base_addr, p); in msm_disp_state_print()
170 void __iomem *base_addr, const char *fmt, ...) in msm_disp_snapshot_add_block() argument
190 new_blk->base_addr = base_addr; in msm_disp_snapshot_add_block()
192 msm_disp_state_dump_regs(&new_blk->state, new_blk->size, base_addr); in msm_disp_snapshot_add_block()
/drivers/scsi/
A D3w-sas.h176 ((unsigned char __iomem *)x->base_addr + TWL_STATUS)
178 ((unsigned char __iomem *)x->base_addr + TWL_HOBQPL)
180 ((unsigned char __iomem *)x->base_addr + TWL_HOBQPH)
182 ((unsigned char __iomem *)x->base_addr + TWL_HOBDB)
184 ((unsigned char __iomem *)x->base_addr + TWL_HOBDBC)
186 ((unsigned char __iomem *)x->base_addr + TWL_HIMASK)
188 ((unsigned char __iomem *)x->base_addr + TWL_HISTAT)
190 ((unsigned char __iomem *)x->base_addr + TWL_HIBQPH)
192 ((unsigned char __iomem *)x->base_addr + TWL_HIBQPL)
194 ((unsigned char __iomem *)x->base_addr + TWL_HIBDB)
[all …]

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