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Searched refs:bb_overrides (Results 1 – 9 of 9) sorted by relevance

/drivers/gpu/drm/amd/display/dc/dml/dcn321/
A Ddcn321_fpu.c618 && dc->bb_overrides.sr_exit_time_ns) { in dcn321_update_bw_bounding_box_fpu()
624 != dc->bb_overrides.sr_enter_plus_exit_time_ns in dcn321_update_bw_bounding_box_fpu()
625 && dc->bb_overrides.sr_enter_plus_exit_time_ns) { in dcn321_update_bw_bounding_box_fpu()
628 dc->bb_overrides.sr_enter_plus_exit_time_ns / 1000.0; in dcn321_update_bw_bounding_box_fpu()
632 && dc->bb_overrides.urgent_latency_ns) { in dcn321_update_bw_bounding_box_fpu()
639 != dc->bb_overrides.dram_clock_change_latency_ns in dcn321_update_bw_bounding_box_fpu()
640 && dc->bb_overrides.dram_clock_change_latency_ns) { in dcn321_update_bw_bounding_box_fpu()
647 != dc->bb_overrides.fclk_clock_change_latency_ns in dcn321_update_bw_bounding_box_fpu()
648 && dc->bb_overrides.fclk_clock_change_latency_ns) { in dcn321_update_bw_bounding_box_fpu()
655 != dc->bb_overrides.dummy_clock_change_latency_ns in dcn321_update_bw_bounding_box_fpu()
[all …]
/drivers/gpu/drm/amd/display/dc/dml/dcn351/
A Ddcn351_fpu.c364 if (dc->bb_overrides.dram_clock_change_latency_ns > 0) in dcn351_update_bw_bounding_box_fpu()
366 dc->bb_overrides.dram_clock_change_latency_ns / 1000.0; in dcn351_update_bw_bounding_box_fpu()
368 if (dc->bb_overrides.sr_exit_time_ns > 0) in dcn351_update_bw_bounding_box_fpu()
369 dcn3_51_soc.sr_exit_time_us = dc->bb_overrides.sr_exit_time_ns / 1000.0; in dcn351_update_bw_bounding_box_fpu()
371 if (dc->bb_overrides.sr_enter_plus_exit_time_ns > 0) in dcn351_update_bw_bounding_box_fpu()
373 dc->bb_overrides.sr_enter_plus_exit_time_ns / 1000.0; in dcn351_update_bw_bounding_box_fpu()
375 if (dc->bb_overrides.sr_exit_z8_time_ns > 0) in dcn351_update_bw_bounding_box_fpu()
376 dcn3_51_soc.sr_exit_z8_time_us = dc->bb_overrides.sr_exit_z8_time_ns / 1000.0; in dcn351_update_bw_bounding_box_fpu()
378 if (dc->bb_overrides.sr_enter_plus_exit_z8_time_ns > 0) in dcn351_update_bw_bounding_box_fpu()
380 dc->bb_overrides.sr_enter_plus_exit_z8_time_ns / 1000.0; in dcn351_update_bw_bounding_box_fpu()
/drivers/gpu/drm/amd/display/dc/dml/dcn35/
A Ddcn35_fpu.c330 if (dc->bb_overrides.dram_clock_change_latency_ns > 0) in dcn35_update_bw_bounding_box_fpu()
332 dc->bb_overrides.dram_clock_change_latency_ns / 1000.0; in dcn35_update_bw_bounding_box_fpu()
334 if (dc->bb_overrides.sr_exit_time_ns > 0) in dcn35_update_bw_bounding_box_fpu()
335 dcn3_5_soc.sr_exit_time_us = dc->bb_overrides.sr_exit_time_ns / 1000.0; in dcn35_update_bw_bounding_box_fpu()
337 if (dc->bb_overrides.sr_enter_plus_exit_time_ns > 0) in dcn35_update_bw_bounding_box_fpu()
339 dc->bb_overrides.sr_enter_plus_exit_time_ns / 1000.0; in dcn35_update_bw_bounding_box_fpu()
341 if (dc->bb_overrides.sr_exit_z8_time_ns > 0) in dcn35_update_bw_bounding_box_fpu()
342 dcn3_5_soc.sr_exit_z8_time_us = dc->bb_overrides.sr_exit_z8_time_ns / 1000.0; in dcn35_update_bw_bounding_box_fpu()
344 if (dc->bb_overrides.sr_enter_plus_exit_z8_time_ns > 0) in dcn35_update_bw_bounding_box_fpu()
346 dc->bb_overrides.sr_enter_plus_exit_z8_time_ns / 1000.0; in dcn35_update_bw_bounding_box_fpu()
/drivers/gpu/drm/amd/display/dc/dml/dcn20/
A Ddcn20_fpu.c1865 if (dc->bb_overrides.min_dcfclk_mhz > 0) { in dcn20_update_bounding_box()
1866 min_dcfclk = dc->bb_overrides.min_dcfclk_mhz; in dcn20_update_bounding_box()
1987 && dc->bb_overrides.sr_exit_time_ns) { in dcn20_patch_bounding_box()
1992 != dc->bb_overrides.sr_enter_plus_exit_time_ns in dcn20_patch_bounding_box()
1999 != dc->bb_overrides.sr_exit_z8_time_ns in dcn20_patch_bounding_box()
2000 && dc->bb_overrides.sr_exit_z8_time_ns) { in dcn20_patch_bounding_box()
2010 && dc->bb_overrides.urgent_latency_ns) { in dcn20_patch_bounding_box()
2180 if (dc->bb_overrides.sr_exit_time_ns) { in patch_bounding_box()
2183 dc->bb_overrides.sr_exit_time_ns / 1000.0; in patch_bounding_box()
2187 if (dc->bb_overrides.sr_enter_plus_exit_time_ns) { in patch_bounding_box()
[all …]
/drivers/gpu/drm/amd/display/dc/dml2/dml21/
A Ddml21_translation_helper.c378 if (in_dc->bb_overrides.sr_exit_time_ns) in override_dml_init_with_values_from_software_policy()
380 in_dc->bb_overrides.sr_exit_time_ns / 1000.0; in override_dml_init_with_values_from_software_policy()
382 if (in_dc->bb_overrides.sr_enter_plus_exit_time_ns) in override_dml_init_with_values_from_software_policy()
384 in_dc->bb_overrides.sr_enter_plus_exit_time_ns / 1000.0; in override_dml_init_with_values_from_software_policy()
386 if (in_dc->bb_overrides.dram_clock_change_latency_ns) in override_dml_init_with_values_from_software_policy()
388 in_dc->bb_overrides.dram_clock_change_latency_ns / 1000.0; in override_dml_init_with_values_from_software_policy()
390 if (in_dc->bb_overrides.fclk_clock_change_latency_ns) in override_dml_init_with_values_from_software_policy()
392 in_dc->bb_overrides.fclk_clock_change_latency_ns / 1000.0; in override_dml_init_with_values_from_software_policy()
/drivers/gpu/drm/amd/display/dc/dml/dcn32/
A Ddcn32_fpu.c3060 && dc->bb_overrides.sr_exit_time_ns) { in dcn32_update_bw_bounding_box_fpu()
3066 != dc->bb_overrides.sr_enter_plus_exit_time_ns in dcn32_update_bw_bounding_box_fpu()
3067 && dc->bb_overrides.sr_enter_plus_exit_time_ns) { in dcn32_update_bw_bounding_box_fpu()
3070 dc->bb_overrides.sr_enter_plus_exit_time_ns / 1000.0; in dcn32_update_bw_bounding_box_fpu()
3074 && dc->bb_overrides.urgent_latency_ns) { in dcn32_update_bw_bounding_box_fpu()
3081 != dc->bb_overrides.dram_clock_change_latency_ns in dcn32_update_bw_bounding_box_fpu()
3082 && dc->bb_overrides.dram_clock_change_latency_ns) { in dcn32_update_bw_bounding_box_fpu()
3089 != dc->bb_overrides.fclk_clock_change_latency_ns in dcn32_update_bw_bounding_box_fpu()
3090 && dc->bb_overrides.fclk_clock_change_latency_ns) { in dcn32_update_bw_bounding_box_fpu()
3097 != dc->bb_overrides.dummy_clock_change_latency_ns in dcn32_update_bw_bounding_box_fpu()
[all …]
/drivers/gpu/drm/amd/display/dc/
A Ddc.h1179 struct dc_bounding_box_overrides bb_overrides; member
1663 struct dc_bounding_box_overrides bb_overrides; member
/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/
A Ddcn401_clk_mgr.c201 if (clk_mgr->ctx->dc->bb_overrides.dummy_clock_change_latency_ns != 0x7FFFFFFF) { in dcn401_build_wm_range_table()
/drivers/gpu/drm/amd/display/dc/core/
A Ddc.c1040 memcpy(&dc->bb_overrides, &init_params->bb_overrides, sizeof(dc->bb_overrides)); in dc_construct()

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