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Searched refs:bcr (Results 1 – 21 of 21) sorted by relevance

/drivers/memory/
A Dstm32-fmc2-ebi.c245 u32 bcr; in stm32_fmc2_ebi_check_mux() local
269 if ((bcr & FMC2_BCR_MTYP) == val && bcr & FMC2_BCR_BURSTEN) in stm32_fmc2_ebi_check_waitcfg()
279 u32 bcr; in stm32_fmc2_ebi_check_sync_trans() local
323 u32 bcr; in stm32_fmc2_ebi_check_async_trans() local
330 if (!(bcr & FMC2_BCR_BURSTEN) || !(bcr & FMC2_BCR_CBURSTRW)) in stm32_fmc2_ebi_check_async_trans()
347 if ((bcr & FMC2_BCR_MTYP) == val && bcr & FMC2_BCR_BURSTEN) in stm32_fmc2_ebi_check_cpsize()
371 if ((!(bcr & FMC2_BCR_BURSTEN) || !(bcr & FMC2_BCR_CBURSTRW)) && in stm32_fmc2_ebi_check_address_hold()
382 u32 bcr, bcr1; in stm32_fmc2_ebi_check_clk_period() local
394 bcr1 = bcr; in stm32_fmc2_ebi_check_clk_period()
1508 u32 bcr; in stm32_fmc2_ebi_nwait_used_by_ctrls() local
[all …]
/drivers/spi/
A Dspi-intel-pci.c20 u32 bcr; in intel_spi_pci_set_writeable() local
23 pci_read_config_dword(pdev, BCR, &bcr); in intel_spi_pci_set_writeable()
24 if (!(bcr & BCR_WPD)) { in intel_spi_pci_set_writeable()
25 bcr |= BCR_WPD; in intel_spi_pci_set_writeable()
26 pci_write_config_dword(pdev, BCR, bcr); in intel_spi_pci_set_writeable()
27 pci_read_config_dword(pdev, BCR, &bcr); in intel_spi_pci_set_writeable()
30 return bcr & BCR_WPD; in intel_spi_pci_set_writeable()
/drivers/i2c/busses/
A Di2c-synquacer.c260 unsigned char bsr, bcr; in synquacer_i2c_master_start() local
268 bcr = readb(i2c->base + SYNQUACER_I2C_REG_BCR); in synquacer_i2c_master_start()
272 !(bcr & SYNQUACER_I2C_BCR_MSS)) { in synquacer_i2c_master_start()
279 writeb(bcr | SYNQUACER_I2C_BCR_SCC, in synquacer_i2c_master_start()
282 if (bcr & SYNQUACER_I2C_BCR_MSS) { in synquacer_i2c_master_start()
288 writeb(bcr | SYNQUACER_I2C_BCR_MSS | in synquacer_i2c_master_start()
297 bcr = readb(i2c->base + SYNQUACER_I2C_REG_BCR); in synquacer_i2c_master_start()
301 !(bcr & SYNQUACER_I2C_BCR_MSS)) { in synquacer_i2c_master_start()
361 unsigned char bsr, bcr; in synquacer_i2c_isr() local
368 if (bcr & SYNQUACER_I2C_BCR_BER) { in synquacer_i2c_isr()
[all …]
/drivers/net/can/cc770/
A Dcc770_isa.c74 static u8 bcr[MAXDEV] = {[0 ... (MAXDEV - 1)] = 0xff}; variable
99 module_param_array(bcr, byte, NULL, 0444);
100 MODULE_PARM_DESC(bcr, "Bus configuration register (default=0x40 [CBY])");
246 if (bcr[idx] != 0xff) in cc770_isa_probe()
247 priv->bus_config = bcr[idx]; in cc770_isa_probe()
248 else if (bcr[0] != 0xff) in cc770_isa_probe()
249 priv->bus_config = bcr[0]; in cc770_isa_probe()
A Dcc770_platform.c143 priv->bus_config = pdata->bcr; in cc770_get_platform_data()
/drivers/i3c/master/mipi-i3c-hci/
A Ddct_v1.c21 u64 *pid, unsigned int *dcr, unsigned int *bcr) in i3c_hci_dct_get_val() argument
35 *bcr = FIELD_GET(W2_MASK(79, 72), dct_entry_data[2]); in i3c_hci_dct_get_val()
A Dcmd_v2.c246 unsigned int dcr, bcr; in hci_cmd_v2_daa() local
294 bcr = FIELD_GET(W1_MASK(55, 48), device_id[1]); in hci_cmd_v2_daa()
297 next_addr, pid, dcr, bcr); in hci_cmd_v2_daa()
A Dcmd_v1.c296 unsigned int dcr, bcr; in hci_cmd_v1_daa() local
351 i3c_hci_dct_get_val(hci, 0, &pid, &dcr, &bcr); in hci_cmd_v1_daa()
353 next_addr, pid, dcr, bcr); in hci_cmd_v1_daa()
A Ddct.h14 u64 *pid, unsigned int *dcr, unsigned int *bcr);
/drivers/i3c/
A Dmaster.c144 ret = sprintf(buf, "0x%02x\n", desc->info.bcr); in bcr_show()
149 static DEVICE_ATTR_RO(bcr);
1086 if (I3C_BCR_DEVICE_ROLE(i3cdev->info.bcr) == in i3c_master_defslvs_locked()
1105 defslvs->master.bcr = master->this->info.bcr; in i3c_master_defslvs_locked()
1122 desc->bcr = i3cdev->info.bcr; in i3c_master_defslvs_locked()
1190 if (!(info->bcr & I3C_BCR_IBI_PAYLOAD)) in i3c_master_getmrl_locked()
1368 info->bcr = getbcr->bcr; in i3c_master_getbcr_locked()
1428 if (dev->info.bcr & I3C_BCR_MAX_DATA_SPEED_LIM) { in i3c_master_retrieve_dev_info()
1434 if (dev->info.bcr & I3C_BCR_IBI_PAYLOAD) in i3c_master_retrieve_dev_info()
1440 if (dev->info.bcr & I3C_BCR_HDR_CAP) { in i3c_master_retrieve_dev_info()
[all …]
/drivers/mfd/
A Dlpc_ich.c1282 u32 bcr; in lpc_ich_set_writeable() local
1284 pci_bus_read_config_dword(bus, devfn, BCR, &bcr); in lpc_ich_set_writeable()
1285 if (!(bcr & BCR_WPD)) { in lpc_ich_set_writeable()
1286 bcr |= BCR_WPD; in lpc_ich_set_writeable()
1287 pci_bus_write_config_dword(bus, devfn, BCR, bcr); in lpc_ich_set_writeable()
1288 pci_bus_read_config_dword(bus, devfn, BCR, &bcr); in lpc_ich_set_writeable()
1291 return bcr & BCR_WPD; in lpc_ich_set_writeable()
/drivers/net/can/rcar/
A Drcar_can.c65 u8 bcr[3]; /* Bit Configuration Register */ member
427 u32 bcr; in rcar_can_set_bittiming() local
429 bcr = RCAR_CAN_BCR_TSEG1(bt->phase_seg1 + bt->prop_seg - 1) | in rcar_can_set_bittiming()
436 writel((bcr << 8) | priv->clock_select, &priv->regs->bcr); in rcar_can_set_bittiming()
/drivers/i3c/master/
A Di3c-master-cdns.c302 #define DEV_ID_RR2_BCR(bcr) ((bcr) << 8) argument
1045 info->bcr = rr >> 8; in cdns_i3c_master_dev_rr_to_info()
1263 if (info.bcr & I3C_BCR_HDR_CAP) in cdns_i3c_master_bus_init()
1429 sircfg = SIR_MAP_DEV_ROLE(dev->info.bcr >> 6) | in cdns_i3c_master_enable_ibi()
1434 if (dev->info.bcr & I3C_BCR_MAX_DATA_SPEED_LIM) in cdns_i3c_master_enable_ibi()
A Dast2600-i3c-master.c113 if (enable && dev->info.bcr & I3C_BCR_IBI_PAYLOAD) { in ast2600_i3c_set_dat_ibi()
A Dsvc-i3c-master.c1105 if (!(dev->info.bcr & I3C_BCR_IBI_REQ_CAP)) in svc_i3c_update_ibirules()
1108 if (dev->info.bcr & I3C_BCR_IBI_PAYLOAD) { in svc_i3c_update_ibirules()
A Ddw-i3c-master.c1244 if (dev->info.bcr & I3C_BCR_IBI_PAYLOAD) in dw_i3c_master_set_sir_enabled()
/drivers/dma/
A Dfsldma.h113 u32 bcr; /* 0x20 - Byte Count Register */ member
A Dfsldma.c82 FSL_DMA_OUT(chan, &chan->regs->bcr, val, 32); in set_bcr()
87 return FSL_DMA_IN(chan, &chan->regs->bcr, 32); in get_bcr()
/drivers/net/mctp/
A Dmctp-i3c.c215 mi->have_mdb = info.bcr & BIT(2); in mctp_i3c_setup()
/drivers/video/fbdev/omap2/omapfb/dss/
A Ddispc.c239 int ry, rcr, rcb, gy, gcr, gcb, by, bcr, bcb; member
669 dispc_write_reg(DISPC_OVL_CONV_COEF(plane, 3), CVAL(ct->bcr, ct->by)); in dispc_ovl_write_color_conv_coef()
/drivers/gpu/drm/omapdrm/dss/
A Ddispc.c825 int ry, rcb, rcr, gy, gcb, gcr, by, bcb, bcr; member
838 dispc_write_reg(dispc, DISPC_OVL_CONV_COEF(plane, 3), CVAL(ct->bcr, ct->by)); in dispc_ovl_write_color_conv_coef()

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