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Searched refs:bit_idx (Results 1 – 25 of 115) sorted by relevance

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/drivers/clk/imx/
A Dclk-imx95-blk-ctl.c46 u32 bit_idx; member
67 .bit_idx = 0,
77 .bit_idx = 1,
87 .bit_idx = 2,
107 .bit_idx = 0,
117 .bit_idx = 1,
127 .bit_idx = 4,
137 .bit_idx = 5,
147 .bit_idx = 6,
166 .bit_idx = 0,
[all …]
A Dclk-gate2.c31 u8 bit_idx; member
47 reg &= ~(gate->cgr_mask << gate->bit_idx); in clk_gate2_do_shared_clks()
49 reg |= (gate->cgr_val & gate->cgr_mask) << gate->bit_idx; in clk_gate2_do_shared_clks()
89 static int clk_gate2_reg_is_enabled(void __iomem *reg, u8 bit_idx, in clk_gate2_reg_is_enabled() argument
94 if (((val >> bit_idx) & cgr_mask) == cgr_val) in clk_gate2_reg_is_enabled()
108 ret = clk_gate2_reg_is_enabled(gate->reg, gate->bit_idx, in clk_gate2_is_enabled()
138 void __iomem *reg, u8 bit_idx, u8 cgr_val, u8 cgr_mask, in clk_hw_register_gate2() argument
153 gate->bit_idx = bit_idx; in clk_hw_register_gate2()
A Dclk-lpcg-scu.c37 u8 bit_idx; member
78 reg &= ~(CLK_GATE_SCU_LPCG_MASK << clk->bit_idx); in clk_lpcg_scu_enable()
84 reg |= val << clk->bit_idx; in clk_lpcg_scu_enable()
102 reg &= ~(CLK_GATE_SCU_LPCG_MASK << clk->bit_idx); in clk_lpcg_scu_disable()
115 void __iomem *reg, u8 bit_idx, bool hw_gate) in __imx_clk_lpcg_scu() argument
127 clk->bit_idx = bit_idx; in __imx_clk_lpcg_scu()
A Dclk-gate-93.c38 u32 bit_idx; member
58 val &= ~(gate->mask << gate->bit_idx); in imx93_clk_gate_do_hardware()
60 val |= (gate->val & gate->mask) << gate->bit_idx; in imx93_clk_gate_do_hardware()
111 if (((val >> gate->bit_idx) & gate->mask) == gate->val) in imx93_clk_gate_reg_is_enabled()
158 unsigned long flags, void __iomem *reg, u32 bit_idx, u32 val, in imx93_clk_gate() argument
173 gate->bit_idx = bit_idx; in imx93_clk_gate()
A Dclk-scu.h44 void __iomem *reg, u8 bit_idx, bool hw_gate);
65 void __iomem *reg, u8 bit_idx, bool hw_gate) in imx_clk_lpcg_scu_dev() argument
68 bit_idx, hw_gate); in imx_clk_lpcg_scu_dev()
73 u8 bit_idx, bool hw_gate) in imx_clk_lpcg_scu() argument
76 bit_idx, hw_gate); in imx_clk_lpcg_scu()
/drivers/clk/
A Dclk-gate.c71 reg = BIT(gate->bit_idx + 16); in clk_gate_endisable()
73 reg |= BIT(gate->bit_idx); in clk_gate_endisable()
78 reg |= BIT(gate->bit_idx); in clk_gate_endisable()
80 reg &= ~BIT(gate->bit_idx); in clk_gate_endisable()
112 reg ^= BIT(gate->bit_idx); in clk_gate_is_enabled()
114 reg &= BIT(gate->bit_idx); in clk_gate_is_enabled()
132 void __iomem *reg, u8 bit_idx, in __clk_hw_register_gate() argument
141 if (bit_idx > 15) { in __clk_hw_register_gate()
165 gate->bit_idx = bit_idx; in __clk_hw_register_gate()
187 void __iomem *reg, u8 bit_idx, in clk_register_gate() argument
[all …]
A Dclk-stm32f4.c59 u8 bit_idx; member
430 u8 bit_idx; member
494 am->bit_idx = bit_idx; in clk_register_apb_mul()
567 u8 bit_idx; member
950 pll->gate.bit_idx = vco->bit_idx; in stm32f4_rcc_register_pll()
1120 rgate->gate.bit_idx = bit_idx; in clk_register_rgate()
1215 gate->bit_idx = bit_idx; in stm32_register_cclk()
1299 u8 bit_idx; member
1765 int offset_gate, u8 bit_idx, in stm32_register_aux_clk() argument
1782 gate->bit_idx = bit_idx; in stm32_register_aux_clk()
[all …]
A Dclk-stm32h7.c238 rgate->gate.bit_idx = bit_idx; in clk_register_ready_gate()
253 u8 bit_idx; member
342 gate->bit_idx = bit_idx; in _get_cgate()
593 u8 bit_idx; member
603 .bit_idx = _bit_idx,\
622 u8 bit_idx; member
637 .bit_idx = 24,
645 .bit_idx = 26,
653 .bit_idx = 28,
812 rgate->gate.bit_idx = cfg->bit_idx; in clk_register_stm32_pll()
[all …]
/drivers/net/wireless/ath/wcn36xx/
A Dfirmware.c84 int arr_idx, bit_idx; in wcn36xx_firmware_set_feat_caps() local
92 bit_idx = cap % 32; in wcn36xx_firmware_set_feat_caps()
93 bitmap[arr_idx] |= (1 << bit_idx); in wcn36xx_firmware_set_feat_caps()
99 int arr_idx, bit_idx; in wcn36xx_firmware_get_feat_caps() local
107 bit_idx = cap % 32; in wcn36xx_firmware_get_feat_caps()
109 return (bitmap[arr_idx] & (1 << bit_idx)) ? 1 : 0; in wcn36xx_firmware_get_feat_caps()
115 int arr_idx, bit_idx; in wcn36xx_firmware_clear_feat_caps() local
123 bit_idx = cap % 32; in wcn36xx_firmware_clear_feat_caps()
124 bitmap[arr_idx] &= ~(1 << bit_idx); in wcn36xx_firmware_clear_feat_caps()
/drivers/xen/events/
A Devents_2l.c170 int word_idx, bit_idx; in evtchn_2l_handle_events() local
180 bit_idx = evtchn % BITS_PER_LONG; in evtchn_2l_handle_events()
207 bit_idx = 0; in evtchn_2l_handle_events()
228 bit_idx = start_bit_idx; in evtchn_2l_handle_events()
235 bits = MASK_LSBS(pending_bits, bit_idx); in evtchn_2l_handle_events()
241 bit_idx = EVTCHN_FIRST_BIT(bits); in evtchn_2l_handle_events()
244 port = (word_idx * BITS_PER_EVTCHN_WORD) + bit_idx; in evtchn_2l_handle_events()
247 bit_idx = (bit_idx + 1) % BITS_PER_EVTCHN_WORD; in evtchn_2l_handle_events()
251 bit_idx ? word_idx : in evtchn_2l_handle_events()
253 __this_cpu_write(current_bit_idx, bit_idx); in evtchn_2l_handle_events()
[all …]
/drivers/clk/hisilicon/
A Dclkgate-separated.c27 u8 bit_idx; /* bits in enable/disable register */ member
41 reg = BIT(sclk->bit_idx); in clkgate_separated_enable()
58 reg = BIT(sclk->bit_idx); in clkgate_separated_disable()
72 reg &= BIT(sclk->bit_idx); in clkgate_separated_is_enabled()
86 void __iomem *reg, u8 bit_idx, in hisi_register_clkgate_sep() argument
104 sclk->bit_idx = bit_idx; in hisi_register_clkgate_sep()
/drivers/clk/meson/
A Da1-peripherals.c52 .bit_idx = 0,
67 .bit_idx = 1,
82 .bit_idx = 2,
97 .bit_idx = 3,
112 .bit_idx = 4,
127 .bit_idx = 5,
142 .bit_idx = 6,
157 .bit_idx = 31,
222 .bit_idx = 24,
256 .bit_idx = 30,
[all …]
A Ds4-peripherals.c68 .bit_idx = 31,
152 .bit_idx = 30,
237 .bit_idx = 29,
283 .bit_idx = 13,
315 .bit_idx = 31,
568 .bit_idx = 8,
824 .bit_idx = 0,
838 .bit_idx = 1,
852 .bit_idx = 2,
866 .bit_idx = 3,
[all …]
A Daxg.c423 .bit_idx = 27,
450 .bit_idx = 28,
488 .bit_idx = 29,
514 .bit_idx = 30,
542 .bit_idx = 31,
762 .bit_idx = 0,
912 .bit_idx = 4,
927 .bit_idx = 3,
984 .bit_idx = 7,
1098 .bit_idx = 7,
[all …]
A Dmeson8b.c396 .bit_idx = 27,
424 .bit_idx = 28,
452 .bit_idx = 29,
480 .bit_idx = 30,
508 .bit_idx = 31,
572 .bit_idx = 14,
616 .bit_idx = 14,
717 .bit_idx = 7,
899 .bit_idx = 8,
1349 .bit_idx = 0,
[all …]
A Dc3-pll.c40 .bit_idx = 0,
81 .bit_idx = 24,
109 .bit_idx = 4,
137 .bit_idx = 20,
165 .bit_idx = 21,
193 .bit_idx = 22,
221 .bit_idx = 23,
515 .bit_idx = 1,
548 .bit_idx = 0,
578 .bit_idx = 9,
[all …]
A Dgxbb.c669 .bit_idx = 27,
696 .bit_idx = 28,
734 .bit_idx = 29,
760 .bit_idx = 30,
1026 .bit_idx = 7,
1077 .bit_idx = 8,
1149 .bit_idx = 8,
1277 .bit_idx = 8,
1477 .bit_idx = 7,
1577 .bit_idx = 7,
[all …]
A Dc3-peripherals.c54 .bit_idx = 31,
133 .bit_idx = 30,
341 .bit_idx = 11,
389 .bit_idx = 12,
512 .bit_idx = 8,
718 .bit_idx = 6,
823 .bit_idx = 8,
881 .bit_idx = 7,
975 .bit_idx = 7,
1007 .bit_idx = 8,
[all …]
A Dg12a-aoclk.c50 .bit_idx = (_bit), \
82 .bit_idx = 14,
109 .bit_idx = 31,
182 .bit_idx = 30,
200 .bit_idx = 31,
273 .bit_idx = 30,
361 .bit_idx = 8,
A Dg12a.c330 .bit_idx = 24,
347 .bit_idx = 24,
403 .bit_idx = 24,
440 .bit_idx = 20,
1244 .bit_idx = 1,
1273 .bit_idx = 1,
1336 .bit_idx = 1,
2579 .bit_idx = 7,
2642 .bit_idx = 7,
2740 .bit_idx = 7,
[all …]
A Ds4-pll.c132 .bit_idx = 24,
158 .bit_idx = 20,
184 .bit_idx = 21,
210 .bit_idx = 22,
236 .bit_idx = 23,
264 .bit_idx = 25,
591 .bit_idx = 31,
644 .bit_idx = 31,
697 .bit_idx = 31,
750 .bit_idx = 31,
/drivers/clk/stm32/
A Dreset-stm32.c43 line->bit_idx = offset; in stm32_get_reset_line()
70 writel(BIT(ptr_line->bit_idx), addr); in stm32_reset_update()
81 reg |= BIT(ptr_line->bit_idx); in stm32_reset_update()
83 reg &= ~BIT(ptr_line->bit_idx); in stm32_reset_update()
119 return !!(reg & BIT(ptr_line->bit_idx)); in stm32_reset_status()
/drivers/clk/mvebu/
A Dcp110-system-controller.c116 u8 bit_idx; member
126 BIT(gate->bit_idx), BIT(gate->bit_idx)); in cp110_gate_enable()
136 BIT(gate->bit_idx), 0); in cp110_gate_disable()
146 return val & BIT(gate->bit_idx); in cp110_gate_is_enabled()
157 struct regmap *regmap, u8 bit_idx) in cp110_register_gate() argument
176 gate->bit_idx = bit_idx; in cp110_register_gate()
/drivers/clk/actions/
A Dowl-gate.c27 reg |= BIT(gate_hw->bit_idx); in owl_gate_set()
29 reg &= ~BIT(gate_hw->bit_idx); in owl_gate_set()
60 reg ^= BIT(gate_hw->bit_idx); in owl_gate_clk_is_enabled()
62 return !!(reg & BIT(gate_hw->bit_idx)); in owl_gate_clk_is_enabled()
/drivers/gpio/
A Dgpio-graniterapids.c181 unsigned int bit_idx = gpio % GNR_PINS_PER_REG; in gnr_gpio_irq_ack() local
188 reg |= BIT(bit_idx); in gnr_gpio_irq_ack()
196 unsigned int bit_idx = gpio % GNR_PINS_PER_REG; in gnr_gpio_irq_mask_unmask() local
204 reg &= ~BIT(bit_idx); in gnr_gpio_irq_mask_unmask()
206 reg |= BIT(bit_idx); in gnr_gpio_irq_mask_unmask()
292 unsigned int bit_idx; in gnr_gpio_irq() local
302 for_each_set_bit(bit_idx, &pending, GNR_PINS_PER_REG) { in gnr_gpio_irq()
303 unsigned int hwirq = i * GNR_PINS_PER_REG + bit_idx; in gnr_gpio_irq()

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