| /drivers/misc/mchp_pci1xxxx/ |
| A D | mchp_pci1xxxx_gpio.c | 91 data |= BIT(bitpos); in pci1xxx_assign_bit()
93 data &= ~BIT(bitpos); in pci1xxx_assign_bit()
231 bitpos, false); in pci1xxxx_gpio_set_type()
233 bitpos, false); in pci1xxxx_gpio_set_type()
237 bitpos, true); in pci1xxxx_gpio_set_type()
242 bitpos, false); in pci1xxxx_gpio_set_type()
248 bitpos, true); in pci1xxxx_gpio_set_type()
253 bitpos, true); in pci1xxxx_gpio_set_type()
255 bitpos, false); in pci1xxxx_gpio_set_type()
263 bitpos, false); in pci1xxxx_gpio_set_type()
[all …]
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| /drivers/mfd/ |
| A D | rz-mtu3.c | 217 u8 bitpos; in rz_mtu3_get_tstr_bit_pos() local
225 bitpos = ch->channel_number; in rz_mtu3_get_tstr_bit_pos()
228 bitpos = 6; in rz_mtu3_get_tstr_bit_pos()
231 bitpos = 7; in rz_mtu3_get_tstr_bit_pos()
234 bitpos = 2; in rz_mtu3_get_tstr_bit_pos()
237 bitpos = 3; in rz_mtu3_get_tstr_bit_pos()
240 bitpos = 0; in rz_mtu3_get_tstr_bit_pos()
244 return bitpos; in rz_mtu3_get_tstr_bit_pos()
253 u8 bitpos; in rz_mtu3_start_stop_ch() local
274 u8 bitpos; in rz_mtu3_is_enabled() local
[all …]
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| /drivers/gpio/ |
| A D | gpio-siox.c | 49 unsigned int bitpos = 11 - offset; in gpio_siox_get_data() local
50 unsigned int gpiolevel = buf[bitpos / 8] & (1 << bitpos % 8); in gpio_siox_get_data()
52 ddata->getdata[bitpos / 8] & (1 << (bitpos % 8)); in gpio_siox_get_data()
149 unsigned int bitpos = 19 - offset; in gpio_siox_get() local
151 ret = ddata->setdata[0] & (1 << bitpos); in gpio_siox_get()
153 unsigned int bitpos = 11 - offset; in gpio_siox_get() local
155 ret = ddata->getdata[bitpos / 8] & (1 << (bitpos % 8)); in gpio_siox_get()
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| /drivers/media/pci/mantis/ |
| A D | mantis_ioc.c | 67 void mantis_gpio_set_bits(struct mantis_pci *mantis, u32 bitpos, u8 value) in mantis_gpio_set_bits() argument
71 dprintk(MANTIS_DEBUG, 1, "Set Bit <%d> to <%d>", bitpos, value); in mantis_gpio_set_bits()
74 mantis->gpio_status = cur | (1 << bitpos); in mantis_gpio_set_bits()
76 mantis->gpio_status = cur & (~(1 << bitpos)); in mantis_gpio_set_bits()
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| A D | mantis_ioc.h | 35 extern void mantis_gpio_set_bits(struct mantis_pci *mantis, u32 bitpos, u8 value);
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| /drivers/crypto/intel/qat/qat_common/ |
| A D | icp_qat_fw.h | 8 #define QAT_FIELD_SET(flags, val, bitpos, mask) \ argument
9 { (flags) = (((flags) & (~((mask) << (bitpos)))) | \
10 (((val) & (mask)) << (bitpos))) ; }
12 #define QAT_FIELD_GET(flags, bitpos, mask) \ argument
13 (((flags) >> (bitpos)) & (mask))
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| /drivers/clk/renesas/ |
| A D | rzg2l-cpg.h | 66 #define DDIV_PACK(offset, bitpos, size) \ argument
67 (((offset) << 20) | ((bitpos) << 12) | ((size) << 8))
77 #define SEL_PLL_PACK(offset, bitpos, size) \ argument
78 (((offset) << 20) | ((bitpos) << 12) | ((size) << 8))
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| /drivers/pinctrl/mediatek/ |
| A D | pinctrl-mtk-common-v2.c | 134 pfd->bitpos = bits % c->sz_reg; in mtk_hw_pin_field_lookup()
141 pfd->next = pfd->bitpos + c->x_bits > c->sz_reg ? c->x_addrs : 0; in mtk_hw_pin_field_lookup()
160 *l = 32 - pf->bitpos; in mtk_hw_bits_part()
171 mtk_rmw(hw, pf->index, pf->offset, pf->mask << pf->bitpos, in mtk_hw_write_cross_field()
172 (value & pf->mask) << pf->bitpos); in mtk_hw_write_cross_field()
186 >> pf->bitpos) & (BIT(nbits_l) - 1); in mtk_hw_read_cross_field()
207 mtk_rmw(hw, pf.index, pf.offset, pf.mask << pf.bitpos, in mtk_hw_set_value()
208 (value & pf.mask) << pf.bitpos); in mtk_hw_set_value()
228 >> pf.bitpos) & pf.mask; in mtk_hw_get_value()
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| A D | pinctrl-mtk-common-v2.h | 127 u8 bitpos; member
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| /drivers/mtd/nand/raw/ |
| A D | diskonchip.c | 184 int index, bitpos, pos = 1015 - errpos[i]; in doc_ecc_decode() local
194 bitpos = pos & 7; in doc_ecc_decode()
196 val = (uint8_t) (errval[i] >> (2 + bitpos)); in doc_ecc_decode()
202 bitpos = (bitpos + 10) & 7; in doc_ecc_decode()
203 if (bitpos == 0) in doc_ecc_decode()
204 bitpos = 8; in doc_ecc_decode()
206 val = (uint8_t) (errval[i] << (8 - bitpos)); in doc_ecc_decode()
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| /drivers/edac/ |
| A D | synopsys_edac.c | 281 u32 bitpos; member
387 p->ceinfo.bitpos = (regval & CE_LOG_BITPOS_MASK) >> CE_LOG_BITPOS_SHIFT; in zynq_get_error_info()
393 edac_dbg(3, "CE bit position: %d data: %d\n", p->ceinfo.bitpos, in zynq_get_error_info()
461 p->ceinfo.bitpos = (regval & ECC_STAT_BITNUM_MASK); in zynqmp_get_error_info()
520 pinf->bitpos, pinf->data); in handle_error()
525 pinf->bitpos, pinf->data); in handle_error()
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| /drivers/i3c/ |
| A D | master.c | 352 int bitpos = addr * I3C_ADDR_SLOT_STATUS_BITS; in i3c_bus_get_addr_slot_status_mask() local
357 status = bus->addrslots[bitpos / BITS_PER_LONG]; in i3c_bus_get_addr_slot_status_mask()
358 status >>= bitpos % BITS_PER_LONG; in i3c_bus_get_addr_slot_status_mask()
372 int bitpos = addr * I3C_ADDR_SLOT_STATUS_BITS; in i3c_bus_set_addr_slot_status_mask() local
378 ptr = bus->addrslots + (bitpos / BITS_PER_LONG); in i3c_bus_set_addr_slot_status_mask()
379 *ptr &= ~((unsigned long)mask << (bitpos % BITS_PER_LONG)); in i3c_bus_set_addr_slot_status_mask()
380 *ptr |= ((unsigned long)status & mask) << (bitpos % BITS_PER_LONG); in i3c_bus_set_addr_slot_status_mask()
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| /drivers/pci/controller/plda/ |
| A D | pcie-plda-host.c | 65 u32 bitpos = data->hwirq; in plda_msi_bottom_irq_ack() local
67 writel_relaxed(BIT(bitpos), bridge_base_addr + ISTATUS_MSI); in plda_msi_bottom_irq_ack()
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| /drivers/net/wireless/realtek/rtw88/ |
| A D | coex.h | 386 void rtw_coex_write_scbd(struct rtw_dev *rtwdev, u16 bitpos, bool set);
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| A D | coex.c | 366 void rtw_coex_write_scbd(struct rtw_dev *rtwdev, u16 bitpos, bool set) in rtw_coex_write_scbd() argument
381 if (!chip->new_scbd10_def && (bitpos & COEX_SCBD_FIX2M)) { in rtw_coex_write_scbd()
388 val |= bitpos; in rtw_coex_write_scbd()
390 val &= ~bitpos; in rtw_coex_write_scbd()
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| /drivers/net/wireless/broadcom/brcm80211/brcmsmac/ |
| A D | dma.c | 457 u8 bitpos = 0; in dma_align_sizetobits() local
459 bitpos++; in dma_align_sizetobits()
460 return bitpos; in dma_align_sizetobits()
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