| /drivers/gpu/drm/radeon/ |
| A D | dce6_afmt.c | 35 u32 block_offset, u32 reg) in dce6_endpoint_rreg() argument
41 WREG32(AZ_F0_CODEC_ENDPOINT_INDEX + block_offset, reg); in dce6_endpoint_rreg()
42 r = RREG32(AZ_F0_CODEC_ENDPOINT_DATA + block_offset); in dce6_endpoint_rreg()
49 u32 block_offset, u32 reg, u32 v) in dce6_endpoint_wreg() argument
55 WREG32(AZ_F0_CODEC_ENDPOINT_INDEX + block_offset, reg); in dce6_endpoint_wreg()
57 WREG32(AZ_F0_CODEC_ENDPOINT_INDEX + block_offset, in dce6_endpoint_wreg()
59 WREG32(AZ_F0_CODEC_ENDPOINT_DATA + block_offset, v); in dce6_endpoint_wreg()
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| /drivers/phy/cadence/ |
| A D | phy-cadence-sierra.c | 70 ((0x4000 << (block_offset)) + \
208 #define SIERRA_PHY_PCS_COMMON_OFFSET(block_offset) \ argument
209 (0xc000 << (block_offset))
215 ((0xD000 << (block_offset)) + \
221 #define SIERRA_PHY_PMA_COMMON_OFFSET(block_offset) \ argument
222 (0xE000 << (block_offset))
227 ((0xF000 << (block_offset)) + \
979 u32 block_offset, u8 reg_offset_shift, in cdns_regmap_init() argument
989 ctx->base = base + block_offset; in cdns_regmap_init()
1082 u32 block_offset; in cdns_regmap_init_blocks() local
[all …]
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| A D | phy-cadence-torrent.c | 42 ((0x4000 << (block_offset)) + \
46 ((0x8000 << (block_offset)) + \
50 (0xC000 << (block_offset))
53 ((0xD000 << (block_offset)) + \
57 (0xE000 << (block_offset))
2108 u32 block_offset, in cdns_regmap_init() argument
2119 ctx->base = base + block_offset; in cdns_regmap_init()
2216 u32 block_offset; in cdns_torrent_dp_regmap_init() local
2220 block_offset = TORRENT_DPTX_PHY_OFFSET; in cdns_torrent_dp_regmap_init()
2239 u32 block_offset; in cdns_torrent_regmap_init() local
[all …]
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| /drivers/md/ |
| A D | dm-verity-fec.c | 115 unsigned int block_offset, int neras) in fec_decode_bufs() argument
124 par = fec_read_parity(v, rsb, block_offset, &offset, in fec_decode_bufs()
146 fio->output[block_offset] = block[byte_index]; in fec_decode_bufs()
148 block_offset++; in fec_decode_bufs()
149 if (block_offset >= 1 << v->data_dev_block_bits) in fec_decode_bufs()
166 par = fec_read_parity(v, rsb, block_offset, &offset, in fec_decode_bufs()
206 u64 rsb, u64 target, unsigned int block_offset, in fec_read_bufs() argument
293 k = fec_buffer_rs_index(n, j) + block_offset; in fec_read_bufs()
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| /drivers/media/platform/amlogic/c3/isp/ |
| A D | c3-isp-params.c | 564 size_t block_offset = 0; in c3_isp_params_cfg_blocks() local
570 while (block_offset < config->data_size) { in c3_isp_params_cfg_blocks()
575 &config->data[block_offset]; in c3_isp_params_cfg_blocks()
580 block_offset += block->header.size; in c3_isp_params_cfg_blocks()
778 size_t block_offset = 0; in c3_isp_params_vb2_buf_prepare() local
824 &cfg->data[block_offset]; in c3_isp_params_vb2_buf_prepare()
854 block_offset += block->size; in c3_isp_params_vb2_buf_prepare()
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| /drivers/accel/habanalabs/common/ |
| A D | security.c | 226 const u32 pb_blocks[], u32 block_offset, int array_size) in hl_ack_pb_security_violations() argument
232 block_base = pb_blocks[i] + block_offset; in hl_ack_pb_security_violations()
254 struct hl_block_glbl_sec sgs_array[], u32 block_offset, in hl_config_glbl_sec() argument
264 sgs_base = block_offset + pb_blocks[i] + in hl_config_glbl_sec()
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| A D | habanalabs.h | 4198 struct hl_block_glbl_sec sgs_array[], u32 block_offset,
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| /drivers/md/dm-vdo/indexer/ |
| A D | io-factory.h | 37 int __must_check uds_make_bufio(struct io_factory *factory, off_t block_offset,
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| A D | io-factory.c | 97 int uds_make_bufio(struct io_factory *factory, off_t block_offset, size_t block_size, in uds_make_bufio() argument
107 dm_bufio_set_sector_offset(client, block_offset * SECTORS_PER_BLOCK); in uds_make_bufio()
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| /drivers/net/ethernet/mellanox/mlx5/core/lib/ |
| A D | hv_vhca.c | 340 int block_offset = 0; in mlx5_hv_vhca_agent_write() local
350 len, &block_offset); in mlx5_hv_vhca_agent_write()
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| /drivers/soundwire/ |
| A D | generic_bandwidth_allocation.c | 44 port_bo = t_data->block_offset; in sdw_compute_slave_ports()
83 port_bo = t_data->block_offset; in sdw_compute_slave_ports()
179 t_data.block_offset = *port_bo; in sdw_compute_master_ports()
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| A D | bus.h | 170 int block_offset; member
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| A D | amd_manager.c | 472 t_data.block_offset = port_bo; in amd_sdw_compute_params()
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| /drivers/input/rmi4/ |
| A D | rmi_f34.h | 134 __le16 block_offset; member
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| /drivers/media/platform/rockchip/rkisp1/ |
| A D | rkisp1-params.c | 2220 size_t block_offset = 0; in rkisp1_ext_params_config() local
2226 while (block_offset < cfg->data_size) { in rkisp1_ext_params_config()
2231 &cfg->data[block_offset]; in rkisp1_ext_params_config()
2232 block_offset += block->header.size; in rkisp1_ext_params_config()
2654 size_t block_offset = 0; in rkisp1_params_prepare_ext_params() local
2705 &cfg->data[block_offset]; in rkisp1_params_prepare_ext_params()
2735 block_offset += block->size; in rkisp1_params_prepare_ext_params()
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| /drivers/dma/ |
| A D | fsl-qdma.c | 137 (((fsl_qdma_engine)->block_offset) * (x))
231 int block_offset; member
1179 fsl_qdma->block_offset = blk_off; in fsl_qdma_probe()
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| /drivers/gpu/drm/amd/amdgpu/ |
| A D | dce_v8_0.c | 124 u32 block_offset, u32 reg) in dce_v8_0_audio_endpt_rreg() argument
130 WREG32(mmAZALIA_F0_CODEC_ENDPOINT_INDEX + block_offset, reg); in dce_v8_0_audio_endpt_rreg()
131 r = RREG32(mmAZALIA_F0_CODEC_ENDPOINT_DATA + block_offset); in dce_v8_0_audio_endpt_rreg()
138 u32 block_offset, u32 reg, u32 v) in dce_v8_0_audio_endpt_wreg() argument
143 WREG32(mmAZALIA_F0_CODEC_ENDPOINT_INDEX + block_offset, reg); in dce_v8_0_audio_endpt_wreg()
144 WREG32(mmAZALIA_F0_CODEC_ENDPOINT_DATA + block_offset, v); in dce_v8_0_audio_endpt_wreg()
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| A D | dce_v6_0.c | 136 u32 block_offset, u32 reg) in dce_v6_0_audio_endpt_rreg() argument
142 WREG32(mmAZALIA_F0_CODEC_ENDPOINT_INDEX + block_offset, reg); in dce_v6_0_audio_endpt_rreg()
143 r = RREG32(mmAZALIA_F0_CODEC_ENDPOINT_DATA + block_offset); in dce_v6_0_audio_endpt_rreg()
150 u32 block_offset, u32 reg, u32 v) in dce_v6_0_audio_endpt_wreg() argument
155 WREG32(mmAZALIA_F0_CODEC_ENDPOINT_INDEX + block_offset, in dce_v6_0_audio_endpt_wreg()
157 WREG32(mmAZALIA_F0_CODEC_ENDPOINT_DATA + block_offset, v); in dce_v6_0_audio_endpt_wreg()
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| A D | dce_v10_0.c | 173 u32 block_offset, u32 reg) in dce_v10_0_audio_endpt_rreg() argument
179 WREG32(mmAZALIA_F0_CODEC_ENDPOINT_INDEX + block_offset, reg); in dce_v10_0_audio_endpt_rreg()
180 r = RREG32(mmAZALIA_F0_CODEC_ENDPOINT_DATA + block_offset); in dce_v10_0_audio_endpt_rreg()
187 u32 block_offset, u32 reg, u32 v) in dce_v10_0_audio_endpt_wreg() argument
192 WREG32(mmAZALIA_F0_CODEC_ENDPOINT_INDEX + block_offset, reg); in dce_v10_0_audio_endpt_wreg()
193 WREG32(mmAZALIA_F0_CODEC_ENDPOINT_DATA + block_offset, v); in dce_v10_0_audio_endpt_wreg()
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| A D | dce_v11_0.c | 197 u32 block_offset, u32 reg) in dce_v11_0_audio_endpt_rreg() argument
203 WREG32(mmAZALIA_F0_CODEC_ENDPOINT_INDEX + block_offset, reg); in dce_v11_0_audio_endpt_rreg()
204 r = RREG32(mmAZALIA_F0_CODEC_ENDPOINT_DATA + block_offset); in dce_v11_0_audio_endpt_rreg()
211 u32 block_offset, u32 reg, u32 v) in dce_v11_0_audio_endpt_wreg() argument
216 WREG32(mmAZALIA_F0_CODEC_ENDPOINT_INDEX + block_offset, reg); in dce_v11_0_audio_endpt_wreg()
217 WREG32(mmAZALIA_F0_CODEC_ENDPOINT_DATA + block_offset, v); in dce_v11_0_audio_endpt_wreg()
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| /drivers/md/dm-vdo/ |
| A D | slab-depot.c | 1186 size_t block_offset; in write_reference_block() local
1194 block_offset = (block - block->slab->reference_blocks); in write_reference_block()
1195 pbn = (block->slab->ref_counts_origin + block_offset); in write_reference_block()
2341 u32 block_offset = block - block->slab->reference_blocks; in load_reference_block_group() local
2342 u32 max_block_count = block->slab->reference_block_count - block_offset; in load_reference_block_group()
2346 vdo_submit_metadata_vio_with_size(vio, block->slab->ref_counts_origin + block_offset, in load_reference_block_group()
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| /drivers/infiniband/core/ |
| A D | verbs.c | 3114 unsigned int block_offset; in __rdma_block_iter_next() local
3121 block_offset = biter->__dma_addr & (BIT_ULL(biter->__pg_bit) - 1); in __rdma_block_iter_next()
3122 delta = BIT_ULL(biter->__pg_bit) - block_offset; in __rdma_block_iter_next()
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| /drivers/net/ethernet/intel/i40e/ |
| A D | i40e_main.c | 10737 u16 block_offset = 0xffff; in i40e_get_oem_version() local
10752 i40e_read_nvm_word(hw, I40E_SR_NVM_OEM_VERSION_PTR, &block_offset); in i40e_get_oem_version()
10753 if (block_offset == 0xffff) in i40e_get_oem_version()
10757 i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_LENGTH_OFFSET, in i40e_get_oem_version()
10763 i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_CAPABILITIES_OFFSET, in i40e_get_oem_version()
10768 i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_GEN_OFFSET, in i40e_get_oem_version()
10770 i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_RELEASE_OFFSET, in i40e_get_oem_version()
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