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Searched refs:bpc (Results 1 – 25 of 153) sorted by relevance

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/drivers/pwm/
A Dpwm-berlin.c83 cycles = clk_get_rate(bpc->clk); in berlin_pwm_config()
201 struct berlin_pwm_chip *bpc; in berlin_pwm_probe() local
207 bpc = to_berlin_pwm_chip(chip); in berlin_pwm_probe()
209 bpc->base = devm_platform_ioremap_resource(pdev, 0); in berlin_pwm_probe()
210 if (IS_ERR(bpc->base)) in berlin_pwm_probe()
211 return PTR_ERR(bpc->base); in berlin_pwm_probe()
213 bpc->clk = devm_clk_get_enabled(&pdev->dev, NULL); in berlin_pwm_probe()
214 if (IS_ERR(bpc->clk)) in berlin_pwm_probe()
215 return PTR_ERR(bpc->clk); in berlin_pwm_probe()
243 clk_disable_unprepare(bpc->clk); in berlin_pwm_suspend()
[all …]
/drivers/gpu/drm/display/
A Ddrm_dsc_helper.c345 u8 bpc; member
359 .bpp = DSC_BPP(6), .bpc = 8,
369 .bpp = DSC_BPP(8), .bpc = 8,
379 .bpp = DSC_BPP(8), .bpc = 10,
393 .bpp = DSC_BPP(8), .bpc = 12,
404 .bpp = DSC_BPP(10), .bpc = 8,
435 .bpp = DSC_BPP(12), .bpc = 8,
507 .bpp = DSC_BPP(6), .bpc = 8,
561 .bpp = DSC_BPP(8), .bpc = 8,
783 .bpp = DSC_BPP(6), .bpc = 8,
[all …]
A Ddrm_hdmi_state_helper.c382 unsigned int format, unsigned int bpc) in sink_supports_format_bpc() argument
397 if (vic == 1 && bpc != 8) { in sink_supports_format_bpc()
488 if (bpc > 12) { in sink_supports_format_bpc()
556 unsigned int bpc, enum hdmi_colorspace fmt) in hdmi_compute_clock() argument
586 bpc); in hdmi_try_format_bpc()
591 bpc); in hdmi_try_format_bpc()
599 bpc); in hdmi_try_format_bpc()
605 bpc, conn_state->hdmi.tmds_char_rate); in hdmi_try_format_bpc()
617 unsigned int bpc; in hdmi_compute_format_bpc() local
620 for (bpc = max_bpc; bpc >= 8; bpc -= 2) { in hdmi_compute_format_bpc()
[all …]
A Ddrm_hdmi_helper.c213 unsigned int bpc, enum hdmi_colorspace fmt) in drm_hdmi_compute_mode_clock() argument
222 if (vic == 1 && bpc != 8) in drm_hdmi_compute_mode_clock()
233 if (bpc > 12) in drm_hdmi_compute_mode_clock()
243 bpc = 8; in drm_hdmi_compute_mode_clock()
257 return DIV_ROUND_CLOSEST_ULL(clock * bpc, 8); in drm_hdmi_compute_mode_clock()
/drivers/gpu/drm/amd/display/dc/dml/dsc/
A Drc_calc_fpu.c31 #define table_hash(mode, bpc, max_min) ((mode << 16) | (bpc << 8) | max_min) argument
37 #define TABLE_CASE(mode, bpc, max) case (table_hash(mode, BPC_##bpc, max)): \ argument
38 table = qp_table_##mode##_##bpc##bpc_##max; \
39 …table_size = sizeof(qp_table_##mode##_##bpc##bpc_##max)/sizeof(*qp_table_##mode##_##bpc##bpc_##max…
68 int sel = table_hash(mode, bpc, max_min); in get_qp_set()
167 enum bits_per_comp bpc, in _do_calc_rc_params() argument
189 …rc->rc_quant_incr_limit0 = ((bpc == BPC_8) ? 11 : (bpc == BPC_10 ? 15 : 19)) - ((minor_version == … in _do_calc_rc_params()
190 …rc->rc_quant_incr_limit1 = ((bpc == BPC_8) ? 11 : (bpc == BPC_10 ? 15 : 19)) - ((minor_version == … in _do_calc_rc_params()
227 rc->flatness_det_thresh = 2 << (bpc - 8); in _do_calc_rc_params()
229 get_qp_set(rc->qp_min, cm, bpc, DAL_MM_MIN, bpp); in _do_calc_rc_params()
[all …]
/drivers/gpu/drm/panel/
A Dpanel-simple.c270 connector->display_info.bpc = panel->desc->bpc; in panel_simple_get_non_edid_modes()
556 bpc = 8; in panel_simple_override_nondefault_lvds_datamapping()
559 bpc = 6; in panel_simple_override_nondefault_lvds_datamapping()
570 override_desc->bpc = bpc; in panel_simple_override_nondefault_lvds_datamapping()
696 if (desc->bpc != 6 && desc->bpc != 8) in panel_simple_probe()
714 if (desc->bpc != 6 && desc->bpc != 8) in panel_simple_probe()
814 .bpc = 8,
840 .bpc = 8,
879 .bpc = 8,
894 .bpc = 6,
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A Dpanel-edp.c370 connector->display_info.bpc = panel->desc->bpc; in panel_edp_get_non_edid_modes()
913 } else if (desc->bpc != 6 && desc->bpc != 8 && desc->bpc != 10) { in panel_edp_probe()
1007 .bpc = 6,
1043 .bpc = 6,
1070 .bpc = 6,
1097 .bpc = 6,
1132 .bpc = 8,
1175 .bpc = 8,
1206 .bpc = 6,
1246 .bpc = 6,
[all …]
A Dpanel-boe-himax8279d.c31 unsigned int bpc; member
210 connector->display_info.bpc = pinfo->desc->bpc; in boe_panel_get_modes()
501 .bpc = 8,
801 .bpc = 8,
A Dpanel-seiko-43wvf1g.c30 unsigned int bpc; member
112 connector->display_info.bpc = panel->desc->bpc; in seiko_panel_get_fixed_modes()
263 .bpc = 8,
A Dpanel-innolux-p079zca.c24 unsigned int bpc; member
156 .bpc = 8,
321 .bpc = 8,
356 connector->display_info.bpc = innolux->desc->bpc; in innolux_panel_get_modes()
/drivers/gpu/drm/i915/display/
A Dintel_qp_tables.c449 if (bpc == (_bpc)) { \
451 return rc_range_##_minmax##qp420_##_bpc##bpc[_row][_col]; \
453 return rc_range_##_minmax##qp444_##_bpc##bpc[_row][_col]; \
457 u8 intel_lookup_range_min_qp(int bpc, int buf_i, int bpp_i, bool is_420) in intel_lookup_range_min_qp() argument
463 MISSING_CASE(bpc); in intel_lookup_range_min_qp()
467 u8 intel_lookup_range_max_qp(int bpc, int buf_i, int bpp_i, bool is_420) in intel_lookup_range_max_qp() argument
473 MISSING_CASE(bpc); in intel_lookup_range_max_qp()
A Dintel_hdmi.c1927 switch (bpc) { in intel_hdmi_source_bpc_possible()
1935 MISSING_CASE(bpc); in intel_hdmi_source_bpc_possible()
1948 switch (bpc) { in intel_hdmi_sink_bpc_possible()
1982 int bpc; in intel_hdmi_mode_clock_valid() local
1989 for (bpc = 12; bpc >= 8; bpc -= 2) { in intel_hdmi_mode_clock_valid()
2117 int bpc; in intel_hdmi_compute_bpc() local
2131 bpc = 8; in intel_hdmi_compute_bpc()
2133 for (; bpc >= 8; bpc -= 2) { in intel_hdmi_compute_bpc()
2141 return bpc; in intel_hdmi_compute_bpc()
2161 if (bpc < 0) in intel_hdmi_compute_clock()
[all …]
A Dintel_qp_tables.h11 u8 intel_lookup_range_min_qp(int bpc, int buf_i, int bpp_i, bool is_420);
12 u8 intel_lookup_range_max_qp(int bpc, int buf_i, int bpp_i, bool is_420);
A Dintel_hdmi.h54 int bpc, bool has_hdmi_sink);
55 int intel_hdmi_tmds_clock(int clock, int bpc, enum intel_output_format sink_format);
/drivers/gpu/drm/mediatek/
A Dmtk_disp_drv.h19 unsigned int bpc, struct cmdq_pkt *cmdq_pkt);
30 unsigned int bpc, struct cmdq_pkt *cmdq_pkt);
39 unsigned int bpc, struct cmdq_pkt *cmdq_pkt);
43 unsigned int bpc, unsigned int cfg,
58 unsigned int bpc, struct cmdq_pkt *cmdq_pkt);
68 unsigned int bpc, struct cmdq_pkt *cmdq_pkt);
72 unsigned int h, unsigned int vrefresh, unsigned int bpc,
86 unsigned int bpc, struct cmdq_pkt *cmdq_pkt);
124 unsigned int bpc, struct cmdq_pkt *cmdq_pkt);
148 unsigned int bpc, struct cmdq_pkt *cmdq_pkt);
A Dmtk_ddp_comp.c129 unsigned int bpc, unsigned int cfg, in mtk_dither_set_common() argument
133 if (bpc == 0) in mtk_dither_set_common()
136 if (bpc >= MTK_MIN_BPC) { in mtk_dither_set_common()
140 DITHER_LSB_ERR_SHIFT_R(MTK_MAX_BPC - bpc) | in mtk_dither_set_common()
141 DITHER_ADD_LSHIFT_R(MTK_MAX_BPC - bpc) | in mtk_dither_set_common()
145 DITHER_LSB_ERR_SHIFT_B(MTK_MAX_BPC - bpc) | in mtk_dither_set_common()
146 DITHER_ADD_LSHIFT_B(MTK_MAX_BPC - bpc) | in mtk_dither_set_common()
148 DITHER_ADD_LSHIFT_G(MTK_MAX_BPC - bpc), in mtk_dither_set_common()
192 unsigned int bpc, struct cmdq_pkt *cmdq_pkt) in mtk_dsc_config() argument
222 unsigned int bpc, struct cmdq_pkt *cmdq_pkt) in mtk_od_config() argument
[all …]
/drivers/gpu/drm/amd/amdgpu/
A Damdgpu_connectors.c105 int bpc = 8; in amdgpu_connector_get_monitor_bpc() local
114 bpc = connector->display_info.bpc; in amdgpu_connector_get_monitor_bpc()
122 bpc = connector->display_info.bpc; in amdgpu_connector_get_monitor_bpc()
131 bpc = connector->display_info.bpc; in amdgpu_connector_get_monitor_bpc()
137 bpc = connector->display_info.bpc; in amdgpu_connector_get_monitor_bpc()
146 bpc = 6; in amdgpu_connector_get_monitor_bpc()
148 bpc = 8; in amdgpu_connector_get_monitor_bpc()
163 bpc = 12; in amdgpu_connector_get_monitor_bpc()
190 bpc = 8; in amdgpu_connector_get_monitor_bpc()
198 bpc = 8; in amdgpu_connector_get_monitor_bpc()
[all …]
A Datombios_crtc.c317 int bpc = amdgpu_crtc->bpc; in amdgpu_atombios_crtc_adjust_pll() local
358 switch (bpc) { in amdgpu_atombios_crtc_adjust_pll()
585 int bpc, in amdgpu_atombios_crtc_program_pll() argument
654 switch (bpc) { in amdgpu_atombios_crtc_program_pll()
685 switch (bpc) { in amdgpu_atombios_crtc_program_pll()
713 switch (bpc) { in amdgpu_atombios_crtc_program_pll()
756 amdgpu_crtc->bpc = 8; in amdgpu_atombios_crtc_prepare_pll()
772 amdgpu_crtc->bpc = amdgpu_connector_get_monitor_bpc(connector); in amdgpu_atombios_crtc_prepare_pll()
831 (amdgpu_crtc->bpc > 8)) in amdgpu_atombios_crtc_set_pll()
862 amdgpu_crtc->bpc, amdgpu_crtc->ss_enabled, &amdgpu_crtc->ss); in amdgpu_atombios_crtc_set_pll()
/drivers/gpu/drm/radeon/
A Dradeon_connectors.c105 int bpc = 8; in radeon_get_monitor_bpc() local
114 bpc = connector->display_info.bpc; in radeon_get_monitor_bpc()
122 bpc = connector->display_info.bpc; in radeon_get_monitor_bpc()
131 bpc = connector->display_info.bpc; in radeon_get_monitor_bpc()
137 bpc = connector->display_info.bpc; in radeon_get_monitor_bpc()
146 bpc = 6; in radeon_get_monitor_bpc()
148 bpc = 8; in radeon_get_monitor_bpc()
158 bpc = 8; in radeon_get_monitor_bpc()
170 bpc = 12; in radeon_get_monitor_bpc()
205 bpc = 8; in radeon_get_monitor_bpc()
[all …]
A Devergreen_hdmi.c74 int bpc = 8; in evergreen_hdmi_update_acr() local
78 bpc = radeon_crtc->bpc; in evergreen_hdmi_update_acr()
81 if (bpc > 8) in evergreen_hdmi_update_acr()
319 void dce4_hdmi_set_color_depth(struct drm_encoder *encoder, u32 offset, int bpc) in dce4_hdmi_set_color_depth() argument
330 switch (bpc) { in dce4_hdmi_set_color_depth()
337 connector->name, bpc); in dce4_hdmi_set_color_depth()
/drivers/gpu/drm/amd/display/dc/dsc/
A Drc_calc.c44 enum bits_per_comp bpc; in calc_rc_params() local
53 bpc = (pps->bits_per_component == 8) ? BPC_8 : (pps->bits_per_component == 10) in calc_rc_params()
59 _do_calc_rc_params(rc, mode, bpc, drm_bpp, is_navite_422_or_420, in calc_rc_params()
/drivers/video/console/
A Dsticon.c164 int size, i, bpc, pitch; in sticon_set_font() local
173 bpc = pitch * h; in sticon_set_font()
174 size = bpc * op->charcount; in sticon_set_font()
185 new_font->bytes_per_char = bpc; in sticon_set_font()
203 memcpy(p, data, bpc); in sticon_set_font()
205 p += bpc; in sticon_set_font()
/drivers/gpu/drm/tegra/
A Dplane.c489 bool tegra_plane_format_is_yuv(unsigned int format, unsigned int *planes, unsigned int *bpc) in tegra_plane_format_is_yuv() argument
497 if (bpc) in tegra_plane_format_is_yuv()
498 *bpc = 8; in tegra_plane_format_is_yuv()
514 if (bpc) in tegra_plane_format_is_yuv()
515 *bpc = 8; in tegra_plane_format_is_yuv()
528 if (bpc) in tegra_plane_format_is_yuv()
529 *bpc = 8; in tegra_plane_format_is_yuv()
/drivers/gpu/drm/bridge/
A Dtc358775.c279 u8 bpc; member
434 if (tc->bpc == 8) in tc_bridge_atomic_enable()
439 dsiclk = mode->crtc_clock * 3 * tc->bpc / tc->num_dsi_lanes / 1000; in tc_bridge_atomic_enable()
442 t1 = hactive * (tc->bpc * 3 / 8) / tc->num_dsi_lanes; in tc_bridge_atomic_enable()
444 t3 = ((t2 * byteclk) / 100) - (hactive * (tc->bpc * 3 / 8) / in tc_bridge_atomic_enable()
463 tc->bpc); in tc_bridge_atomic_enable()
516 tc->bpc = 8; in tc_mode_valid()
520 tc->bpc = 6; in tc_mode_valid()
/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/
A Ddml2_core_utils.c338 …double bpc = (double)display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_inde… in dml2_core_utils_get_stream_output_bpp() local
342 out_bpp[k] = bpc * 3; in dml2_core_utils_get_stream_output_bpp()
345 out_bpp[k] = bpc * 2; in dml2_core_utils_get_stream_output_bpp()
348 out_bpp[k] = bpc * 2; in dml2_core_utils_get_stream_output_bpp()
352 out_bpp[k] = bpc * 1.5; in dml2_core_utils_get_stream_output_bpp()
361 DML_LOG_VERBOSE("DML::%s: k=%d bpc=%f\n", __func__, k, bpc); in dml2_core_utils_get_stream_output_bpp()

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