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Searched refs:bpp_x16 (Results 1 – 9 of 9) sorted by relevance

/drivers/gpu/drm/i915/display/
A Dintel_link_bw.c412 int bpp_x16; in force_link_bpp_write() local
415 err = user_str_to_fxp_q4_nonneg(ubuf, len, &bpp_x16); in force_link_bpp_write()
425 if (bpp_x16 && in force_link_bpp_write()
426 (bpp_x16 < fxp_q4_from_int(min_bpp) || in force_link_bpp_write()
427 bpp_x16 > fxp_q4_from_int(intel_display_max_pipe_bpp(display)))) in force_link_bpp_write()
434 connector->link.force_bpp_x16 = bpp_x16; in force_link_bpp_write()
A Dintel_dp_mst.c178 bool ssc, int dsc_slice_count, int bpp_x16) in intel_dp_mst_bw_overhead() argument
195 bpp_x16, in intel_dp_mst_bw_overhead()
207 int bpp_x16, in intel_dp_mst_compute_m_n() argument
214 intel_link_compute_m_n(bpp_x16, crtc_state->lane_count, in intel_dp_mst_compute_m_n()
270 int bpp_x16, slots = -EINVAL; in intel_dp_mtp_tu_compute_config() local
324 for (bpp_x16 = max_bpp_x16; bpp_x16 >= min_bpp_x16; bpp_x16 -= bpp_step_x16) { in intel_dp_mtp_tu_compute_config()
336 link_bpp_x16 = dsc ? bpp_x16 : in intel_dp_mtp_tu_compute_config()
338 fxp_q4_to_int(bpp_x16))); in intel_dp_mtp_tu_compute_config()
431 crtc_state->pipe_bpp = fxp_q4_to_int(bpp_x16); in intel_dp_mtp_tu_compute_config()
433 crtc_state->dsc.compressed_bpp_x16 = bpp_x16; in intel_dp_mtp_tu_compute_config()
[all …]
A Dintel_dp.h118 int intel_dp_effective_data_rate(int pixel_clock, int bpp_x16,
150 bool intel_dp_dsc_valid_compressed_bpp(struct intel_dp *intel_dp, int bpp_x16);
A Dintel_dp.c456 int intel_dp_effective_data_rate(int pixel_clock, int bpp_x16, in intel_dp_effective_data_rate() argument
459 return DIV_ROUND_UP_ULL(mul_u32_u32(pixel_clock * bpp_x16, bw_overhead), in intel_dp_effective_data_rate()
2136 if (intel_dp->force_dsc_fractional_bpp_en && !fxp_q4_to_frac(bpp_x16)) in intel_dp_dsc_valid_compressed_bpp()
2142 if (fxp_q4_to_frac(bpp_x16)) in intel_dp_dsc_valid_compressed_bpp()
2146 if (fxp_q4_to_int(bpp_x16) == valid_dsc_bpp[i]) in intel_dp_dsc_valid_compressed_bpp()
2171 int bpp_x16; in dsc_compute_compressed_bpp() local
2189 for (bpp_x16 = max_bpp_x16; bpp_x16 >= min_bpp_x16; bpp_x16 -= bpp_step_x16) { in dsc_compute_compressed_bpp()
2190 if (!intel_dp_dsc_valid_compressed_bpp(intel_dp, bpp_x16)) in dsc_compute_compressed_bpp()
2197 bpp_x16, in dsc_compute_compressed_bpp()
2200 pipe_config->dsc.compressed_bpp_x16 = bpp_x16; in dsc_compute_compressed_bpp()
[all …]
/drivers/gpu/drm/amd/display/dc/dsc/
A Ddc_dsc.c777 struct fixed31_32 bpp_x16; in compute_bpp_x16_from_target_bandwidth() local
784 bpp_x16 = dc_fixpt_mul_int(effective_bandwidth_in_kbps, 10); in compute_bpp_x16_from_target_bandwidth()
785 bpp_x16 = dc_fixpt_div_int(bpp_x16, timing->pix_clk_100hz); in compute_bpp_x16_from_target_bandwidth()
786 bpp_x16 = dc_fixpt_from_int(dc_fixpt_floor(dc_fixpt_mul_int(bpp_x16, bpp_increment_div))); in compute_bpp_x16_from_target_bandwidth()
787 bpp_x16 = dc_fixpt_div_int(bpp_x16, bpp_increment_div); in compute_bpp_x16_from_target_bandwidth()
788 bpp_x16 = dc_fixpt_mul_int(bpp_x16, 16); in compute_bpp_x16_from_target_bandwidth()
789 return dc_fixpt_floor(bpp_x16); in compute_bpp_x16_from_target_bandwidth()
1316 uint32_t bpp_x16, uint32_t num_slices_h, bool is_dp) in dc_dsc_stream_bandwidth_in_kbps() argument
1324 bpp = dc_fixpt_from_fraction(bpp_x16, 16); in dc_dsc_stream_bandwidth_in_kbps()
/drivers/gpu/drm/amd/display/amdgpu_dm/
A Damdgpu_dm_mst_types.c898 params[i].timing->dsc_cfg.bits_per_pixel = vars[i + k].bpp_x16; in set_dsc_configs_from_fairness_vars()
1014 vars[next_index].bpp_x16 = bpp_x16_from_pbn(params[next_index], vars[next_index].pbn); in increase_dsc_bpp()
1035 vars[next_index].bpp_x16 = params[next_index].bw_range.max_target_bpp_x16; in increase_dsc_bpp()
1072 && vars[i + k].bpp_x16 == params[i].bw_range.max_target_bpp_x16 in try_disable_dsc()
1116 vars[next_index].bpp_x16 = 0; in try_disable_dsc()
1143 i, vars[i + k].dsc_enabled, vars[i + k].bpp_x16, vars[i + k].pbn); in log_dsc_params()
1243 vars[i + k].bpp_x16 = 0; in compute_mst_dsc_configs_for_link()
1265 vars[i + k].bpp_x16 = params[i].bw_range.min_target_bpp_x16; in compute_mst_dsc_configs_for_link()
1273 vars[i + k].bpp_x16 = 0; in compute_mst_dsc_configs_for_link()
A Damdgpu_dm_mst_types.h78 int bpp_x16; member
/drivers/gpu/drm/amd/display/dc/
A Ddc_dsc.h90 uint32_t bpp_x16, uint32_t num_slices_h, bool is_dp);
/drivers/gpu/drm/display/
A Ddrm_dp_helper.c4463 int bpp_x16, int symbol_size, in drm_dp_link_data_symbol_cycles() argument
4466 int cycles = DIV_ROUND_UP(pixels * bpp_x16, 16 * symbol_size * lane_count); in drm_dp_link_data_symbol_cycles()
4485 int bpp_x16, int symbol_size, bool is_mst) in drm_dp_link_symbol_cycles() argument
4491 bpp_x16, in drm_dp_link_symbol_cycles()
4530 int bpp_x16, unsigned long flags) in drm_dp_bw_overhead() argument
4537 if (lane_count == 0 || hactive == 0 || bpp_x16 == 0) { in drm_dp_bw_overhead()
4540 FXP_Q4_ARGS(bpp_x16)); in drm_dp_bw_overhead()
4578 bpp_x16, symbol_size, in drm_dp_bw_overhead()
4583 hactive * bpp_x16); in drm_dp_bw_overhead()

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