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Searched refs:calc (Results 1 – 25 of 28) sorted by relevance

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/drivers/soc/samsung/
A Ds3c-pm-check.c167 u32 calc; in s3c_pm_runcheck() local
169 stkpage = (void *)((u32)&calc & ~PAGE_MASK); in s3c_pm_runcheck()
192 calc = crc32_le(~0, ptr, left); in s3c_pm_runcheck()
193 if (calc != *val) { in s3c_pm_runcheck()
195 "%08lx (%08x vs %08x)\n", addr, calc, *val); in s3c_pm_runcheck()
198 addr, calc, *val); in s3c_pm_runcheck()
/drivers/nvmem/layouts/
A Du-boot-env.c100 uint32_t calc; in u_boot_env_parse() local
151 calc = crc32_le(~0, buf + crc32_data_offset, crc32_data_len) ^ ~0L; in u_boot_env_parse()
152 if (calc != crc32) { in u_boot_env_parse()
153 dev_err(dev, "Invalid calculated CRC32: 0x%08x (expected: 0x%08x)\n", calc, crc32); in u_boot_env_parse()
/drivers/i2c/busses/
A Di2c-rk3x.c877 struct rk3x_i2c_calced_timings calc; in rk3x_i2c_adapt_div() local
883 ret = i2c->soc_data->calc_timings(clk_rate, t, &calc); in rk3x_i2c_adapt_div()
891 val |= calc.tuning; in rk3x_i2c_adapt_div()
893 i2c_writel(i2c, (calc.div_high << 16) | (calc.div_low & 0xffff), in rk3x_i2c_adapt_div()
899 t_low_ns = div_u64(((u64)calc.div_low + 1) * 8 * 1000000000, clk_rate); in rk3x_i2c_adapt_div()
900 t_high_ns = div_u64(((u64)calc.div_high + 1) * 8 * 1000000000, in rk3x_i2c_adapt_div()
931 struct rk3x_i2c_calced_timings calc; in rk3x_i2c_clk_notifier_cb() local
941 &calc) != 0) in rk3x_i2c_clk_notifier_cb()
/drivers/gpu/drm/amd/amdgpu/
A Damdgpu_cper.c438 goto calc; in amdgpu_cper_ring_get_ent_sz()
443 goto calc; in amdgpu_cper_ring_get_ent_sz()
449 goto calc; in amdgpu_cper_ring_get_ent_sz()
453 calc: in amdgpu_cper_ring_get_ent_sz()
/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
A Dg84.c29 .calc = nv50_clk_calc,
A Dpriv.h11 int (*calc)(struct nvkm_clk *, struct nvkm_cstate *); member
A Dbase.c195 ret = clk->func->calc(clk, cstate); in nvkm_cstate_prog()
285 if (fb && fb->ram && fb->ram->func->calc) { in nvkm_pstate_prog()
289 ret = ram->func->calc(ram, khz); in nvkm_pstate_prog()
A Dgm20b.c865 base->func->calc(base, &base->func->pstates[0].base); in gm20b_clk_init()
880 .calc = gk20a_clk_calc,
898 .calc = gm20b_clk_calc,
A Dgk20a.c585 base->func->calc(base, &base->func->pstates[0].base); in gk20a_clk_init()
600 .calc = gk20a_clk_calc,
A Dnv40.c207 .calc = nv40_clk_calc,
A Dmcp77.c398 .calc = mcp77_clk_calc,
A Dgt215.c523 .calc = gt215_clk_calc,
A Dnv50.c545 .calc = nv50_clk_calc,
A Dgf100.c451 .calc = gf100_clk_calc,
A Dgk104.c488 .calc = gk104_clk_calc,
/drivers/gpu/drm/nouveau/nvkm/subdev/fb/
A Dramgm107.c42 .calc = gk104_ram_calc,
A Dramgf108.c51 .calc = gf100_ram_calc,
A Dramgm200.c57 .calc = gk104_ram_calc,
A Dramnv40.c185 .calc = nv40_ram_calc,
A Dramgt215.c194 ret = ram->base.func->calc(&ram->base, (u32) M0205T.freq * 1000); in gt215_link_train()
237 ram->base.func->calc(&ram->base, clk_current); in gt215_link_train()
934 .calc = gt215_ram_calc,
A Dramnv50.c497 .calc = nv50_ram_calc,
A Dramgf100.c663 .calc = gf100_ram_calc,
/drivers/gpu/drm/nouveau/nvkm/engine/disp/
A Dnv50.c1193 u32 calc, diff; in nv50_disp_super_2_2_dp() local
1197 calc = VTUi * symbol; in nv50_disp_super_2_2_dp()
1198 diff = tu_valid - calc; in nv50_disp_super_2_2_dp()
1207 calc += symbol - (symbol / VTUf); in nv50_disp_super_2_2_dp()
1211 calc += symbol; in nv50_disp_super_2_2_dp()
1216 calc += symbol / VTUf; in nv50_disp_super_2_2_dp()
1219 diff = calc - tu_valid; in nv50_disp_super_2_2_dp()
/drivers/gpu/drm/nouveau/include/nvkm/subdev/
A Dfb.h178 int (*calc)(struct nvkm_ram *, u32 freq); member
/drivers/gpu/drm/nouveau/
A Dnouveau_display.c70 calc(int blanks, int blanke, int total, int line) in calc() function
109 *vpos = calc(args.vblanks, args.vblanke, args.vtotal, args.vline); in nouveau_display_scanoutpos_head()

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