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Searched refs:cclk (Results 1 – 25 of 29) sorted by relevance

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/drivers/clk/ti/
A Dcomposite.c126 if (!cclk->comp_nodes[i]) in _register_composite()
132 cclk->comp_nodes[i]->name, node); in _register_composite()
145 cclk->comp_clks[comp->type] = comp; in _register_composite()
148 cclk->comp_nodes[i] = NULL; in _register_composite()
153 comp = cclk->comp_clks[i]; in _register_composite()
190 if (!cclk->comp_clks[i]) in _register_composite()
194 kfree(cclk->comp_clks[i]); in _register_composite()
197 kfree(cclk); in _register_composite()
204 struct clk_hw_omap_comp *cclk; in of_ti_composite_clk_setup() local
214 cclk = kzalloc(sizeof(*cclk), GFP_KERNEL); in of_ti_composite_clk_setup()
[all …]
/drivers/clk/sunxi-ng/
A Dccu_common.c124 struct ccu_common *cclk = desc->ccu_clks[i]; in sunxi_ccu_probe() local
126 if (!cclk) in sunxi_ccu_probe()
129 cclk->base = reg; in sunxi_ccu_probe()
130 cclk->lock = &ccu->lock; in sunxi_ccu_probe()
152 struct ccu_common *cclk = desc->ccu_clks[i]; in sunxi_ccu_probe() local
154 if (!cclk) in sunxi_ccu_probe()
157 if (cclk->max_rate) in sunxi_ccu_probe()
158 clk_hw_set_rate_range(&cclk->hw, cclk->min_rate, in sunxi_ccu_probe()
159 cclk->max_rate); in sunxi_ccu_probe()
161 WARN(cclk->min_rate, in sunxi_ccu_probe()
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/drivers/clk/sprd/
A Dcommon.c27 struct sprd_clk_common *cclk; in sprd_clk_set_regmap() local
30 cclk = desc->clk_clks[i]; in sprd_clk_set_regmap()
31 if (!cclk) in sprd_clk_set_regmap()
34 cclk->regmap = regmap; in sprd_clk_set_regmap()
/drivers/iio/adc/
A Dti-adc12138.c42 struct clk *cclk; member
438 adc->cclk = devm_clk_get(&spi->dev, NULL); in adc12138_probe()
439 if (IS_ERR(adc->cclk)) in adc12138_probe()
440 return PTR_ERR(adc->cclk); in adc12138_probe()
462 ret = clk_prepare_enable(adc->cclk); in adc12138_probe()
500 clk_disable_unprepare(adc->cclk); in adc12138_probe()
515 clk_disable_unprepare(adc->cclk); in adc12138_remove()
/drivers/spi/
A Dspi-qup.c132 struct clk *cclk; /* core clock */ member
1026 struct clk *iclk, *cclk; in spi_qup_probe() local
1043 cclk = devm_clk_get(dev, "core"); in spi_qup_probe()
1044 if (IS_ERR(cclk)) in spi_qup_probe()
1045 return PTR_ERR(cclk); in spi_qup_probe()
1106 controller->cclk = cclk; in spi_qup_probe()
1124 ret = clk_prepare_enable(cclk); in spi_qup_probe()
1132 clk_disable_unprepare(cclk); in spi_qup_probe()
1206 clk_disable_unprepare(cclk); in spi_qup_probe()
1227 clk_disable_unprepare(controller->cclk); in spi_qup_pm_suspend_runtime()
[all …]
/drivers/net/pcs/
A Dpcs-xpcs-plat.c33 struct clk *cclk; member
283 pxpcs->cclk = devm_clk_get_optional(dev, "csr"); in xpcs_plat_init_clk()
284 if (IS_ERR(pxpcs->cclk)) in xpcs_plat_init_clk()
285 return dev_err_probe(dev, PTR_ERR(pxpcs->cclk), in xpcs_plat_init_clk()
408 clk_disable_unprepare(pxpcs->cclk); in xpcs_plat_pm_runtime_suspend()
417 return clk_prepare_enable(pxpcs->cclk); in xpcs_plat_pm_runtime_resume()
/drivers/clk/rockchip/
A Dclk-cpu.c308 struct clk *clk, *cclk; in rockchip_clk_register_cpuclk() local
380 cclk = clk_register(NULL, &cpuclk->hw); in rockchip_clk_register_cpuclk()
381 if (IS_ERR(cclk)) { in rockchip_clk_register_cpuclk()
383 ret = PTR_ERR(cclk); in rockchip_clk_register_cpuclk()
387 return cclk; in rockchip_clk_register_cpuclk()
/drivers/net/ethernet/chelsio/cxgb4vf/
A Dt4vf_common.h198 u32 cclk; /* Core Clock (KHz) */ member
311 return adapter->params.vpd.cclk / 1000; in core_ticks_per_usec()
317 return (us * adapter->params.vpd.cclk) / 1000; in us_to_core_ticks()
323 return (ticks * 1000) / adapter->params.vpd.cclk; in core_ticks_to_us()
A Dt4vf_hw.c977 vpd_params->cclk = vals[0]; in t4vf_get_vpd_params()
2156 adapter->params.vpd.cclk = 50000; in t4vf_prep_adapter()
/drivers/net/can/m_can/
A Dm_can_platform.c143 mcan_class->can.clock.freq = clk_get_rate(mcan_class->cclk); in m_can_plat_probe()
192 clk_disable_unprepare(mcan_class->cclk); in m_can_runtime_suspend()
208 err = clk_prepare_enable(mcan_class->cclk); in m_can_runtime_resume()
A Dtcan4x5x-core.c437 mcan_class->cclk = devm_clk_get(mcan_class->dev, "cclk"); in tcan4x5x_can_probe()
438 if (IS_ERR(mcan_class->cclk)) { in tcan4x5x_can_probe()
442 freq = clk_get_rate(mcan_class->cclk); in tcan4x5x_can_probe()
A Dm_can.h88 struct clk *cclk; member
A Dm_can.c2335 cdev->cclk = devm_clk_get(cdev->dev, "cclk"); in m_can_class_get_clocks()
2337 if (IS_ERR(cdev->hclk) || IS_ERR(cdev->cclk)) { in m_can_class_get_clocks()
/drivers/scsi/csiostor/
A Dcsio_hw.h265 uint32_t cclk; member
582 return (ticks * 1000 + hw->vpd.cclk/2) / hw->vpd.cclk; in csio_core_ticks_to_us()
588 return (us * hw->vpd.cclk) / 1000; in csio_us_to_core_ticks()
/drivers/mmc/host/
A Dmmci_stm32_sdmmc.c313 host->cclk = host->mclk; in mmci_sdmmc_set_clkreg()
318 host->cclk = host->mclk / (2 * clk); in mmci_sdmmc_set_clkreg()
327 host->cclk = host->mclk / (2 * clk); in mmci_sdmmc_set_clkreg()
332 host->mmc->actual_clock = host->cclk; in mmci_sdmmc_set_clkreg()
A Dmmci.c394 if (host->cclk < 25000000) in mmci_reg_delay()
446 host->cclk = 0; in mmci_set_clkreg()
450 host->cclk = host->mclk; in mmci_set_clkreg()
455 host->cclk = host->mclk; in mmci_set_clkreg()
466 host->cclk = host->mclk / (clk + 2); in mmci_set_clkreg()
475 host->cclk = host->mclk / (2 * (clk + 1)); in mmci_set_clkreg()
485 host->mmc->actual_clock = host->cclk; in mmci_set_clkreg()
1250 clks = (unsigned long long)data->timeout_ns * host->cclk; in mmci_start_data()
1358 clks = (unsigned long long)host->mmc->max_busy_timeout * host->cclk; in mmci_start_command()
1360 clks = (unsigned long long)cmd->busy_timeout * host->cclk; in mmci_start_command()
A Dmmci.h427 unsigned int cclk; member
/drivers/clk/tegra/
A DMakefile17 obj-y += clk-tegra-super-cclk.o
/drivers/net/ethernet/chelsio/cxgb4/
A Dcxgb4.h392 unsigned int cclk; member
1683 return adap->params.vpd.cclk / 1000; in core_ticks_per_usec()
1689 return (us * adap->params.vpd.cclk) / 1000; in us_to_core_ticks()
1696 return ((ticks * 1000 + adapter->params.vpd.cclk/2) / in core_ticks_to_us()
1697 adapter->params.vpd.cclk); in core_ticks_to_us()
A Dcxgb4_uld.c618 lld->cclk_ps = 1000000000 / adap->params.vpd.cclk; in uld_init()
A Dcudbg_lib.c1637 if (!padap->params.vpd.cclk) in cudbg_collect_hw_sched()
1970 if (!padap->params.vpd.cclk) in cudbg_collect_clk_info()
1979 clk_info_buff->cclk_ps = 1000000000 / padap->params.vpd.cclk; /* psec */ in cudbg_collect_clk_info()
A Dt4_hw.c2845 p->cclk = cclk_val; in t4_get_vpd_params()
5893 u64 v = bytes256 * adap->params.vpd.cclk; in chan_rate()
9187 adapter->params.vpd.cclk = 50000; in t4_prep_adapter()
10299 v = (adap->params.vpd.cclk * 1000) / cpt; /* ticks/s */ in t4_get_tx_sched()
/drivers/net/ethernet/chelsio/cxgb3/
A Dcommon.h355 unsigned int cclk; member
634 return adap->params.vpd.cclk / 1000; in core_ticks_per_usec()
A Dt3_hw.c199 u32 clkdiv = adap->params.vpd.cclk / (2 * adap->params.vpd.mdc) - 1; in mi1_init()
584 VPD_ENTRY(cclk, 6); /* core clock */
665 ret = vpdstrtouint(vpd.cclk_data, vpd.cclk_len, 10, &p->cclk); in get_vpd_params()
2975 unsigned int clk = adap->params.vpd.cclk * 1000; in t3_config_sched()
3016 tp_set_timers(adap, adap->params.vpd.cclk * 1000); in tp_init()
3502 V_I2C_CLKDIV(adapter->params.vpd.cclk / 80 - 1)); in early_hw_init()
A Dxgmac.c407 thres = (adap->params.vpd.cclk * 1000) / 15625; in t3_mac_set_mtu()

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