Searched refs:cctrl (Results 1 – 4 of 4) sorted by relevance
| /drivers/gpu/drm/nouveau/nvkm/subdev/clk/ |
| A D | mcp77.c | 35 u32 cctrl, sctrl; member
220 clk->cctrl = divs << 16; in mcp77_clk_calc()
233 clk->cctrl = (P2 + 1) << 16; in mcp77_clk_calc()
271 clk->ccoef, clk->cpost, clk->cctrl); in mcp77_clk_calc()
317 nvkm_mask(device, 0x4028, 0x00070000, clk->cctrl); in mcp77_clk_prog()
322 nvkm_wr32(device, 0x4028, 0x80000000 | clk->cctrl); in mcp77_clk_prog()
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| /drivers/mmc/host/ |
| A D | loongson2-mmc.c | 259 u32 cctrl; in loongson2_mmc_send_command() local
270 cctrl = FIELD_PREP(LOONGSON2_MMC_CCTL_INDEX, cmd->opcode); in loongson2_mmc_send_command()
271 cctrl |= LOONGSON2_MMC_CCTL_HOST | LOONGSON2_MMC_CCTL_START; in loongson2_mmc_send_command()
274 cctrl |= LOONGSON2_MMC_CCTL_CMD6; in loongson2_mmc_send_command()
277 cctrl |= LOONGSON2_MMC_CCTL_WAIT_RSP; in loongson2_mmc_send_command()
280 cctrl |= LOONGSON2_MMC_CCTL_LONG_RSP; in loongson2_mmc_send_command()
282 regmap_write(host->regmap, LOONGSON2_MMC_REG_CCTL, cctrl); in loongson2_mmc_send_command()
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| /drivers/gpu/drm/msm/hdmi/ |
| A D | hdmi_phy_8996.c | 231 u32 cctrl; in pll_calculate() local
261 cctrl = pll_get_cctrl(frac_start, false); in pll_calculate()
279 DBG("PLL_CCTRL: %u", cctrl); in pll_calculate()
291 cfg->com_pll_cctrl_mode0 = cctrl; in pll_calculate()
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| A D | hdmi_phy_8998.c | 294 u32 cctrl; in pll_calculate() local
319 cctrl = pll_get_cctrl(frac_start, false); in pll_calculate()
335 cfg->com_pll_cctrl_mode0 = cctrl; in pll_calculate()
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