Searched refs:cdclk_state (Results 1 – 9 of 9) sorted by relevance
| /drivers/gpu/drm/i915/display/ |
| A D | intel_cdclk.c | 2979 cdclk_state->actual = cdclk_state->logical; in vlv_modeset_calc_cdclk()
3008 cdclk_state->actual = cdclk_state->logical; in bdw_modeset_calc_cdclk()
3079 cdclk_state->actual = cdclk_state->logical; in skl_modeset_calc_cdclk()
3118 cdclk_state->actual = cdclk_state->logical; in bxt_modeset_calc_cdclk()
3144 cdclk_state = kmemdup(obj->state, sizeof(*cdclk_state), GFP_KERNEL); in intel_cdclk_duplicate_state()
3145 if (!cdclk_state) in intel_cdclk_duplicate_state()
3151 return &cdclk_state->base; in intel_cdclk_duplicate_state()
3172 if (IS_ERR(cdclk_state)) in intel_atomic_get_cdclk_state()
3218 if (IS_ERR(cdclk_state)) in intel_cdclk_state_set_joined_mbus()
3231 cdclk_state = kzalloc(sizeof(*cdclk_state), GFP_KERNEL); in intel_cdclk_init()
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| A D | intel_cdclk.h | 63 int intel_cdclk_logical(const struct intel_cdclk_state *cdclk_state);
64 int intel_cdclk_actual(const struct intel_cdclk_state *cdclk_state);
65 int intel_cdclk_actual_voltage_level(const struct intel_cdclk_state *cdclk_state);
66 int intel_cdclk_min_cdclk(const struct intel_cdclk_state *cdclk_state, enum pipe pipe);
67 int intel_cdclk_bw_min_cdclk(const struct intel_cdclk_state *cdclk_state);
69 void intel_cdclk_force_min_cdclk(struct intel_cdclk_state *cdclk_state, int force_min_cdclk);
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| A D | hsw_ips.c | 261 const struct intel_cdclk_state *cdclk_state; in hsw_ips_compute_config() local
263 cdclk_state = intel_atomic_get_cdclk_state(state); in hsw_ips_compute_config()
264 if (IS_ERR(cdclk_state)) in hsw_ips_compute_config()
265 return PTR_ERR(cdclk_state); in hsw_ips_compute_config()
268 if (crtc_state->pixel_rate > intel_cdclk_logical(cdclk_state) * 95 / 100) in hsw_ips_compute_config()
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| A D | intel_audio.c | 942 struct intel_cdclk_state *cdclk_state; in glk_force_audio_cdclk_commit() local
950 cdclk_state = intel_atomic_get_cdclk_state(state); in glk_force_audio_cdclk_commit()
951 if (IS_ERR(cdclk_state)) in glk_force_audio_cdclk_commit()
952 return PTR_ERR(cdclk_state); in glk_force_audio_cdclk_commit()
954 intel_cdclk_force_min_cdclk(cdclk_state, enable ? 2 * 96000 : 0); in glk_force_audio_cdclk_commit()
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| A D | intel_bw.c | 1407 const struct intel_cdclk_state *cdclk_state; in intel_bw_calc_min_cdclk() local
1459 cdclk_state = intel_atomic_get_cdclk_state(state); in intel_bw_calc_min_cdclk()
1460 if (IS_ERR(cdclk_state)) in intel_bw_calc_min_cdclk()
1461 return PTR_ERR(cdclk_state); in intel_bw_calc_min_cdclk()
1471 if (new_min_cdclk <= intel_cdclk_bw_min_cdclk(cdclk_state)) in intel_bw_calc_min_cdclk()
1476 new_min_cdclk, intel_cdclk_bw_min_cdclk(cdclk_state)); in intel_bw_calc_min_cdclk()
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| A D | intel_plane.c | 304 const struct intel_cdclk_state *cdclk_state; in intel_plane_calc_min_cdclk() local
329 cdclk_state = intel_atomic_get_cdclk_state(state); in intel_plane_calc_min_cdclk()
330 if (IS_ERR(cdclk_state)) in intel_plane_calc_min_cdclk()
331 return PTR_ERR(cdclk_state); in intel_plane_calc_min_cdclk()
342 intel_cdclk_min_cdclk(cdclk_state, crtc->pipe)) in intel_plane_calc_min_cdclk()
350 intel_cdclk_min_cdclk(cdclk_state, crtc->pipe)); in intel_plane_calc_min_cdclk()
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| A D | intel_fbc.c | 1569 const struct intel_cdclk_state *cdclk_state; in intel_fbc_check_plane() local
1571 cdclk_state = intel_atomic_get_cdclk_state(state); in intel_fbc_check_plane()
1572 if (IS_ERR(cdclk_state)) in intel_fbc_check_plane()
1573 return PTR_ERR(cdclk_state); in intel_fbc_check_plane()
1575 if (crtc_state->pixel_rate >= intel_cdclk_logical(cdclk_state) * 95 / 100) { in intel_fbc_check_plane()
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| A D | skl_watermark.c | 2167 const struct intel_cdclk_state *cdclk_state; in cdclk_prefill_adjustment() local
2169 cdclk_state = intel_atomic_get_cdclk_state(state); in cdclk_prefill_adjustment()
2170 if (IS_ERR(cdclk_state)) { in cdclk_prefill_adjustment()
2171 drm_WARN_ON(display->drm, PTR_ERR(cdclk_state)); in cdclk_prefill_adjustment()
2176 2 * intel_cdclk_logical(cdclk_state))); in cdclk_prefill_adjustment()
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| A D | intel_display.c | 4162 const struct intel_cdclk_state *cdclk_state) in hsw_ips_linetime_wm() argument
4172 intel_cdclk_logical(cdclk_state)); in hsw_ips_linetime_wm()
4204 const struct intel_cdclk_state *cdclk_state; in hsw_compute_linetime_wm() local
4214 cdclk_state = intel_atomic_get_cdclk_state(state); in hsw_compute_linetime_wm()
4215 if (IS_ERR(cdclk_state)) in hsw_compute_linetime_wm()
4216 return PTR_ERR(cdclk_state); in hsw_compute_linetime_wm()
4219 cdclk_state); in hsw_compute_linetime_wm()
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