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Searched refs:cfg (Results 1 – 25 of 1436) sorted by relevance

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/drivers/phy/
A Dphy-core-mipi-dphy.c28 if (!cfg) in phy_mipi_dphy_calc_config()
48 cfg->eot = 0; in phy_mipi_dphy_calc_config()
70 cfg->ta_get = 5 * cfg->lpx; in phy_mipi_dphy_calc_config()
71 cfg->ta_go = 4 * cfg->lpx; in phy_mipi_dphy_calc_config()
72 cfg->ta_sure = cfg->lpx; in phy_mipi_dphy_calc_config()
111 if (!cfg) in phy_mipi_dphy_config_validate()
129 if (cfg->clk_settle < 95000 || cfg->clk_settle > 300000) in phy_mipi_dphy_config_validate()
138 if ((cfg->clk_prepare + cfg->clk_zero) < 300000) in phy_mipi_dphy_config_validate()
173 if (cfg->ta_get != (5 * cfg->lpx)) in phy_mipi_dphy_config_validate()
176 if (cfg->ta_go != (4 * cfg->lpx)) in phy_mipi_dphy_config_validate()
[all …]
/drivers/media/platform/samsung/exynos4-is/
A Dfimc-reg.c21 u32 cfg; in fimc_hw_reset() local
73 u32 cfg, flip; in fimc_hw_set_rotation() local
106 u32 cfg; in fimc_hw_set_target_format() local
151 u32 cfg; in fimc_hw_set_out_dma_size() local
172 u32 cfg; in fimc_hw_set_out_dma() local
316 u32 cfg; in fimc_hw_set_mainscaler() local
349 u32 cfg; in fimc_hw_enable_capture() local
375 u32 cfg = 0; in fimc_hw_set_effect() local
392 u32 cfg; in fimc_hw_set_rgb_alpha() local
425 u32 cfg; in fimc_hw_set_in_dma() local
[all …]
A Dfimc-lite-reg.c23 u32 cfg; in flite_hw_reset() local
36 cfg |= FLITE_REG_CIGCTRL_SWRST; in flite_hw_reset()
63 u32 cfg, intsrc; in flite_hw_set_interrupt_mask() local
79 cfg &= ~intsrc; in flite_hw_set_interrupt_mask()
131 u32 cfg; in flite_hw_set_source_format() local
161 u32 cfg; in flite_hw_set_window_offset() local
250 u32 cfg; in flite_hw_set_dma_window() local
268 u32 cfg; in flite_hw_set_dma_buffer() local
281 cfg |= BIT(index); in flite_hw_set_dma_buffer()
287 u32 cfg; in flite_hw_mask_dma_buffer() local
[all …]
/drivers/media/platform/samsung/exynos-gsc/
A Dgsc-regs.c22 u32 cfg; in gsc_wait_reset() local
26 if (!cfg) in gsc_wait_reset()
36 u32 cfg; in gsc_hw_set_frm_done_irq_mask() local
48 u32 cfg; in gsc_hw_set_gsc_irq_enable() local
124 u32 cfg; in gsc_hw_set_in_size() local
146 u32 cfg; in gsc_hw_set_in_image_rgb() local
167 u32 cfg; in gsc_hw_set_in_image_format() local
237 u32 cfg; in gsc_hw_set_out_size() local
266 u32 cfg; in gsc_hw_set_out_image_rgb() local
287 u32 cfg; in gsc_hw_set_out_image_format() local
[all …]
/drivers/media/platform/samsung/s3c-camif/
A Dcamif-regs.c18 u32 cfg; in camif_hw_reset() local
107 u32 cfg; in camif_hw_set_source_format() local
133 u32 cfg; in camif_hw_set_camera_crop() local
154 u32 cfg; in camif_hw_clear_fifo_overflow() local
221 u32 cfg; in camif_hw_set_out_dma_size() local
261 u32 cfg; in camif_hw_set_output_dma() local
300 u32 cfg; in camif_hw_set_target_format() local
384 u32 cfg; in camif_s3c244x_hw_set_scaler() local
431 u32 cfg; in camif_s3c64xx_hw_set_scaler() local
488 u32 cfg; in camif_hw_enable_scaler() local
[all …]
/drivers/net/ethernet/cavium/liquidio/
A Docteon_config.h121 #define CFG_GET_IQ_CFG(cfg) ((cfg)->iq) argument
122 #define CFG_GET_IQ_MAX_Q(cfg) ((cfg)->iq.max_iqs) argument
124 #define CFG_GET_IQ_INSTR_TYPE(cfg) ((cfg)->iq.instr_type) argument
125 #define CFG_GET_IQ_DB_MIN(cfg) ((cfg)->iq.db_min) argument
126 #define CFG_GET_IQ_DB_TIMEOUT(cfg) ((cfg)->iq.db_timeout) argument
128 #define CFG_GET_IQ_INTR_PKT(cfg) ((cfg)->iq.iq_intr_pkt) argument
131 #define CFG_GET_OQ_MAX_Q(cfg) ((cfg)->oq.max_oqs) argument
134 #define CFG_GET_OQ_INTR_PKT(cfg) ((cfg)->oq.oq_intr_pkt) argument
135 #define CFG_GET_OQ_INTR_TIME(cfg) ((cfg)->oq.oq_intr_time) argument
141 #define CFG_GET_NUM_NIC_PORTS(cfg) ((cfg)->num_nic_ports) argument
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/drivers/net/ethernet/marvell/octeon_ep/
A Doctep_config.h60 #define CFG_GET_IQ_CFG(cfg) ((cfg)->iq) argument
61 #define CFG_GET_IQ_NUM_DESC(cfg) ((cfg)->iq.num_descs) argument
62 #define CFG_GET_IQ_INSTR_TYPE(cfg) ((cfg)->iq.instr_type) argument
64 #define CFG_GET_IQ_DB_MIN(cfg) ((cfg)->iq.db_min) argument
65 #define CFG_GET_IQ_INTR_THRESHOLD(cfg) ((cfg)->iq.intr_threshold) argument
67 #define CFG_GET_OQ_NUM_DESC(cfg) ((cfg)->oq.num_descs) argument
68 #define CFG_GET_OQ_BUF_SIZE(cfg) ((cfg)->oq.buf_size) argument
70 #define CFG_GET_OQ_INTR_PKT(cfg) ((cfg)->oq.oq_intr_pkt) argument
72 #define CFG_GET_OQ_WMARK(cfg) ((cfg)->oq.wmark) argument
81 #define CFG_GET_MAX_VFS(cfg) ((cfg)->sriov_cfg.max_vfs) argument
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/drivers/pci/
A Decam.c40 cfg = kzalloc(sizeof(*cfg), GFP_KERNEL); in pci_ecam_create()
41 if (!cfg) in pci_ecam_create()
49 cfg->ops = ops; in pci_ecam_create()
78 cfg->winp = kcalloc(bus_range, sizeof(*cfg->winp), GFP_KERNEL); in pci_ecam_create()
83 if (!cfg->win) in pci_ecam_create()
92 dev_info(dev, "ECAM at %pR for %pR\n", &cfg->res, &cfg->busr); in pci_ecam_create()
93 return cfg; in pci_ecam_create()
117 if (cfg->win) in pci_ecam_free()
122 kfree(cfg); in pci_ecam_free()
136 if (busn < cfg->busr.start || busn > cfg->busr.end) in pci_ecam_add_bus()
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/drivers/gpu/drm/msm/hdmi/
A Dhdmi_phy_8998.c330 cfg->com_svs_mode_clk_sel = 1; in pll_calculate()
332 cfg->com_svs_mode_clk_sel = 2; in pll_calculate()
337 cfg->com_cp_ctrl_mode0 = cpctrl; in pll_calculate()
347 cfg->com_lock_cmp_en = 0x0; in pll_calculate()
348 cfg->com_core_clk_en = 0x2c; in pll_calculate()
470 cfg.tx_lx_tx_band[i]); in hdmi_8998_pll_set_clk_rate()
494 cfg.com_hsclk_sel); in hdmi_8998_pll_set_clk_rate()
496 cfg.com_lock_cmp_en); in hdmi_8998_pll_set_clk_rate()
503 cfg.com_cp_ctrl_mode0); in hdmi_8998_pll_set_clk_rate()
527 cfg.com_core_clk_en); in hdmi_8998_pll_set_clk_rate()
[all …]
A Dhdmi_phy_8996.c303 cfg->com_lock_cmp_en = 0x0; in pll_calculate()
304 cfg->com_core_clk_en = 0x2c; in pll_calculate()
309 cfg->tx_lx_lane_mode[0] = in pll_calculate()
321 cfg->tx_lx_tx_drv_lvl[0] = in pll_calculate()
322 cfg->tx_lx_tx_drv_lvl[1] = in pll_calculate()
331 cfg->tx_lx_vmode_ctrl1[0] = in pll_calculate()
336 cfg->tx_lx_vmode_ctrl2[0] = in pll_calculate()
348 cfg->tx_lx_vmode_ctrl2[0] = in pll_calculate()
403 memset(&cfg, 0x00, sizeof(cfg)); in hdmi_8996_pll_set_clk_rate()
430 cfg.tx_lx_tx_band[i]); in hdmi_8996_pll_set_clk_rate()
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/drivers/net/ethernet/marvell/octeontx2/af/
A Drpm.c153 u64 cfg; in rpm_lmac_rx_tx_enable() local
171 u64 cfg; in rpm_lmac_enadis_rx_pause_fwding() local
199 u64 cfg; in rpm_lmac_get_pause_frm_status() local
295 u64 cfg; in rpm2_lmac_cfg_bp() local
315 u64 cfg; in rpm_lmac_cfg_bp() local
337 u64 cfg; in rpm_lmac_enadis_pause_frm() local
397 cfg = FIELD_SET(RPM_PFC_CLASS_MASK, 0, cfg); in rpm_lmac_pause_frm_config()
455 u64 cfg; in rpm_stats_reset() local
511 u64 cfg; in rpmusx_lmac_internal_loopback() local
576 u64 cfg; in rpm_lmac_internal_loopback() local
[all …]
A Dcgx.c220 u64 cfg; in cgx_lmac_get_p2x() local
268 u64 cfg; in cgx_lmac_addr_set() local
373 u64 cfg; in cgx_lmac_addr_reset() local
407 u64 cfg; in cgx_lmac_addr_update() local
441 u64 cfg; in cgx_lmac_addr_del() local
498 u64 cfg; in cgx_lmac_addr_get() local
525 u64 cfg; in cgx_get_lmac_type() local
562 u64 cfg; in cgx_lmac_internal_loopback() local
643 u64 cfg; in cgx_lmac_get_pause_frm_status() local
949 cfg = FIELD_SET(CGX_PFC_CLASS_MASK, 0, cfg); in cgx_lmac_pause_frm_config()
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/drivers/gpu/drm/exynos/
A Dexynos_drm_gsc.c381 u32 cfg; in gsc_sw_reset() local
422 u32 cfg; in gsc_handle_irq() local
451 u32 cfg; in gsc_src_set_fmt() local
524 u32 cfg; in gsc_src_set_transf() local
568 u32 cfg; in gsc_src_set_size() local
611 u32 cfg; in gsc_src_set_buf_seq() local
638 u32 cfg; in gsc_dst_set_fmt() local
747 u32 cfg; in gsc_set_prescaler() local
850 u32 cfg; in gsc_set_scaler() local
868 u32 cfg; in gsc_dst_set_size() local
[all …]
A Dexynos_drm_fimc.c139 u32 cfg; in fimc_sw_reset() local
164 u32 cfg; in fimc_set_type_ctrl() local
184 u32 cfg; in fimc_handle_jpeg() local
199 u32 cfg; in fimc_mask_irq() local
243 u32 cfg; in fimc_check_frame_end() local
260 u32 cfg; in fimc_get_buf_id() local
286 u32 cfg; in fimc_handle_lastend() local
301 u32 cfg; in fimc_src_set_fmt_order() local
366 u32 cfg; in fimc_src_set_fmt() local
506 u32 cfg; in fimc_src_set_size() local
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/drivers/net/ethernet/marvell/octeon_ep_vf/
A Doctep_vf_config.h56 #define CFG_GET_IQ_CFG(cfg) ((cfg)->iq) argument
57 #define CFG_GET_IQ_NUM_DESC(cfg) ((cfg)->iq.num_descs) argument
58 #define CFG_GET_IQ_INSTR_TYPE(cfg) ((cfg)->iq.instr_type) argument
60 #define CFG_GET_IQ_DB_MIN(cfg) ((cfg)->iq.db_min) argument
61 #define CFG_GET_IQ_INTR_THRESHOLD(cfg) ((cfg)->iq.intr_threshold) argument
63 #define CFG_GET_OQ_NUM_DESC(cfg) ((cfg)->oq.num_descs) argument
64 #define CFG_GET_OQ_BUF_SIZE(cfg) ((cfg)->oq.buf_size) argument
66 #define CFG_GET_OQ_INTR_PKT(cfg) ((cfg)->oq.oq_intr_pkt) argument
67 #define CFG_GET_OQ_INTR_TIME(cfg) ((cfg)->oq.oq_intr_time) argument
68 #define CFG_GET_OQ_WMARK(cfg) ((cfg)->oq.wmark) argument
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/drivers/net/wireless/microchip/wilc1000/
A Dwlan_cfg.c142 struct wilc_cfg *cfg = &wl->cfg; in wilc_wlan_parse_response_frame() local
150 while (cfg->b[i].id != WID_NIL && cfg->b[i].id != wid) in wilc_wlan_parse_response_frame()
160 while (cfg->hw[i].id != WID_NIL && cfg->hw[i].id != wid) in wilc_wlan_parse_response_frame()
170 while (cfg->w[i].id != WID_NIL && cfg->w[i].id != wid) in wilc_wlan_parse_response_frame()
180 while (cfg->s[i].id != WID_NIL && cfg->s[i].id != wid) in wilc_wlan_parse_response_frame()
274 struct wilc_cfg *cfg = &wl->cfg; in wilc_wlan_cfg_get_val() local
278 while (cfg->b[i].id != WID_NIL && cfg->b[i].id != wid) in wilc_wlan_cfg_get_val()
286 while (cfg->hw[i].id != WID_NIL && cfg->hw[i].id != wid) in wilc_wlan_cfg_get_val()
294 while (cfg->w[i].id != WID_NIL && cfg->w[i].id != wid) in wilc_wlan_cfg_get_val()
302 while (cfg->s[i].id != WID_NIL && cfg->s[i].id != wid) in wilc_wlan_cfg_get_val()
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/drivers/leds/
A Dleds-lp55xx-common.c92 const struct lp55xx_device_config *cfg = chip->cfg; in lp55xx_wait_opmode_done() local
112 const struct lp55xx_device_config *cfg = chip->cfg; in lp55xx_stop_all_engine() local
122 const struct lp55xx_device_config *cfg = chip->cfg; in lp55xx_load_engine() local
140 const struct lp55xx_device_config *cfg = chip->cfg; in lp55xx_run_engine_common() local
176 const struct lp55xx_device_config *cfg = chip->cfg; in lp55xx_update_program_memory() local
241 const struct lp55xx_device_config *cfg = chip->cfg; in lp55xx_firmware_loaded_cb() local
273 const struct lp55xx_device_config *cfg = chip->cfg; in lp55xx_led_brightness() local
287 const struct lp55xx_device_config *cfg = chip->cfg; in lp55xx_multicolor_brightness() local
1004 cfg = chip->cfg; in lp55xx_init_device()
1095 if (!cfg->run_engine || !cfg->firmware_cb) in lp55xx_register_sysfs()
[all …]
/drivers/staging/media/atomisp/pci/runtime/isys/src/
A Dvirtual_isys.c110 stream2mmio_cfg_t *cfg);
116 ibuf_ctrl_cfg_t *cfg);
311 cfg->online, in create_input_system_channel()
640 memcpy(&cfg->lut_entry, in calculate_be_cfg()
658 cfg->csi_mipi_cfg.comp_bit_idx = cfg->csi_mipi_cfg.data_type - in calculate_be_cfg()
668 stream2mmio_cfg_t *cfg in calculate_stream2mmio_cfg() argument
683 ibuf_ctrl_cfg_t *cfg) in calculate_ibuf_ctrl_cfg() argument
724 if (cfg->online) { in calculate_ibuf_ctrl_cfg()
776 cfg->height = 1; in calculate_isys2401_dma_cfg()
810 cfg->cropping = 0; in calculate_isys2401_dma_port_cfg()
[all …]
/drivers/net/ethernet/netronome/nfp/crypto/
A Dipsec.c275 struct nfp_ipsec_cfg_add_sa *cfg; in nfp_net_xfrm_add_state() local
280 cfg = &msg.cfg_add_sa; in nfp_net_xfrm_add_state()
317 cfg->spi = ntohl(x->id.spi); in nfp_net_xfrm_add_state()
343 set_md5hmac(cfg, &trunc_len); in nfp_net_xfrm_add_state()
346 set_sha1hmac(cfg, &trunc_len); in nfp_net_xfrm_add_state()
349 set_sha2_256hmac(cfg, &trunc_len); in nfp_net_xfrm_add_state()
502 cfg->ipv6 = 0; in nfp_net_xfrm_add_state()
507 cfg->ipv6 = 1; in nfp_net_xfrm_add_state()
519 cfg->pmtu_limit = 0xffff; in nfp_net_xfrm_add_state()
520 cfg->ctrl_word.encap_dsbl = 1; in nfp_net_xfrm_add_state()
[all …]
/drivers/iommu/
A Dio-pgtable-arm.c344 struct io_pgtable_cfg *cfg = &data->iop.cfg; in __arm_lpae_init_pte() local
398 struct io_pgtable_cfg *cfg = &data->iop.cfg; in arm_lpae_install_table() local
432 struct io_pgtable_cfg *cfg = &data->iop.cfg; in __arm_lpae_map() local
556 struct io_pgtable_cfg *cfg = &data->iop.cfg; in arm_lpae_map_pages() local
914 cfg->ias = min(cfg->ias, max_addr_bits); in arm_lpae_restrict_pgsizes()
915 cfg->oas = min(cfg->oas, max_addr_bits); in arm_lpae_restrict_pgsizes()
1165 if (cfg->ias > 32 || cfg->oas > 40) in arm_32_lpae_alloc_pgtable_s1()
1175 if (cfg->ias > 40 || cfg->oas > 40) in arm_32_lpae_alloc_pgtable_s2()
1191 if (cfg->ias > 48 || cfg->oas > 40) in arm_mali_lpae_alloc_pgtable()
1306 cfg->pgsize_bitmap, cfg->ias); in arm_lpae_dump_ops()
[all …]
A Dio-pgtable-arm-v7s.c51 #define _ARM_V7S_LVL_BITS(lvl, cfg) ((lvl) == 1 ? ((cfg)->ias - 20) : 8) argument
55 #define ARM_V7S_PTES_PER_LVL(lvl, cfg) (1 << _ARM_V7S_LVL_BITS(lvl, cfg)) argument
62 #define _ARM_V7S_IDX_MASK(lvl, cfg) (ARM_V7S_PTES_PER_LVL(lvl, cfg) - 1) argument
241 struct io_pgtable_cfg *cfg = &data->iop.cfg; in __arm_v7s_alloc_table() local
301 struct io_pgtable_cfg *cfg = &data->iop.cfg; in __arm_v7s_free_table() local
398 struct io_pgtable_cfg *cfg = &data->iop.cfg; in arm_v7s_init_pte() local
464 struct io_pgtable_cfg *cfg = &data->iop.cfg; in __arm_v7s_map() local
674 if (cfg->ias > (arm_v7s_is_mtk_enabled(cfg) ? 34 : ARM_V7S_ADDR_BITS)) in arm_v7s_alloc_pgtable()
720 data->iop.cfg = *cfg; in arm_v7s_alloc_pgtable()
828 cfg_cookie = &cfg; in arm_v7s_do_selftests()
[all …]
/drivers/net/ethernet/cavium/thunder/
A Dthunder_xcv.c67 u64 cfg; in xcv_init_hw() local
71 cfg &= ~DLL_RESET; in xcv_init_hw()
76 cfg &= ~CLK_RESET; in xcv_init_hw()
85 cfg &= ~0xFF03; in xcv_init_hw()
86 cfg |= CLKRX_BYP; in xcv_init_hw()
93 cfg |= COMP_EN; in xcv_init_hw()
101 cfg |= PORT_EN; in xcv_init_hw()
105 cfg |= CLK_RESET; in xcv_init_hw()
112 u64 cfg; in xcv_setup_link() local
128 cfg &= ~0x03; in xcv_setup_link()
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/drivers/net/wwan/t7xx/
A Dt7xx_pcie_mac.c90 if (cfg->transparent) { in t7xx_pcie_mac_atr_cfg()
94 if (cfg->src_addr & (cfg->size - 1)) { in t7xx_pcie_mac_atr_cfg()
99 if (cfg->trsl_addr & (cfg->size - 1)) { in t7xx_pcie_mac_atr_cfg()
101 cfg->trsl_addr, cfg->size - 1); in t7xx_pcie_mac_atr_cfg()
105 pos = __ffs64(cfg->size); in t7xx_pcie_mac_atr_cfg()
111 offset = ATR_PORT_OFFSET * cfg->port + ATR_TABLE_OFFSET * cfg->table; in t7xx_pcie_mac_atr_cfg()
118 iowrite32(cfg->trsl_id, reg); in t7xx_pcie_mac_atr_cfg()
137 struct t7xx_atr_config cfg; in t7xx_pcie_mac_atr_init() local
144 memset(&cfg, 0, sizeof(cfg)); in t7xx_pcie_mac_atr_init()
149 cfg.port = T7XX_PCIE_REG_PORT; in t7xx_pcie_mac_atr_init()
[all …]
/drivers/pinctrl/renesas/
A Dsh_pfc.h448 PORT_GP_CFG_1(bank, 1, fn, sfx, cfg)
454 PORT_GP_CFG_1(bank, 3, fn, sfx, cfg)
460 PORT_GP_CFG_1(bank, 5, fn, sfx, cfg)
465 PORT_GP_CFG_1(bank, 6, fn, sfx, cfg)
470 PORT_GP_CFG_1(bank, 7, fn, sfx, cfg)
475 PORT_GP_CFG_1(bank, 8, fn, sfx, cfg)
480 PORT_GP_CFG_1(bank, 9, fn, sfx, cfg)
485 PORT_GP_CFG_1(bank, 10, fn, sfx, cfg)
490 PORT_GP_CFG_1(bank, 11, fn, sfx, cfg)
620 .configs = cfg, \
[all …]
/drivers/media/tuners/
A Dqm1d1c0042.c123 __func__, state->cfg.fe->dvb->num, state->cfg.fe->id); in qm1d1c0042_wakeup()
135 cfg = priv_cfg; in qm1d1c0042_set_config()
137 if (cfg->fe) in qm1d1c0042_set_config()
138 state->cfg.fe = cfg->fe; in qm1d1c0042_set_config()
145 state->cfg.lpf = cfg->lpf; in qm1d1c0042_set_config()
146 state->cfg.fast_srch = cfg->fast_srch; in qm1d1c0042_set_config()
149 state->cfg.lpf_wait = cfg->lpf_wait; in qm1d1c0042_set_config()
154 state->cfg.fast_srch_wait = cfg->fast_srch_wait; in qm1d1c0042_set_config()
159 state->cfg.normal_srch_wait = cfg->normal_srch_wait; in qm1d1c0042_set_config()
278 if (state->cfg.lpf) in qm1d1c0042_set_params()
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