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Searched refs:cfg_bits (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/sprd/
A Dsprd_dpu.h99 layer_reg_wr(struct dpu_context *ctx, u32 offset, u32 cfg_bits, int index) in layer_reg_wr() argument
103 writel(cfg_bits, ctx->base + layer_offset); in layer_reg_wr()
/drivers/staging/gpib/include/
A Dtnt4882_registers.h63 enum cfg_bits { enum

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