Searched refs:cfg_val (Results 1 – 9 of 9) sorted by relevance
| /drivers/gpu/drm/mediatek/ |
| A D | mtk_disp_gamma.c | 121 u32 cfg_val, data_mode, lbank_val, word[2]; in mtk_gamma_set() local
190 cfg_val = readl(gamma->regs + DISP_GAMMA_CFG); in mtk_gamma_set()
195 cfg_val |= FIELD_PREP(GAMMA_LUT_TYPE, 1); in mtk_gamma_set()
197 cfg_val &= ~GAMMA_LUT_TYPE; in mtk_gamma_set()
201 cfg_val |= FIELD_PREP(GAMMA_LUT_EN, 1); in mtk_gamma_set()
204 cfg_val &= ~GAMMA_RELAY_MODE; in mtk_gamma_set()
206 writel(cfg_val, gamma->regs + DISP_GAMMA_CFG); in mtk_gamma_set()
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| A D | mtk_disp_aal.c | 101 u32 cfg_val; in mtk_aal_gamma_set() local
126 cfg_val = readl(aal->regs + DISP_AAL_CFG); in mtk_aal_gamma_set()
129 cfg_val |= FIELD_PREP(AAL_GAMMA_LUT_EN, 1); in mtk_aal_gamma_set()
132 cfg_val &= ~AAL_RELAY_MODE; in mtk_aal_gamma_set()
134 writel(cfg_val, aal->regs + DISP_AAL_CFG); in mtk_aal_gamma_set()
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| /drivers/pinctrl/bcm/ |
| A D | pinctrl-bcm281xx.c | 2008 u32 cfg_val, cfg_mask; in bcm281xx_pinctrl_pin_config_set() local
2011 cfg_val = 0; in bcm281xx_pinctrl_pin_config_set()
2019 num_configs, &cfg_val, &cfg_mask); in bcm281xx_pinctrl_pin_config_set()
2025 num_configs, &cfg_val, &cfg_mask); in bcm281xx_pinctrl_pin_config_set()
2028 num_configs, &cfg_val, &cfg_mask); in bcm281xx_pinctrl_pin_config_set()
2033 num_configs, &cfg_val, &cfg_mask); in bcm281xx_pinctrl_pin_config_set()
2048 __func__, pdata->info->pins[pin].name, pin, cfg_val, cfg_mask); in bcm281xx_pinctrl_pin_config_set()
2058 rc = regmap_update_bits(pdata->regmap, offset, cfg_mask, cfg_val); in bcm281xx_pinctrl_pin_config_set()
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| /drivers/clk/xilinx/ |
| A D | xlnx_vcu.c | 293 u32 cfg_val; in xvcu_pll_set_div() local
304 cfg_val = FIELD_PREP(VCU_PLL_CFG_RES, cfg->res) | in xvcu_pll_set_div()
309 xvcu_write(base, VCU_PLL_CFG, cfg_val); in xvcu_pll_set_div()
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| /drivers/media/i2c/ |
| A D | tc358746.c | 572 static u32 tc358746_cfg_to_cnt(unsigned long cfg_val, unsigned long clk_hz, in tc358746_cfg_to_cnt() argument
575 return div64_u64((u64)cfg_val * clk_hz + time_base - 1, time_base); in tc358746_cfg_to_cnt()
578 static u32 tc358746_ps_to_cnt(unsigned long cfg_val, unsigned long clk_hz) in tc358746_ps_to_cnt() argument
580 return tc358746_cfg_to_cnt(cfg_val, clk_hz, PSEC_PER_SEC); in tc358746_ps_to_cnt()
583 static u32 tc358746_us_to_cnt(unsigned long cfg_val, unsigned long clk_hz) in tc358746_us_to_cnt() argument
585 return tc358746_cfg_to_cnt(cfg_val, clk_hz, USEC_PER_SEC); in tc358746_us_to_cnt()
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| /drivers/tty/serial/8250/ |
| A D | 8250_exar.c | 848 u16 cfg_val; in cti_board_init_fpga() local
854 ret = pci_read_config_word(pcidev, CTI_FPGA_CFG_INT_EN_REG, &cfg_val); in cti_board_init_fpga()
858 cfg_val |= CTI_FPGA_CFG_INT_EN_EXT_BIT; in cti_board_init_fpga()
859 ret = pci_write_config_word(pcidev, CTI_FPGA_CFG_INT_EN_REG, cfg_val); in cti_board_init_fpga()
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| /drivers/misc/cardreader/ |
| A D | rtsx_pcr.c | 1320 u16 cfg_val; in rtsx_pci_init_chip() local
1394 pcie_capability_read_word(pcr->pci, PCI_EXP_LNKCTL, &cfg_val); in rtsx_pci_init_chip()
1395 if (cfg_val & PCI_EXP_LNKCTL_ASPM_L1) in rtsx_pci_init_chip()
1432 pcie_capability_read_word(pcr->pci, PCI_EXP_DEVCTL2, &cfg_val); in rtsx_pci_init_chip()
1433 if (cfg_val & PCI_EXP_DEVCTL2_LTR_EN) { in rtsx_pci_init_chip()
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| /drivers/parisc/ |
| A D | sba_iommu.c | 1652 unsigned long cfg_val; in sba_hw_init() local
1655 cfg_val = READ_REG(rope_cfg); in sba_hw_init()
1656 cfg_val &= ~IOC_ROPE_AO; in sba_hw_init()
1657 WRITE_REG(cfg_val, rope_cfg); in sba_hw_init()
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| /drivers/net/ethernet/broadcom/ |
| A D | tg3.c | 9293 u32 cfg_val; in tg3_chip_reset() local
9299 pci_read_config_dword(tp->pdev, 0xc4, &cfg_val); in tg3_chip_reset()
9301 cfg_val | (1 << 15)); in tg3_chip_reset()
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