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Searched refs:cfgs (Results 1 – 24 of 24) sorted by relevance

/drivers/hwtracing/coresight/
A Dcoresight-ctcu-core.c188 const struct ctcu_config *cfgs; in ctcu_probe() local
214 cfgs = of_device_get_match_data(dev); in ctcu_probe()
215 if (cfgs) { in ctcu_probe()
216 if (cfgs->num_etr_config <= ETR_MAX_NUM) { in ctcu_probe()
217 for (i = 0; i < cfgs->num_etr_config; i++) { in ctcu_probe()
218 etr_cfg = &cfgs->etr_cfgs[i]; in ctcu_probe()
/drivers/phy/samsung/
A Dphy-samsung-ufs.c79 const struct samsung_ufs_phy_cfg * const *cfgs = ufs_phy->cfgs; in samsung_ufs_phy_calibrate() local
90 cfg = cfgs[ufs_phy->ufs_phy_state]; in samsung_ufs_phy_calibrate()
289 phy->cfgs = drvdata->cfgs; in samsung_ufs_phy_probe()
A Dphy-samsung-ufs.h110 const struct samsung_ufs_phy_cfg **cfgs; member
126 const struct samsung_ufs_phy_cfg * const *cfgs; member
A Dphy-fsd-ufs.c54 .cfgs = fsd_ufs_phy_cfgs,
A Dphy-exynosautov9-ufs.c65 .cfgs = exynosautov9_ufs_phy_cfgs,
A Dphy-exynos7-ufs.c76 .cfgs = exynos7_ufs_phy_cfgs,
A Dphy-exynosautov920-ufs.c158 .cfgs = exynosautov920_ufs_phy_cfgs,
A Dphy-gs101-ufs.c172 .cfgs = tensor_gs101_ufs_phy_cfgs,
/drivers/staging/media/ipu7/
A Dipu7-boot.c215 struct syscom_queue_params_config *cfgs; in ipu7_boot_init_boot_config() local
226 sizeof(*cfgs) * num_queues + sizeof(*boot_config); in ipu7_boot_init_boot_config()
271 cfgs = ipu7_syscom_get_queue_config(syscfg); in ipu7_boot_init_boot_config()
275 cfgs[i].token_array_mem = queue_mem_dma_ptr; in ipu7_boot_init_boot_config()
276 cfgs[i].max_capacity = qconfigs[i].max_capacity; in ipu7_boot_init_boot_config()
277 cfgs[i].token_size_in_bytes = qconfigs[i].token_size_in_bytes; in ipu7_boot_init_boot_config()
/drivers/phy/rockchip/
A Dphy-rockchip-usbdp.c198 const struct rk_udphy_cfg *cfgs; member
472 const struct rk_udphy_cfg *cfg = udphy->cfgs; in rk_udphy_reset_init()
490 const struct rk_udphy_cfg *cfg = udphy->cfgs; in rk_udphy_u3_port_disable()
499 const struct rk_udphy_cfg *cfg = udphy->cfgs; in rk_udphy_usb_bvalid_enable()
543 const struct rk_udphy_cfg *cfg = udphy->cfgs; in rk_udphy_dplane_select()
610 const struct rk_udphy_cfg *cfg = udphy->cfgs; in rk_udphy_dp_hpd_event_trigger()
784 const struct rk_udphy_cfg *cfg = udphy->cfgs; in rk_udphy_init()
1173 const struct rk_udphy_cfg *cfg = udphy->cfgs; in rk_udphy_dp_set_voltage()
1467 udphy->cfgs = device_get_match_data(dev); in rk_udphy_probe()
1468 if (!udphy->cfgs) in rk_udphy_probe()
[all …]
A Dphy-rockchip-samsung-hdptx.c1984 const struct rk_hdptx_phy_cfg *cfgs; in rk_hdptx_phy_probe() local
2004 cfgs = device_get_match_data(dev); in rk_hdptx_phy_probe()
2005 if (!cfgs) in rk_hdptx_phy_probe()
2010 for (id = 0; id < cfgs->num_phys; id++) { in rk_hdptx_phy_probe()
2011 if (res->start == cfgs->phy_ids[id]) { in rk_hdptx_phy_probe()
/drivers/pinctrl/renesas/
A Dpinctrl.c84 unsigned long *cfgs; in sh_pfc_map_add_config() local
86 cfgs = kmemdup_array(configs, num_configs, sizeof(*cfgs), GFP_KERNEL); in sh_pfc_map_add_config()
87 if (cfgs == NULL) in sh_pfc_map_add_config()
92 map->data.configs.configs = cfgs; in sh_pfc_map_add_config()
A Dpinctrl-rzv2m.c197 unsigned long *cfgs; in rzv2m_map_add_config() local
199 cfgs = kmemdup_array(configs, num_configs, sizeof(*cfgs), GFP_KERNEL); in rzv2m_map_add_config()
200 if (!cfgs) in rzv2m_map_add_config()
205 map->data.configs.configs = cfgs; in rzv2m_map_add_config()
A Dsh_pfc.h679 #define SH_PFC_PIN_CFG(_pin, cfgs) { \ argument
683 .configs = cfgs, \
A Dpinctrl-rzg2l.c592 unsigned long *cfgs; in rzg2l_map_add_config() local
594 cfgs = kmemdup_array(configs, num_configs, sizeof(*cfgs), GFP_KERNEL); in rzg2l_map_add_config()
595 if (!cfgs) in rzg2l_map_add_config()
600 map->data.configs.configs = cfgs; in rzg2l_map_add_config()
/drivers/pinctrl/nxp/
A Dpinctrl-s32cc.c227 unsigned long *cfgs = NULL; in s32_dt_group_node_to_map() local
238 ret = pinconf_generic_parse_dt_config(np, pctldev, &cfgs, &n_cfgs); in s32_dt_group_node_to_map()
259 num_maps, np->name, cfgs, n_cfgs, in s32_dt_group_node_to_map()
266 kfree(cfgs); in s32_dt_group_node_to_map()
/drivers/accel/amdxdna/
A Daie2_message.c414 req.cfgs[i] = FIELD_PREP(AIE2_MSG_CFG_CU_PDI_ADDR, in aie2_config_cu()
416 req.cfgs[i] |= FIELD_PREP(AIE2_MSG_CFG_CU_FUNC, cu->cu_func); in aie2_config_cu()
418 abo->mem.dev_addr, req.cfgs[i]); in aie2_config_cu()
A Daie2_msg_priv.h279 __u32 cfgs[MAX_NUM_CUS]; member
/drivers/net/ethernet/emulex/benet/
A Dbe_cmds.c4087 struct be_fat_conf_params *cfgs; in be_cmd_set_fw_log_level() local
4103 cfgs = (struct be_fat_conf_params *) in be_cmd_set_fw_log_level()
4105 for (i = 0; i < le32_to_cpu(cfgs->num_modules); i++) { in be_cmd_set_fw_log_level()
4106 u32 num_modes = le32_to_cpu(cfgs->module[i].num_modes); in be_cmd_set_fw_log_level()
4109 if (cfgs->module[i].trace_lvl[j].mode == MODE_UART) in be_cmd_set_fw_log_level()
4110 cfgs->module[i].trace_lvl[j].dbg_lvl = in be_cmd_set_fw_log_level()
4125 struct be_fat_conf_params *cfgs; in be_cmd_get_fw_log_level() local
4143 cfgs = (struct be_fat_conf_params *)(extfat_cmd.va + in be_cmd_get_fw_log_level()
4146 for (j = 0; j < le32_to_cpu(cfgs->module[0].num_modes); j++) { in be_cmd_get_fw_log_level()
4147 if (cfgs->module[0].trace_lvl[j].mode == MODE_UART) in be_cmd_get_fw_log_level()
[all …]
A Dbe_cmds.h2484 struct be_fat_conf_params *cfgs);
/drivers/mtd/devices/
A Dst_spi_fsm.c1018 struct seq_rw_config cfgs[]) in stfsm_search_seq_rw_configs() argument
1023 for (config = cfgs; config->cmd != 0; config++) in stfsm_search_seq_rw_configs()
1101 struct seq_rw_config *cfgs) in stfsm_search_prepare_rw_seq() argument
1105 config = stfsm_search_seq_rw_configs(fsm, cfgs); in stfsm_search_prepare_rw_seq()
/drivers/soc/qcom/
A Dllcc-qcom.c4429 const struct qcom_sct_config *cfgs; in qcom_llcc_probe() local
4453 cfgs = of_device_get_match_data(&pdev->dev); in qcom_llcc_probe()
4454 if (!cfgs) { in qcom_llcc_probe()
4458 ret = qcom_llcc_get_cfg_index(pdev, &cfg_index, cfgs->num_config); in qcom_llcc_probe()
4461 cfg = &cfgs->llcc_config[cfg_index]; in qcom_llcc_probe()
/drivers/net/wireless/realtek/rtw89/
A Dmac.c1753 const struct rtw89_dle_mem *cfg, *cfgs; in get_dle_mem_cfg() local
1755 cfgs = rtwdev->chip->dle_mem[rtwdev->hci.dle_type]; in get_dle_mem_cfg()
1756 if (!cfgs) in get_dle_mem_cfg()
1759 cfg = &cfgs[mode]; in get_dle_mem_cfg()
/drivers/net/ethernet/marvell/octeontx2/af/
A Drvu_nix.c3835 u64 cfgs[] = { in nix_af_mark_format_setup() local
3856 rc = rvu_nix_reserve_mark_format(rvu, nix_hw, blkaddr, cfgs[i]); in nix_af_mark_format_setup()

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