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Searched refs:ch_num (Results 1 – 25 of 41) sorted by relevance

12

/drivers/usb/musb/
A Dux500_dma.c37 u8 ch_num; member
141 if (ch_num > 7) in ux500_dma_channel_allocate()
142 ch_num -= 8; in ux500_dma_channel_allocate()
243 u8 ch_num; in ux500_dma_controller_stop() local
245 for (ch_num = 0; ch_num < UX500_MUSB_DMA_NUM_RX_TX_CHANNELS; ch_num++) { in ux500_dma_controller_stop()
255 for (ch_num = 0; ch_num < UX500_MUSB_DMA_NUM_RX_TX_CHANNELS; ch_num++) { in ux500_dma_controller_stop()
275 u32 ch_num; in ux500_dma_controller_start() local
299 for (ch_num = 0; in ux500_dma_controller_start()
301 ch_num++) { in ux500_dma_controller_start()
304 ux500_channel->ch_num = ch_num; in ux500_dma_controller_start()
[all …]
A Dmusb_cppi41.c488 u8 ch_num = hw_ep->epnum - 1; in cppi41_dma_channel_allocate() local
490 if (ch_num >= controller->num_channels) in cppi41_dma_channel_allocate()
494 cppi41_channel = &controller->tx_channel[ch_num]; in cppi41_dma_channel_allocate()
496 cppi41_channel = &controller->rx_channel[ch_num]; in cppi41_dma_channel_allocate()
/drivers/gpu/drm/imx/dcss/
A Ddcss-dev.h128 void dcss_dpr_set_res(struct dcss_dpr *dpr, int ch_num, u32 xres, u32 yres);
131 void dcss_dpr_enable(struct dcss_dpr *dpr, int ch_num, bool en);
132 void dcss_dpr_format_set(struct dcss_dpr *dpr, int ch_num,
134 void dcss_dpr_set_rotation(struct dcss_dpr *dpr, int ch_num, u32 rotation);
149 void dcss_dtg_plane_alpha_set(struct dcss_dtg *dtg, int ch_num,
151 void dcss_dtg_plane_pos_set(struct dcss_dtg *dtg, int ch_num,
153 void dcss_dtg_ch_enable(struct dcss_dtg *dtg, int ch_num, bool en);
167 void dcss_scaler_set_filter(struct dcss_scaler *scl, int ch_num,
169 void dcss_scaler_setup(struct dcss_scaler *scl, int ch_num,
173 void dcss_scaler_ch_enable(struct dcss_scaler *scl, int ch_num, bool en);
[all …]
A Ddcss-plane.c312 dcss_dpr_format_set(dcss->dpr, dcss_plane->ch_num, in dcss_plane_atomic_update()
317 dcss_dpr_set_rotation(dcss->dpr, dcss_plane->ch_num, in dcss_plane_atomic_update()
325 dcss_scaler_set_filter(dcss->scaler, dcss_plane->ch_num, in dcss_plane_atomic_update()
328 dcss_scaler_setup(dcss->scaler, dcss_plane->ch_num, in dcss_plane_atomic_update()
335 dcss_dtg_plane_pos_set(dcss->dtg, dcss_plane->ch_num, in dcss_plane_atomic_update()
337 dcss_dtg_plane_alpha_set(dcss->dtg, dcss_plane->ch_num, in dcss_plane_atomic_update()
340 if (!dcss_plane->ch_num && (new_state->alpha >> 8) == 0) in dcss_plane_atomic_update()
343 dcss_dpr_enable(dcss->dpr, dcss_plane->ch_num, enable); in dcss_plane_atomic_update()
347 dcss_dtg_plane_pos_set(dcss->dtg, dcss_plane->ch_num, in dcss_plane_atomic_update()
359 dcss_dpr_enable(dcss->dpr, dcss_plane->ch_num, false); in dcss_plane_atomic_disable()
[all …]
A Ddcss-dtg.c240 void dcss_dtg_plane_pos_set(struct dcss_dtg *dtg, int ch_num, in dcss_dtg_plane_pos_set() argument
252 dcss_dtg_write(dtg, 0, DCSS_DTG_TC_CH1_TOP + 0x8 * ch_num); in dcss_dtg_plane_pos_set()
253 dcss_dtg_write(dtg, 0, DCSS_DTG_TC_CH1_BOT + 0x8 * ch_num); in dcss_dtg_plane_pos_set()
256 DCSS_DTG_TC_CH1_TOP + 0x8 * ch_num); in dcss_dtg_plane_pos_set()
258 DCSS_DTG_TC_CH1_BOT + 0x8 * ch_num); in dcss_dtg_plane_pos_set()
264 if (ch_num) in dcss_dtg_global_alpha_changed()
270 void dcss_dtg_plane_alpha_set(struct dcss_dtg *dtg, int ch_num, in dcss_dtg_plane_alpha_set() argument
274 if (ch_num) in dcss_dtg_plane_alpha_set()
322 void dcss_dtg_ch_enable(struct dcss_dtg *dtg, int ch_num, bool en) in dcss_dtg_ch_enable() argument
327 control_status = dtg->control_status & ~ch_en_map[ch_num]; in dcss_dtg_ch_enable()
[all …]
A Ddcss-dpr.c109 int ch_num; member
146 ch->ch_num = i; in dcss_dpr_ch_init_all()
217 void dcss_dpr_set_res(struct dcss_dpr *dpr, int ch_num, u32 xres, u32 yres) in dcss_dpr_set_res() argument
219 struct dcss_dpr_ch *ch = &dpr->ch[ch_num]; in dcss_dpr_set_res()
247 struct dcss_dpr_ch *ch = &dpr->ch[ch_num]; in dcss_dpr_addr_set()
325 void dcss_dpr_enable(struct dcss_dpr *dpr, int ch_num, bool en) in dcss_dpr_enable() argument
327 struct dcss_dpr_ch *ch = &dpr->ch[ch_num]; in dcss_dpr_enable()
462 switch (ch->ch_num) { in dcss_dpr_tile_set()
492 void dcss_dpr_format_set(struct dcss_dpr *dpr, int ch_num, in dcss_dpr_format_set() argument
495 struct dcss_dpr_ch *ch = &dpr->ch[ch_num]; in dcss_dpr_format_set()
[all …]
A Ddcss-scaler.c347 void dcss_scaler_ch_enable(struct dcss_scaler *scl, int ch_num, bool en) in dcss_scaler_ch_enable() argument
349 struct dcss_scaler_ch *ch = &scl->ch[ch_num]; in dcss_scaler_ch_enable()
561 int dcss_scaler_get_min_max_ratios(struct dcss_scaler *scl, int ch_num, in dcss_scaler_get_min_max_ratios() argument
564 *min = upscale_fp(dcss_scaler_factors[ch_num].upscale, 16); in dcss_scaler_get_min_max_ratios()
565 *max = downscale_fp(dcss_scaler_factors[ch_num].downscale, 16); in dcss_scaler_get_min_max_ratios()
760 void dcss_scaler_set_filter(struct dcss_scaler *scl, int ch_num, in dcss_scaler_set_filter() argument
763 struct dcss_scaler_ch *ch = &scl->ch[ch_num]; in dcss_scaler_set_filter()
768 void dcss_scaler_setup(struct dcss_scaler *scl, int ch_num, in dcss_scaler_setup() argument
773 struct dcss_scaler_ch *ch = &scl->ch[ch_num]; in dcss_scaler_setup()
A Ddcss-kms.h14 int ch_num; member
/drivers/hwmon/
A Dpowr1220.c107 static int powr1220_read_adc(struct device *dev, int ch_num) in powr1220_read_adc() argument
117 !data->adc_valid[ch_num]) { in powr1220_read_adc()
124 if (data->adc_maxes[ch_num] > ADC_MAX_LOW_MEASUREMENT_MV || in powr1220_read_adc()
125 data->adc_maxes[ch_num] == 0) in powr1220_read_adc()
130 adc_range | ch_num); in powr1220_read_adc()
156 data->adc_values[ch_num] = reading; in powr1220_read_adc()
157 data->adc_valid[ch_num] = true; in powr1220_read_adc()
158 data->adc_last_updated[ch_num] = jiffies; in powr1220_read_adc()
161 if (reading > data->adc_maxes[ch_num]) in powr1220_read_adc()
162 data->adc_maxes[ch_num] = reading; in powr1220_read_adc()
[all …]
A Dmr75203.c633 u32 vm_num, u32 ch_num, u8 *vm_idx) in pvt_get_active_channel() argument
645 memset(vm_active_ch, ch_num, vm_num); in pvt_get_active_channel()
646 pvt->vm_channels.max = ch_num; in pvt_get_active_channel()
647 pvt->vm_channels.total = ch_num * vm_num; in pvt_get_active_channel()
650 if (vm_active_ch[i] > ch_num) { in pvt_get_active_channel()
769 u32 ts_num, vm_num, pd_num, ch_num, val, index, i; in mr75203_probe() local
808 ch_num = (val & CH_NUM_MSK) >> CH_NUM_SFT; in mr75203_probe()
878 ret = pvt_get_active_channel(dev, pvt, vm_num, ch_num, vm_idx); in mr75203_probe()
/drivers/input/misc/
A Diqs269a.c328 unsigned int ch_num; member
362 if (ch_num >= IQS269_NUM_CH) in iqs269_ati_mode_set()
387 if (ch_num >= IQS269_NUM_CH) in iqs269_ati_mode_get()
406 if (ch_num >= IQS269_NUM_CH) in iqs269_ati_base_set()
449 if (ch_num >= IQS269_NUM_CH) in iqs269_ati_base_get()
479 unsigned int ch_num, unsigned int target) in iqs269_ati_target_set() argument
484 if (ch_num >= IQS269_NUM_CH) in iqs269_ati_target_set()
509 if (ch_num >= IQS269_NUM_CH) in iqs269_ati_target_get()
1500 IQS269_CHx_COUNTS + iqs269->ch_num * 2, in counts_show()
1601 iqs269->ch_num = val; in ch_number_store()
[all …]
/drivers/bus/mhi/host/
A Dpci_generic.c63 .num = ch_num, \
78 .num = ch_num, \
93 .num = ch_num, \
122 .num = ch_num, \
137 .num = ch_num, \
152 .num = ch_num, \
167 .num = ch_num, \
182 .num = ch_num, \
197 .num = ch_num, \
236 #define MHI_EVENT_CONFIG_HW_DATA(ev_ring, el_count, ch_num) \ argument
[all …]
A Dtrace.h99 __field(int, ch_num)
108 __entry->ch_num = mhi_chan->chan;
116 __get_str(name), __entry->ch_num, __entry->wp, __entry->tre_ptr,
224 __field(int, ch_num)
231 __entry->ch_num = mhi_chan->chan;
237 __get_str(name), __entry->ch_num, __entry->reason,
/drivers/most/
A Dmost_snd.c416 static int split_arg_list(char *buf, u16 *ch_num, char **sample_res) in split_arg_list() argument
424 ret = kstrtou16(num, 0, ch_num); in split_arg_list()
449 u16 ch_num, char *sample_res, in audio_set_hw_params() argument
462 if (!ch_num) { in audio_set_hw_params()
467 if (cfg->subbuffer_size != ch_num * sinfo[i].bytes) { in audio_set_hw_params()
481 pcm_hw->channels_min = ch_num; in audio_set_hw_params()
482 pcm_hw->channels_max = ch_num; in audio_set_hw_params()
524 u16 ch_num; in audio_probe_channel() local
533 ret = split_arg_list(arg_list_cpy, &ch_num, &sample_res); in audio_probe_channel()
589 ret = audio_set_hw_params(&channel->pcm_hardware, ch_num, sample_res, in audio_probe_channel()
/drivers/rapidio/
A Drio_cm.c1290 if (ch_num) { in riocm_ch_alloc()
1292 start = ch_num; in riocm_ch_alloc()
1293 end = ch_num + 1; in riocm_ch_alloc()
1353 *ch_num = ch->id; in riocm_ch_create()
1658 u16 ch_num; in cm_chan_create() local
1661 if (get_user(ch_num, p)) in cm_chan_create()
1684 u16 ch_num; in cm_chan_close() local
1687 if (get_user(ch_num, p)) in cm_chan_close()
1732 u16 ch_num; in cm_chan_listen() local
1734 if (get_user(ch_num, p)) in cm_chan_listen()
[all …]
/drivers/dma/ti/
A Dedma.c221 int ch_num; member
676 echan->ch_num); in edma_alloc_channel()
759 j, echan->ch_num, echan->slot[i], in edma_execute()
802 echan->ch_num); in edma_execute()
806 echan->ch_num, edesc->processed); in edma_execute()
1422 i, echan->ch_num, echan->slot[i], in edma_prep_dma_cyclic()
1472 echan->ch_num); in edma_completion_handler()
1475 echan->ch_num); in edma_completion_handler()
1688 EDMA_CHAN_SLOT(echan->ch_num)); in edma_alloc_chan_resources()
1910 if (*memcpy_channels == ch_num) in edma_is_memcpy_channel()
[all …]
/drivers/i2c/busses/
A Di2c-eg20t.c157 int ch_num; member
611 for (i = 0, flag = 0; i < adap_info->ch_num; i++) { in pch_i2c_handler()
748 adap_info->ch_num = id->driver_data; in pch_i2c_probe()
750 for (i = 0; i < adap_info->ch_num; i++) { in pch_i2c_probe()
776 for (i = 0; i < adap_info->ch_num; i++) { in pch_i2c_probe()
815 for (i = 0; i < adap_info->ch_num; i++) { in pch_i2c_remove()
823 for (i = 0; i < adap_info->ch_num; i++) in pch_i2c_remove()
841 for (i = 0; i < adap_info->ch_num; i++) { in pch_i2c_suspend()
849 for (i = 0; i < adap_info->ch_num; i++) in pch_i2c_suspend()
865 for (i = 0; i < adap_info->ch_num; i++) in pch_i2c_resume()
/drivers/mailbox/
A Dast2700-mailbox.c37 static inline int ch_num(struct mbox_chan *chan) in ch_num() function
87 int idx = ch_num(chan); in ast2700_mbox_send_data()
116 int idx = ch_num(chan); in ast2700_mbox_startup()
130 int idx = ch_num(chan); in ast2700_mbox_shutdown()
142 int idx = ch_num(chan); in ast2700_mbox_last_tx_done()
/drivers/gpu/drm/amd/amdgpu/
A Dumc_v8_10.h55 #define SWIZZLE_MODE_TMP_ADDR(na, ch_num, ch_idx) \ argument
56 ((((na) >> 10) * (ch_num) + (ch_idx)) << 10)
/drivers/net/ethernet/stmicro/stmmac/
A Ddwmac-loongson.c407 int i, ch_num, ret, vecs; in loongson_dwmac_msi_config() local
409 ch_num = min(plat->tx_queues_to_use, plat->rx_queues_to_use); in loongson_dwmac_msi_config()
411 vecs = roundup_pow_of_two(ch_num * 2 + 1); in loongson_dwmac_msi_config()
420 for (i = 0; i < ch_num; i++) { in loongson_dwmac_msi_config()
421 res->rx_irq[ch_num - 1 - i] = pci_irq_vector(pdev, 1 + i * 2); in loongson_dwmac_msi_config()
424 for (i = 0; i < ch_num; i++) { in loongson_dwmac_msi_config()
425 res->tx_irq[ch_num - 1 - i] = pci_irq_vector(pdev, 2 + i * 2); in loongson_dwmac_msi_config()
/drivers/dma/
A Dmoxart-dma.c140 int ch_num; member
345 __func__, ch->ch_num); in moxart_alloc_chan_resources()
358 __func__, ch->ch_num); in moxart_free_chan_resources()
588 ch->ch_num = i; in moxart_probe()
596 __func__, i, ch->ch_num, ch->base); in moxart_probe()
/drivers/net/ethernet/ti/
A Dcpsw_ethtool.c238 static void cpsw_add_ch_strings(u8 **p, int ch_num, int rx_dir) in cpsw_add_ch_strings() argument
244 ch_stats_len = CPSW_STATS_CH_LEN * ch_num; in cpsw_add_ch_strings()
522 static int cpsw_update_channels_res(struct cpsw_priv *priv, int ch_num, int rx, in cpsw_update_channels_res() argument
541 while (*ch < ch_num) { in cpsw_update_channels_res()
558 while (*ch > ch_num) { in cpsw_update_channels_res()
/drivers/pci/endpoint/functions/
A Dpci-epf-mhi.c43 #define MHI_EP_CHANNEL_CONFIG(ch_num, ch_name, direction) \ argument
45 .num = ch_num, \
50 #define MHI_EP_CHANNEL_CONFIG_UL(ch_num, ch_name) \ argument
51 MHI_EP_CHANNEL_CONFIG(ch_num, ch_name, DMA_TO_DEVICE)
53 #define MHI_EP_CHANNEL_CONFIG_DL(ch_num, ch_name) \ argument
54 MHI_EP_CHANNEL_CONFIG(ch_num, ch_name, DMA_FROM_DEVICE)
/drivers/staging/rtl8723bs/include/
A Drtw_cmd.h243 u8 ch_num; member
579 …dapter, struct ndis_802_11_ssid *ssid, int ssid_num, struct rtw_ieee80211_channel *ch, int ch_num);
/drivers/tty/serial/
A Drp2.c251 static void rp2_mask_ch_irq(struct rp2_uart_port *up, int ch_num, in rp2_mask_ch_irq() argument
260 irq_mask &= ~BIT(ch_num); in rp2_mask_ch_irq()
262 irq_mask |= BIT(ch_num); in rp2_mask_ch_irq()

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