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Searched refs:chipset (Results 1 – 25 of 159) sorted by relevance

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/drivers/gpu/drm/nouveau/nvkm/engine/gr/
A Dctxnv50.c379 switch (device->chipset) { in nv50_gr_construct_mmio()
428 if (device->chipset < 0xa0) in nv50_gr_construct_mmio()
448 switch (device->chipset) { in nv50_gr_construct_mmio()
716 if (device->chipset == 0x50 || IS_NVAAF(device->chipset)) in nv50_gr_construct_mmio()
1413 if (device->chipset < 0x92 || device->chipset == 0x98) in nv50_gr_construct_gene_m2mf()
1946 if (device->chipset > 0x50 && device->chipset < 0xa0) in nv50_gr_construct_gene_vfetch()
2443 if (device->chipset >= 0xa0 && !IS_NVAAF(device->chipset)) in nv50_gr_construct_gene_ropc()
2452 …if (device->chipset == 0x86 || device->chipset == 0x92 || device->chipset == 0x98 || device->chips… in nv50_gr_construct_gene_ropc()
2723 if (device->chipset == 0x94 || device->chipset == 0x96) in nv50_gr_construct_xfer_unk84xx()
3177 …if (device->chipset == 0x86 || device->chipset == 0x98 || device->chipset == 0xa8 || IS_NVAAF(devi… in nv50_gr_construct_xfer_mpc()
[all …]
A Dctxnv40.c123 switch (device->chipset) { in nv40_gr_vs_count()
232 switch (device->chipset) { in nv40_gr_construct_general()
274 if (device->chipset == 0x46 || device->chipset == 0x47 || in nv40_gr_construct_state3d()
275 device->chipset == 0x49 || device->chipset == 0x4b) { in nv40_gr_construct_state3d()
298 switch (device->chipset) { in nv40_gr_construct_state3d()
342 if (device->chipset != 0x44 && device->chipset != 0x4a && in nv40_gr_construct_state3d()
377 switch (device->chipset) { in nv40_gr_construct_state3d_2()
396 switch (device->chipset) { in nv40_gr_construct_state3d_2()
412 switch (device->chipset) { in nv40_gr_construct_state3d_2()
438 switch (device->chipset) { in nv40_gr_construct_state3d_2()
[all …]
A Dnv40.c183 switch (device->chipset) { in nv40_gr_tile()
195 switch (device->chipset) { in nv40_gr_tile()
322 if (device->chipset == 0x40) { in nv40_gr_init()
330 switch (device->chipset) { in nv40_gr_init()
368 switch (device->chipset) { in nv40_gr_init()
390 switch (device->chipset) { in nv40_gr_init()
402 switch (device->chipset) { in nv40_gr_init()
A Dnv40.h41 if ((device->chipset & 0xf0) == 0x60) in nv44_gr_class()
44 return !(0x0aaf & (1 << (device->chipset & 0x0f))); in nv44_gr_class()
A Dnv50.c294 if (device->chipset < 0xa0) in nv50_gr_mp_trap()
338 if (device->chipset < 0xa0) in nv50_gr_tp_trap()
701 if (device->chipset < 0xa0) { in nv50_gr_init()
731 switch (device->chipset & 0xf0) { in nv50_gr_init()
739 if (device->chipset == 0xa0 || in nv50_gr_init()
740 device->chipset == 0xaa || in nv50_gr_init()
741 device->chipset == 0xac) { in nv50_gr_init()
/drivers/net/wireless/realtek/rtw88/
A DKconfig67 Select this option will enable support for 8822BE chipset
78 Select this option will enable support for 8822BS chipset
89 Select this option will enable support for 8822BU chipset
100 Select this option will enable support for 8822CE chipset
111 Select this option will enable support for 8822CS chipset
122 Select this option will enable support for 8822CU chipset
133 Select this option will enable support for 8723DE chipset
144 Select this option will enable support for 8723DS chipset
169 Select this option will enable support for 8723DU chipset
180 Select this option will enable support for 8821CE chipset
[all …]
/drivers/net/wireless/ralink/rt2x00/
A DKconfig28 This adds support for rt2400 wireless chipset family.
40 This adds support for rt2500 wireless chipset family.
55 This adds support for rt2501 wireless chipset family.
84 This adds support for rt33xx wireless chipset family to the
92 This adds support for rt35xx wireless chipset family to the
101 This adds support for rt53xx wireless chipset family to the
109 This adds support for rt3290 wireless chipset family to the
120 This adds support for rt2500 wireless chipset family.
133 This adds support for rt2501 wireless chipset family.
158 This adds support for rt33xx wireless chipset family to the
[all …]
/drivers/gpu/nova-core/
A Dgpu.rs149 chipset: Chipset, field
159 chipset: boot0.chipset()?, in new()
272 let fw = Firmware::new(pdev.as_ref(), spec.chipset, FIRMWARE_VERSION)?; in new()
277 spec.chipset, in new()
278 spec.chipset.arch(), in new()
286 let sysmem_flush = SysmemFlush::register(pdev.as_ref(), bar, spec.chipset)?; in new()
290 spec.chipset, in new()
292 spec.chipset > Chipset::GA100, in new()
296 let _sec2_falcon = Falcon::<Sec2>::new(pdev.as_ref(), spec.chipset, bar, true)?; in new()
298 let fb_layout = FbLayout::new(spec.chipset, bar)?; in new()
A Dfb.rs34 chipset: Chipset, field
45 chipset: Chipset, in register()
49 hal::fb_hal(chipset).write_sysmem_flush_page(bar, page.dma_handle())?; in register()
52 chipset, in register()
63 let hal = hal::fb_hal(self.chipset); in unregister()
96 pub(crate) fn new(chipset: Chipset, bar: &Bar0) -> Result<Self> { in new()
97 let hal = hal::fb_hal(chipset); in new()
A Dfirmware.rs32 pub(crate) fn new(dev: &device::Device, chipset: Chipset, ver: &str) -> Result<Firmware> { in new()
156 const fn make_entry_file(self, chipset: &str, fw: &str) -> Self { in make_entry_file()
161 .push(chipset) in make_entry_file()
170 const fn make_entry_chipset(self, chipset: &str) -> Self { in make_entry_chipset()
171 self.make_entry_file(chipset, "booter_load") in make_entry_chipset()
172 .make_entry_file(chipset, "booter_unload") in make_entry_chipset()
173 .make_entry_file(chipset, "bootloader") in make_entry_chipset()
174 .make_entry_file(chipset, "gsp") in make_entry_chipset()
/drivers/char/agp/
A DKconfig12 as a sort of "AGP driver" for the motherboard's chipset.
31 tristate "ALI chipset support"
37 For the ALi-chipset question, ALi suggests you refer to
42 timing issues, this chipset cannot do AGP 2x with the G200.
46 tristate "ATI chipset support"
53 tristate "AMD Irongate, 761, and 762 chipset support"
70 tristate "Intel 440LX/BX/GX, I8xx and E7x05 chipset support"
82 tristate "NVIDIA nForce/nForce2 chipset support"
89 tristate "SiS chipset support"
99 tristate "Serverworks LE/HE chipset support"
[all …]
/drivers/gpu/drm/nouveau/dispnv50/
A Dtile.h48 static inline int nouveau_get_gobs_in_block(u32 tile_mode, u16 chipset) in nouveau_get_gobs_in_block() argument
50 if (chipset >= 0xc0) in nouveau_get_gobs_in_block()
56 static inline bool nouveau_check_tile_mode(u32 tile_mode, u16 chipset) in nouveau_check_tile_mode() argument
58 if (chipset >= 0xc0) in nouveau_check_tile_mode()
/drivers/ata/
A Dpata_sis.c791 chipset = &sis100_early; in sis_init_one()
798 if (chipset == NULL) { in sis_init_one()
815 chipset = &sis133; in sis_init_one()
823 chipset = &sis133; in sis_init_one()
826 chipset = &sis133; in sis_init_one()
832 if (chipset == NULL) { in sis_init_one()
853 chipset = &sis133_early; in sis_init_one()
856 chipset = &sis100; in sis_init_one()
863 if (chipset == NULL) in sis_init_one()
866 ppi[0] = chipset->info; in sis_init_one()
[all …]
/drivers/net/wireless/realtek/rtw89/
A DKconfig51 Select this option will enable support for 8851BE chipset
62 Select this option will enable support for 8851BU chipset
73 Select this option will enable support for 8852AE chipset
85 Select this option will enable support for 8852BE chipset
97 Select this option will enable support for 8852BU chipset
109 Select this option will enable support for 8852BE-VT chipset
120 Select this option will enable support for 8852CE chipset
131 Select this option will enable support for 8922AE/8922AE-VS chipset
/drivers/net/arcnet/
A DKconfig15 chipset of your card. If you don't know, then it's probably a
16 COM90xx type card, so say Y (or M) to "ARCnet COM90xx chipset
74 tristate "ARCnet COM90xx (normal) chipset driver"
76 This is the chipset driver for the standard COM90xx cards. If you
84 tristate "ARCnet COM90xx (IO mapped) chipset driver"
86 This is the chipset driver for the COM90xx cards, using them in
95 tristate "ARCnet COM90xx (RIM I) chipset driver"
97 This is yet another chipset driver for the COM90xx cards, but this
106 tristate "ARCnet COM20020 chipset driver"
109 This is the driver for the new COM20020 chipset. It supports such
/drivers/gpu/drm/nouveau/nvkm/subdev/fb/
A Dnv30.c69 int b = (device->chipset > 0x30 ? in calc_bias()
98 if (device->chipset == 0x30 || in nv30_fb_init()
99 device->chipset == 0x31 || in nv30_fb_init()
100 device->chipset == 0x35) { in nv30_fb_init()
102 int n = (device->chipset == 0x31 ? 2 : 4); in nv30_fb_init()
/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
A Dnv50.c35 switch (device->chipset) { in read_div()
60 switch (device->chipset) { in read_pll_src()
170 if (device->chipset != 0xa0) in read_pll()
257 switch (device->chipset) { in nv50_clk_read()
266 if (device->chipset == 0xa0) /* wtf?? */ in nv50_clk_read()
294 switch (device->chipset) { in nv50_clk_read()
403 if (device->chipset != 0x98) in nv50_clk_calc()
411 if (device->chipset != 0x98) in nv50_clk_calc()
454 if (device->chipset < 0x92) in nv50_clk_calc()
528 switch (device->chipset) { in nv50_clk_new_()
/drivers/mfd/
A Dlpc_ich.c356 enum lpc_chipsets chipset; member
984 switch (lpc_chipset_info[priv->chipset].iTCO_version) { in lpc_ich_enable_acpi_space()
1038 info = &lpc_chipset_info[priv->chipset]; in lpc_ich_finalize_wdt_cell()
1144 lpc_chipset_info[priv->chipset].use_gpio = ret; in lpc_ich_init_gpio()
1320 info->type = lpc_chipset_info[priv->chipset].spi_type; in lpc_ich_init_spi()
1385 priv->chipset = id->driver_data; in lpc_ich_probe()
1394 if (priv->chipset <= LPC_ICH5) { in lpc_ich_probe()
1404 if (lpc_chipset_info[priv->chipset].iTCO_version) { in lpc_ich_probe()
1410 if (lpc_chipset_info[priv->chipset].gpio_version) { in lpc_ich_probe()
1416 if (lpc_chipset_info[priv->chipset].gpio_info) { in lpc_ich_probe()
[all …]
/drivers/gpu/drm/nouveau/nvkm/engine/disp/
A Dvga.c136 if (device->chipset == 0x11) { in nvkm_lockvgac()
165 if (device->chipset == 0x11) { in nvkm_rdvgaowner()
192 if (device->chipset == 0x11) { in nvkm_wrvgaowner()
200 if (device->chipset == 0x11) { in nvkm_wrvgaowner()
/drivers/gpu/drm/nouveau/nvkm/engine/
A Dfalcon.c138 if (device->chipset < 0xa3 || in nvkm_falcon_oneinit()
139 device->chipset == 0xaa || device->chipset == 0xac) { in nvkm_falcon_oneinit()
194 device->chipset, falcon->addr >> 12); in nvkm_falcon_init()
213 device->chipset, falcon->addr >> 12); in nvkm_falcon_init()
228 device->chipset, falcon->addr >> 12); in nvkm_falcon_init()
/drivers/ufs/host/
A DKconfig69 Select this if you have UFS controller on QCOM chipset.
84 Select this if you have UFS controller on Mediatek chipset.
94 Select this if you have UFS controller on Hisilicon chipset.
105 Select this if you have UFS controller on Renesas chipset.
143 Select this if you have UFS controller on Unisoc chipset.
155 Select this if you have UFS controller on Rockchip chipset.
/drivers/gpu/nova-core/fb/
A Dhal.rs29 pub(super) fn fb_hal(chipset: Chipset) -> &'static dyn FbHal { in fb_hal()
32 match chipset { in fb_hal()
/drivers/net/ethernet/amd/
A DKconfig13 If you have a network (Ethernet) chipset belonging to this class,
19 for your specific chipset/driver in the following questions.
84 on the AMD LANCE chipset: RieblCard (with or without battery), or
93 DEC (now Compaq) based on the AMD LANCE chipset, including the
94 DEPCA series. (This chipset is better known via the NE2100 cards.)
153 cards are based on the AMD LANCE chipset, which is better known
/drivers/gpu/nova-core/falcon/
A Dhal.rs42 chipset: Chipset, in falcon_hal()
46 let hal = match chipset { in falcon_hal()
/drivers/net/wireless/microchip/wilc1000/
A DKconfig17 WILC1000 chipset. The Atmel WILC1000 SDIO is a full speed interface.
33 WILC1000 chipset. The Atmel WILC1000 has a Serial Peripheral
45 chipset. This OOB interrupt is intended to provide a faster interrupt

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