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Searched refs:chn (Results 1 – 25 of 32) sorted by relevance

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/drivers/pwm/
A Dpwm-sprd.c37 struct sprd_pwm_chn chn[SPRD_PWM_CHN_NUM]; member
75 struct sprd_pwm_chn *chn = &spc->chn[pwm->hwpwm]; in sprd_pwm_get_state() local
126 struct sprd_pwm_chn *chn = &spc->chn[pwm->hwpwm]; in sprd_pwm_config() local
142 tmp = (u64)chn->clk_rate * period_ns; in sprd_pwm_config()
167 struct sprd_pwm_chn *chn = &spc->chn[pwm->hwpwm]; in sprd_pwm_apply() local
181 chn->clks); in sprd_pwm_apply()
225 chn[i].clks[j].id = in sprd_pwm_clk_init()
229 chn[i].clks); in sprd_pwm_clk_init()
239 chn[i].clk_rate = clk_get_rate(clk_pwm); in sprd_pwm_clk_init()
252 struct sprd_pwm_chn chn[SPRD_PWM_CHN_NUM]; in sprd_pwm_probe() local
[all …]
/drivers/thermal/
A Drockchip_thermal.c195 #define TSADCV2_DATA(chn) (0x20 + (chn) * 0x04) argument
198 #define TSADCV3_DATA(chn) (0x2c + (chn) * 0x04) argument
212 #define TSADCV2_AUTO_SRC_EN(chn) BIT(4 + (chn)) argument
213 #define TSADCV3_AUTO_SRC_EN(chn) BIT(chn) argument
214 #define TSADCV3_AUTO_SRC_EN_MASK(chn) BIT(16 + chn) argument
220 #define TSADCV2_INT_SRC_EN(chn) BIT(chn) argument
221 #define TSADCV2_INT_SRC_EN_MASK(chn) BIT(16 + (chn)) argument
222 #define TSADCV2_SHUT_2GPIO_SRC_EN(chn) BIT(4 + (chn)) argument
223 #define TSADCV2_SHUT_2CRU_SRC_EN(chn) BIT(8 + (chn)) argument
1713 u32 chn; in rockchip_thermal_probe() local
[all …]
/drivers/iio/adc/
A Dtwl6030-gpadc.c624 int chn; in twl6030_calibration() local
642 for (chn = 0; chn < TWL6030_GPADC_MAX_CHANNELS; chn++) { in twl6030_calibration()
644 switch (chn) { in twl6030_calibration()
688 twl6030_calibrate_channel(gpadc, chn, d1, d2); in twl6030_calibration()
710 int chn, d1 = 0, d2 = 0, temp; in twl6032_calibration() local
727 for (chn = 0; chn < TWL6032_GPADC_MAX_CHANNELS; chn++) { in twl6032_calibration()
729 switch (chn) { in twl6032_calibration()
796 twl6030_calibrate_channel(gpadc, chn, d1, d2); in twl6032_calibration()
802 #define TWL6030_GPADC_CHAN(chn, _type, chan_info) { \ argument
804 .channel = chn, \
A Drockchip_saradc.c63 void (*start)(struct rockchip_saradc *info, int chn);
86 static void rockchip_saradc_start_v1(struct rockchip_saradc *info, int chn) in rockchip_saradc_start_v1() argument
91 writel(SARADC_CTRL_POWER_CTRL | (chn & SARADC_CTRL_CHN_MASK) | in rockchip_saradc_start_v1()
95 static void rockchip_saradc_start_v2(struct rockchip_saradc *info, int chn) in rockchip_saradc_start_v2() argument
109 FIELD_PREP(SARADC2_CONV_CHANNELS, chn); in rockchip_saradc_start_v2()
114 static void rockchip_saradc_start(struct rockchip_saradc *info, int chn) in rockchip_saradc_start() argument
116 info->data->start(info, chn); in rockchip_saradc_start()
A Dti-ads131e08.c616 unsigned int chn, i = 0; in ads131e08_trigger_handler() local
638 iio_for_each_active_channel(indio_dev, chn) { in ads131e08_trigger_handler()
639 src = st->rx_buf + ADS131E08_NUM_STATUS_BYTES + chn * num_bytes; in ads131e08_trigger_handler()
/drivers/edac/
A Dedac_mc.c182 int i, chn, row; in mci_release() local
197 for (chn = 0; chn < mci->num_cschannel; chn++) in mci_release()
214 unsigned int row, chn; in edac_mc_alloc_csrows() local
239 for (chn = 0; chn < tot_channels; chn++) { in edac_mc_alloc_csrows()
247 chan->chan_idx = chn; in edac_mc_alloc_csrows()
258 unsigned int row, chn, idx; in edac_mc_alloc_dimms() local
271 chn = 0; in edac_mc_alloc_dimms()
306 dimm->cschannel = chn; in edac_mc_alloc_dimms()
310 chn++; in edac_mc_alloc_dimms()
312 chn = 0; in edac_mc_alloc_dimms()
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/drivers/s390/cio/
A Dcrw.c86 tmp_crw.chn, tmp_crw.rsc, tmp_crw.anc, in crw_collect_info()
92 chain = tmp_crw.chn ? chain + 1 : 0; in crw_collect_info()
100 crw[chain].slct, crw[chain].oflw, crw[chain].chn, in crw_collect_info()
117 if (crw[0].chn && !chain) { in crw_collect_info()
127 chain = crw[chain].chn ? chain + 1 : 0; in crw_collect_info()
A Dcio_inject.c88 u32 slct, oflw, chn, rsc, anc, erc, rsid; in crw_inject_write() local
102 rc = sscanf(buffer, "%x %x %x %x %x %x %x", &slct, &oflw, &chn, &rsc, &anc, in crw_inject_write()
114 crw.chn = chn; in crw_inject_write()
A Dtrace.h367 __field(u8, chn)
378 __entry->chn = crw->chn;
387 __entry->chn, __entry->rsc, __entry->anc,
/drivers/media/pci/intel/ipu6/
A Dipu6-platform-isys-csi2-reg.h42 #define IPU_CSI_RX_IRQ_FS_VC(chn) (1 << ((chn) * 2)) argument
43 #define IPU_CSI_RX_IRQ_FE_VC(chn) (2 << ((chn) * 2)) argument
/drivers/dma/ti/
A Dk3-udma-glue.c226 struct device *dev = chn->common.dev; in k3_udma_glue_dump_tx_rt_chn()
232 xudma_tchanrt_read(chn->udma_tchanx, in k3_udma_glue_dump_tx_rt_chn()
879 chn->udma_rchan_id, in k3_udma_glue_dump_rx_chn()
880 chn->common.src_thread, in k3_udma_glue_dump_rx_chn()
881 chn->common.dst_thread, in k3_udma_glue_dump_rx_chn()
882 chn->common.epib, in k3_udma_glue_dump_rx_chn()
883 chn->common.hdesc_size, in k3_udma_glue_dump_rx_chn()
884 chn->common.psdata_size, in k3_udma_glue_dump_rx_chn()
885 chn->common.swdata_size, in k3_udma_glue_dump_rx_chn()
886 chn->flow_id_base, in k3_udma_glue_dump_rx_chn()
[all …]
/drivers/tty/serial/
A Dsprd_serial.c116 struct dma_chan *chn; member
234 dmaengine_pause(sp->tx_dma.chn); in sprd_stop_tx_dma()
244 dmaengine_terminate_all(sp->tx_dma.chn); in sprd_stop_tx_dma()
313 dma_async_issue_pending(ud->chn); in sprd_uart_dma_submit()
505 dma_release_channel(sp->rx_dma.chn); in sprd_release_dma()
508 dma_release_channel(sp->tx_dma.chn); in sprd_release_dma()
523 if (IS_ERR(sp->tx_dma.chn)) { in sprd_request_dma()
525 PTR_ERR(sp->tx_dma.chn)); in sprd_request_dma()
530 if (IS_ERR(sp->rx_dma.chn)) { in sprd_request_dma()
532 PTR_ERR(sp->rx_dma.chn)); in sprd_request_dma()
[all …]
/drivers/net/ethernet/ti/icssg/
A Dicssg_common.c133 int emac_tx_complete_packets(struct prueth_emac *emac, int chn, in emac_tx_complete_packets() argument
147 tx_chn = &emac->tx_chns[chn]; in emac_tx_complete_packets()
192 netif_txq = netdev_get_tx_queue(ndev, chn); in emac_tx_complete_packets()
1148 struct prueth_rx_chn *chn, in prueth_prepare_rx_chan() argument
1155 pool = prueth_create_page_pool(emac, chn->dma_dev, chn->descs_num); in prueth_prepare_rx_chan()
1159 chn->pg_pool = pool; in prueth_prepare_rx_chan()
1161 for (i = 0; i < chn->descs_num; i++) { in prueth_prepare_rx_chan()
1177 chn->name, ret); in prueth_prepare_rx_chan()
1207 void prueth_reset_rx_chan(struct prueth_rx_chn *chn, in prueth_reset_rx_chan() argument
1213 k3_udma_glue_reset_rx_chn(chn->rx_chn, i, chn, in prueth_reset_rx_chan()
[all …]
A Dicssg_prueth.h456 int emac_tx_complete_packets(struct prueth_emac *emac, int chn,
475 struct prueth_rx_chn *chn,
479 void prueth_reset_rx_chan(struct prueth_rx_chn *chn,
/drivers/dma/
A Ddma-jz4780.c184 unsigned int chn, unsigned int reg) in jz4780_dma_chn_readl() argument
186 return readl(jzdma->chn_base + reg + JZ_DMA_REG_CHAN(chn)); in jz4780_dma_chn_readl()
190 unsigned int chn, unsigned int reg, u32 val) in jz4780_dma_chn_writel() argument
192 writel(val, jzdma->chn_base + reg + JZ_DMA_REG_CHAN(chn)); in jz4780_dma_chn_writel()
208 unsigned int chn) in jz4780_dma_chan_enable() argument
218 jz4780_dma_ctrl_writel(jzdma, reg, BIT(chn)); in jz4780_dma_chan_enable()
223 unsigned int chn) in jz4780_dma_chan_disable() argument
227 jz4780_dma_ctrl_writel(jzdma, JZ_DMA_REG_DCKEC, BIT(chn)); in jz4780_dma_chan_disable()
A Dsprd-dma.c437 u32 val, chn = schan->chn_num + 1; in sprd_dma_set_2stage_config() local
441 val = chn & SPRD_DMA_GLB_SRC_CHN_MASK; in sprd_dma_set_2stage_config()
451 val = chn & SPRD_DMA_GLB_SRC_CHN_MASK; in sprd_dma_set_2stage_config()
461 val = (chn << SPRD_DMA_GLB_DEST_CHN_OFFSET) & in sprd_dma_set_2stage_config()
471 val = (chn << SPRD_DMA_GLB_DEST_CHN_OFFSET) & in sprd_dma_set_2stage_config()
/drivers/iio/pressure/
A Ddlhl60d.c247 unsigned int chn, i = 0; in dlh_trigger_handler() local
254 iio_for_each_active_channel(indio_dev, chn) { in dlh_trigger_handler()
256 &st->rx_buf[1] + chn * DLH_NUM_DATA_BYTES, in dlh_trigger_handler()
/drivers/clk/imx/
A Dclk.c33 unsigned int chn) in imx_mmdc_mask_handshake() argument
38 reg |= chn == 0 ? CCDR_MMDC_CH0_MASK : CCDR_MMDC_CH1_MASK; in imx_mmdc_mask_handshake()
/drivers/scsi/aacraid/
A Dlinit.c393 int chn, tid; in aac_sdev_configure() local
400 chn = aac_logical_to_phys(sdev_channel(sdev)); in aac_sdev_configure()
402 if (chn < AAC_MAX_BUSES && tid < AAC_MAX_TARGETS && aac->sa_firmware) { in aac_sdev_configure()
403 devtype = aac->hba_map[chn][tid].devtype; in aac_sdev_configure()
406 depth = aac->hba_map[chn][tid].qd_limit; in aac_sdev_configure()
521 int chn, tid, is_native_device = 0; in aac_change_queue_depth() local
523 chn = aac_logical_to_phys(sdev_channel(sdev)); in aac_change_queue_depth()
525 if (chn < AAC_MAX_BUSES && tid < AAC_MAX_TARGETS && in aac_change_queue_depth()
526 aac->hba_map[chn][tid].devtype == AAC_DEVTYPE_NATIVE_RAW) in aac_change_queue_depth()
551 scsi_change_queue_depth(sdev, aac->hba_map[chn][tid].qd_limit); in aac_change_queue_depth()
A Dcommctrl.c488 u32 chn; in aac_send_raw_srb() local
581 chn = user_srbcmd->channel; in aac_send_raw_srb()
582 if (chn < AAC_MAX_BUSES && user_srbcmd->id < AAC_MAX_TARGETS && in aac_send_raw_srb()
583 dev->hba_map[chn][user_srbcmd->id].devtype == in aac_send_raw_srb()
603 hbacmd->it_nexus = dev->hba_map[chn][user_srbcmd->id].rmw_nexus; in aac_send_raw_srb()
/drivers/xen/
A Dxen-scsiback.c72 unsigned int chn; /* channel */ member
658 if ((entry->v.chn == v->chn) && in scsiback_do_translation()
721 vir.chn = ring_req->channel; in prepare_pending_reqs()
728 vir.chn, vir.tgt, vir.lun); in prepare_pending_reqs()
911 if ((entry->v.chn == v->chn) && in scsiback_chk_translation_entry()
1114 &vir.hst, &vir.chn, &vir.tgt, &vir.lun); in scsiback_do_1lun_hotplug()
/drivers/scsi/
A Dxen-scsifront.c1048 unsigned int hst, chn, tgt, lun; in scsifront_do_lun_hotplug() local
1073 "%u:%u:%u:%u", &hst, &chn, &tgt, &lun); in scsifront_do_lun_hotplug()
1090 if (scsi_add_device(info->host, chn, tgt, lun)) { in scsifront_do_lun_hotplug()
1104 sdev = scsi_device_lookup(info->host, chn, tgt, lun); in scsifront_do_lun_hotplug()
/drivers/hv/
A Dchannel_mgmt.c707 static bool hv_cpuself_used(u32 cpu, struct vmbus_channel *chn) in hv_cpuself_used() argument
709 struct vmbus_channel *primary = chn->primary_channel; in hv_cpuself_used()
721 if (sc != chn && sc->target_cpu == cpu) in hv_cpuself_used()
/drivers/iio/imu/
A Dadis16400.c645 #define ADIS16400_VOLTAGE_CHAN(addr, bits, name, si, chn) { \ argument
648 .channel = chn, \
/drivers/net/hyperv/
A Dnetvsc_drv.c161 struct vmbus_channel *chn in netvsc_wait_until_empty() local
164 if (!chn) in netvsc_wait_until_empty()
170 aread = hv_get_bytes_to_read(&chn->inbound); in netvsc_wait_until_empty()
174 aread = hv_get_bytes_to_read(&chn->outbound); in netvsc_wait_until_empty()

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