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Searched refs:clk (Results 1 – 25 of 1944) sorted by relevance

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/drivers/clk/imx/
A Dclk-imx5.c128 static struct clk *clk[IMX5_CLK_END]; variable
277 clk_set_parent(clk[IMX5_CLK_USB_PHY_SEL], clk[IMX5_CLK_OSC]); in mx5_clocks_common_init()
340 imx_check_clocks(clk, ARRAY_SIZE(clk)); in mx50_clocks_init()
347 clk_set_parent(clk[IMX5_CLK_ESDHC_A_SEL], clk[IMX5_CLK_PLL2_SW]); in mx50_clocks_init()
348 clk_set_parent(clk[IMX5_CLK_ESDHC_B_SEL], clk[IMX5_CLK_PLL2_SW]); in mx50_clocks_init()
431 imx_check_clocks(clk, ARRAY_SIZE(clk)); in mx51_clocks_init()
438 clk_set_parent(clk[IMX5_CLK_USBOH3_SEL], clk[IMX5_CLK_PLL2_SW]); in mx51_clocks_init()
441 clk_set_parent(clk[IMX5_CLK_ESDHC_A_SEL], clk[IMX5_CLK_PLL2_SW]); in mx51_clocks_init()
585 imx_check_clocks(clk, ARRAY_SIZE(clk)); in mx53_clocks_init()
600 clk_set_parent(clk[IMX5_CLK_CAN_SEL], clk[IMX5_CLK_LP_APM]); in mx53_clocks_init()
[all …]
A Dclk-vf610.c113 static struct clk *clk[VF610_CLK_END]; variable
134 struct clk *clk = of_clk_get_by_name(ccm_node, name); in vf610_get_fixed_clock() local
139 return clk; in vf610_get_fixed_clock()
236 clk_set_parent(clk[VF610_PLL1_BYPASS], clk[VF610_CLK_PLL1]); in vf610_clocks_init()
237 clk_set_parent(clk[VF610_PLL2_BYPASS], clk[VF610_CLK_PLL2]); in vf610_clocks_init()
238 clk_set_parent(clk[VF610_PLL3_BYPASS], clk[VF610_CLK_PLL3]); in vf610_clocks_init()
239 clk_set_parent(clk[VF610_PLL4_BYPASS], clk[VF610_CLK_PLL4]); in vf610_clocks_init()
240 clk_set_parent(clk[VF610_PLL5_BYPASS], clk[VF610_CLK_PLL5]); in vf610_clocks_init()
241 clk_set_parent(clk[VF610_PLL6_BYPASS], clk[VF610_CLK_PLL6]); in vf610_clocks_init()
242 clk_set_parent(clk[VF610_PLL7_BYPASS], clk[VF610_CLK_PLL7]); in vf610_clocks_init()
[all …]
A DMakefile3 mxc-clk-objs += clk.o
4 mxc-clk-objs += clk-busy.o
5 mxc-clk-objs += clk-composite-7ulp.o
6 mxc-clk-objs += clk-composite-8m.o
9 mxc-clk-objs += clk-cpu.o
14 mxc-clk-objs += clk-gate2.o
17 mxc-clk-objs += clk-pfd.o
18 mxc-clk-objs += clk-pfdv2.o
19 mxc-clk-objs += clk-pllv1.o
20 mxc-clk-objs += clk-pllv2.o
[all …]
A Dclk-imx27.c48 static struct clk *clk[IMX27_CLK_MAX]; variable
55 clk[IMX27_CLK_DUMMY] = imx_clk_fixed("dummy", 0); in _mx27_clocks_init()
56 clk[IMX27_CLK_CKIH] = imx_clk_fixed("ckih", fref); in _mx27_clocks_init()
57 clk[IMX27_CLK_CKIL] = imx_clk_fixed("ckil", 32768); in _mx27_clocks_init()
58 clk[IMX27_CLK_FPM] = imx_clk_fixed_factor("fpm", "ckil", 1024, 1); in _mx27_clocks_init()
70 clk[IMX27_CLK_IPG] = imx_clk_fixed_factor("ipg", "ahb", 1, 2); in _mx27_clocks_init()
161 imx_check_clocks(clk, ARRAY_SIZE(clk)); in _mx27_clocks_init()
163 clk_register_clkdev(clk[IMX27_CLK_CPU_DIV], NULL, "cpu0"); in _mx27_clocks_init()
165 clk_prepare_enable(clk[IMX27_CLK_EMI_AHB_GATE]); in _mx27_clocks_init()
191 clk_data.clks = clk; in mx27_clocks_init_dt()
[all …]
A Dclk-imx25.c75 static struct clk *clk[clk_max]; variable
81 clk[dummy] = imx_clk_fixed("dummy", 0); in __mx25_clocks_init()
87 clk[ahb] = imx_clk_divider("ahb", "cpu", ccm(CCM_CCTL), 28, 2); in __mx25_clocks_init()
89 clk[ipg] = imx_clk_fixed_factor("ipg", "ahb", 1, 2); in __mx25_clocks_init()
108 clk[cko] = imx_clk_gate("cko", "cko_div", ccm(CCM_MCR), 30); in __mx25_clocks_init()
209 imx_check_clocks(clk, ARRAY_SIZE(clk)); in __mx25_clocks_init()
211 clk_prepare_enable(clk[emi_ahb]); in __mx25_clocks_init()
214 clk_set_parent(clk[per5_sel], clk[ahb]); in __mx25_clocks_init()
220 clk_set_parent(clk[cko_sel], clk[ipg]); in __mx25_clocks_init()
234 clk_data.clks = clk; in mx25_clocks_init_dt()
[all …]
A Dclk-imx35.c82 static struct clk *clk[clk_max]; variable
218 imx_check_clocks(clk, ARRAY_SIZE(clk)); in _mx35_clocks_init()
220 clk_prepare_enable(clk[spba_gate]); in _mx35_clocks_init()
221 clk_prepare_enable(clk[gpio1_gate]); in _mx35_clocks_init()
222 clk_prepare_enable(clk[gpio2_gate]); in _mx35_clocks_init()
224 clk_prepare_enable(clk[iim_gate]); in _mx35_clocks_init()
225 clk_prepare_enable(clk[emi_gate]); in _mx35_clocks_init()
226 clk_prepare_enable(clk[max_gate]); in _mx35_clocks_init()
235 clk_prepare_enable(clk[scc_gate]); in _mx35_clocks_init()
246 clk_data.clks = clk; in mx35_clocks_init_dt()
[all …]
A Dclk-imx31.c50 static struct clk *clk[clk_max]; variable
55 clk[dummy] = imx_clk_fixed("dummy", 0); in _mx31_clocks_init()
56 clk[ckih] = imx_clk_fixed("ckih", fref); in _mx31_clocks_init()
57 clk[ckil] = imx_clk_fixed("ckil", 32768); in _mx31_clocks_init()
115 imx_check_clocks(clk, ARRAY_SIZE(clk)); in _mx31_clocks_init()
117 clk_set_parent(clk[csi], clk[upll]); in _mx31_clocks_init()
118 clk_prepare_enable(clk[emi_gate]); in _mx31_clocks_init()
119 clk_prepare_enable(clk[iim_gate]); in _mx31_clocks_init()
121 clk_disable_unprepare(clk[iim_gate]); in _mx31_clocks_init()
146 clk_data.clks = clk; in mx31_clocks_init_dt()
[all …]
A Dclk-scu.c90 u8 clk; member
95 u8 clk; member
243 msg.data.req.clk = clk->clk_type; in clk_scu_recalc_rate()
316 msg.clk = clk->clk_type; in clk_scu_set_rate()
334 msg.data.req.clk = clk->clk_type; in clk_scu_get_parent()
361 msg.clk = clk->clk_type; in clk_scu_set_parent()
388 msg.clk = clk; in sc_pm_clock_enable()
460 clk = kzalloc(sizeof(*clk), GFP_KERNEL); in __imx_clk_scu()
540 hw = __imx_clk_scu(dev, clk->name, clk->parents, clk->num_parents, in imx_clk_scu_probe()
541 clk->rsrc, clk->clk_type); in imx_clk_scu_probe()
[all …]
/drivers/sh/clk/
A Dcpg.c19 static unsigned int sh_clk_read(struct clk *clk) in sh_clk_read() argument
32 (phys_addr_t)clk->enable_reg + clk->mapped_reg; in sh_clk_read_status()
52 static int sh_clk_mstp_enable(struct clk *clk) in sh_clk_mstp_enable() argument
54 sh_clk_write(sh_clk_read(clk) & ~(1 << clk->enable_bit), clk); in sh_clk_mstp_enable()
64 clk->enable_reg, clk->enable_bit); in sh_clk_mstp_enable()
73 sh_clk_write(sh_clk_read(clk) | (1 << clk->enable_bit), clk); in sh_clk_mstp_disable()
126 idx = (sh_clk_read(clk) >> clk->enable_bit) & clk->div_mask; in sh_clk_div_recalc()
220 clk_reparent(clk, clk->parent_table[val]); in sh_clk_init_parent()
282 static int sh_clk_div6_set_parent(struct clk *clk, struct clk *parent) in sh_clk_div6_set_parent() argument
339 static int sh_clk_div4_set_parent(struct clk *clk, struct clk *parent) in sh_clk_div4_set_parent() argument
[all …]
A Dcore.c246 clk->ops->disable(clk); in __clk_disable()
330 static struct clk *lookup_root_clock(struct clk *clk) in lookup_root_clock() argument
333 clk = clk->parent; in lookup_root_clock()
442 clk->ops->init(clk); in clk_register()
500 clk->rate = clk->ops->recalc(clk); in clk_set_rate()
511 int clk_set_parent(struct clk *clk, struct clk *parent) in clk_set_parent() argument
530 clk->rate = clk->ops->recalc(clk); in clk_set_parent()
532 clk, clk->parent, clk->rate); in clk_set_parent()
543 struct clk *clk_get_parent(struct clk *clk) in clk_get_parent() argument
607 struct clk *clk; in clk_late_init() local
[all …]
/drivers/clk/spear/
A Dspear3xx_clock.c141 struct clk *clk; in spear300_clk_init() local
171 struct clk *clk; in spear310_clk_init() local
175 clk_register_clkdev(clk, "emi", NULL); in spear310_clk_init()
183 clk_register_clkdev(clk, NULL, "tdm"); in spear310_clk_init()
247 struct clk *ras_apb_clk) in spear320_clk_init()
249 struct clk *clk; in spear320_clk_init() local
261 clk_register_clkdev(clk, "emi", NULL); in spear320_clk_init()
345 clk_set_parent(clk, ras_apb_clk); in spear320_clk_init()
354 clk_set_parent(clk, ras_apb_clk); in spear320_clk_init()
390 struct clk *clk, *clk1, *ras_apb_clk; in spear3xx_clk_init() local
[all …]
A Dspear1310_clock.c384 struct clk *clk, *clk1; in spear1310_clk_init() local
485 clk_register_clkdev(clk, "ddr_clk", NULL); in spear1310_clk_init()
490 clk_register_clkdev(clk, "cpu_clk", NULL); in spear1310_clk_init()
498 clk_register_clkdev(clk, NULL, "smp_twd"); in spear1310_clk_init()
502 clk_register_clkdev(clk, "ahb_clk", NULL); in spear1310_clk_init()
517 clk_register_clkdev(clk, NULL, "gpt0"); in spear1310_clk_init()
527 clk_register_clkdev(clk, NULL, "gpt1"); in spear1310_clk_init()
537 clk_register_clkdev(clk, NULL, "gpt2"); in spear1310_clk_init()
547 clk_register_clkdev(clk, NULL, "gpt3"); in spear1310_clk_init()
607 clk_register_clkdev(clk, NULL, "c3"); in spear1310_clk_init()
[all …]
A Dspear1340_clock.c441 struct clk *clk, *clk1; in spear1340_clk_init() local
542 clk_register_clkdev(clk, "ddr_clk", NULL); in spear1340_clk_init()
563 clk_register_clkdev(clk, "cpu_clk", NULL); in spear1340_clk_init()
575 clk_register_clkdev(clk, NULL, "smp_twd"); in spear1340_clk_init()
581 clk_register_clkdev(clk, "ahb_clk", NULL); in spear1340_clk_init()
585 clk_register_clkdev(clk, "apb_clk", NULL); in spear1340_clk_init()
596 clk_register_clkdev(clk, NULL, "gpt0"); in spear1340_clk_init()
606 clk_register_clkdev(clk, NULL, "gpt1"); in spear1340_clk_init()
616 clk_register_clkdev(clk, NULL, "gpt2"); in spear1340_clk_init()
626 clk_register_clkdev(clk, NULL, "gpt3"); in spear1340_clk_init()
[all …]
A Dspear6xx_clock.c116 struct clk *clk, *clk1; in spear6xx_clk_init() local
132 clk_register_clkdev(clk, "pll3_clk", NULL); in spear6xx_clk_init()
137 clk_register_clkdev(clk, "vco1_clk", NULL); in spear6xx_clk_init()
153 clk_register_clkdev(clk, "cpu_clk", NULL); in spear6xx_clk_init()
158 clk_register_clkdev(clk, "ahb_clk", NULL); in spear6xx_clk_init()
194 clk_register_clkdev(clk, NULL, "firda"); in spear6xx_clk_init()
220 clk_register_clkdev(clk, NULL, "gpt0"); in spear6xx_clk_init()
229 clk_register_clkdev(clk, NULL, "gpt1"); in spear6xx_clk_init()
242 clk_register_clkdev(clk, NULL, "gpt2"); in spear6xx_clk_init()
255 clk_register_clkdev(clk, NULL, "gpt3"); in spear6xx_clk_init()
[all …]
/drivers/clk/mediatek/
A DMakefile2 obj-$(CONFIG_COMMON_CLK_MEDIATEK) += clk-mtk.o clk-pll.o clk-gate.o clk-apmixed.o clk-cpumux.o rese…
3 obj-$(CONFIG_COMMON_CLK_MEDIATEK_FHCTL) += clk-fhctl.o clk-pllfh.o
5 obj-$(CONFIG_COMMON_CLK_MT6735) += clk-mt6735-apmixedsys.o clk-mt6735-infracfg.o clk-mt6735-pericfg…
27 clk-mt6795-pericfg.o clk-mt6795-topckgen.o
46 obj-$(CONFIG_COMMON_CLK_MT2712) += clk-mt2712-apmixedsys.o clk-mt2712.o
75 obj-$(CONFIG_COMMON_CLK_MT8135) += clk-mt8135-apmixedsys.o clk-mt8135.o
76 obj-$(CONFIG_COMMON_CLK_MT8167) += clk-mt8167-apmixedsys.o clk-mt8167.o
83 clk-mt8173-pericfg.o clk-mt8173-topckgen.o
88 obj-$(CONFIG_COMMON_CLK_MT8183) += clk-mt8183-apmixedsys.o clk-mt8183.o
114 clk-mt8188-peri_ao.o clk-mt8188-infra_ao.o
[all …]
/drivers/clk/ux500/
A Du8500_of_clk.c32 struct clk **clk_data = data; in ux500_twocell_get()
130 struct clk *clk, *rtc_clk, *twd_clk; in u8500_clk_init() local
305 PRCC_PCLK_STORE(clk, 1, 0); in u8500_clk_init()
309 PRCC_PCLK_STORE(clk, 1, 1); in u8500_clk_init()
313 PRCC_PCLK_STORE(clk, 1, 2); in u8500_clk_init()
317 PRCC_PCLK_STORE(clk, 1, 3); in u8500_clk_init()
321 PRCC_PCLK_STORE(clk, 1, 4); in u8500_clk_init()
325 PRCC_PCLK_STORE(clk, 1, 5); in u8500_clk_init()
329 PRCC_PCLK_STORE(clk, 1, 6); in u8500_clk_init()
333 PRCC_PCLK_STORE(clk, 1, 7); in u8500_clk_init()
[all …]
/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
A Dbase.c195 ret = clk->func->calc(clk, cstate); in nvkm_cstate_prog()
197 ret = clk->func->prog(clk); in nvkm_cstate_prog()
198 clk->func->tidy(clk); in nvkm_cstate_prog()
311 clk->pstate, clk->pwrsrc, clk->ustate_ac, clk->ustate_dc, in nvkm_pstate_work()
312 clk->astate, clk->temp, clk->dstate); in nvkm_pstate_work()
314 pstate = clk->pwrsrc ? clk->ustate_ac : clk->ustate_dc; in nvkm_pstate_work()
537 clk->astate = min(clk->astate, clk->state_nr - 1); in nvkm_clk_astate()
556 clk->dstate = min(clk->dstate, clk->state_nr - 1); in nvkm_clk_dstate()
585 clk->func->fini(clk); in nvkm_clk_fini()
613 return clk->func->init(clk); in nvkm_clk_init()
[all …]
A Dmcp77.c254 clk->sctrl = P1 << 16; in mcp77_clk_calc()
263 clk->vdiv = divs << 16; in mcp77_clk_calc()
266 clk->vdiv = P1 << 16; in mcp77_clk_calc()
271 clk->ccoef, clk->cpost, clk->cctrl); in mcp77_clk_calc()
273 clk->scoef, clk->spost, clk->sctrl); in mcp77_clk_calc()
315 switch (clk->csrc) { in mcp77_clk_prog()
332 switch (clk->ssrc) { in mcp77_clk_prog()
360 switch (clk->vsrc) { in mcp77_clk_prog()
415 struct mcp77_clk *clk; in mcp77_clk_new() local
417 if (!(clk = kzalloc(sizeof(*clk), GFP_KERNEL))) in mcp77_clk_new()
[all …]
A Dgm20b.c477 gm20b_dvfs_calc_det_coeff(clk, clk->new_uv, &clk->new_dvfs); in gm20b_clk_calc()
579 if (clk->uv == clk->new_uv) in gm20b_clk_prog()
605 if (clk->uv < clk->new_uv) in gm20b_clk_prog()
630 clk->uv = clk->new_uv; in gm20b_clk_prog()
631 clk->dvfs = clk->new_dvfs; in gm20b_clk_prog()
632 clk->base.pll = clk->new_pll; in gm20b_clk_prog()
746 bool fused = clk->uvdet_offs && clk->uvdet_slope; in gm20b_clk_init_dvfs()
794 clk->uvdet_offs, clk->uvdet_slope); in gm20b_clk_init_dvfs()
798 gm20b_dvfs_calc_det_coeff(clk, clk->uv, &clk->dvfs); in gm20b_clk_init_dvfs()
917 clk = kzalloc(sizeof(*clk), GFP_KERNEL); in gm20b_clk_new_speedo0()
[all …]
A Dgt215.c99 sclk = read_vco(clk, idx); in read_clk()
194 info->clk = 0; in gt215_clk_info()
198 info->clk = 0x00000100; in gt215_clk_info()
201 info->clk = 0x00002100; in gt215_clk_info()
204 info->clk = 0x00002140; in gt215_clk_info()
278 &clk->eng[dom]); in calc_clk()
292 info->clk = 0; in calc_host()
505 prog_host(clk); in gt215_clk_prog()
543 struct gt215_clk *clk; in gt215_clk_new() local
545 if (!(clk = kzalloc(sizeof(*clk), GFP_KERNEL))) in gt215_clk_new()
[all …]
A Dgk20a.c136 clk->pl_to_div(low_pl), high_pl, clk->pl_to_div(high_pl)); in gk20a_pllg_calc_mnp()
144 for (m = clk->params->min_m; m <= clk->params->max_m; m++) { in gk20a_pllg_calc_mnp()
314 gk20a_pllg_disable(clk); in gk20a_pllg_program_mnp()
494 ret = gk20a_pllg_program_mnp_slide(clk, &clk->pll); in gk20a_clk_prog()
496 ret = gk20a_pllg_program_mnp(clk, &clk->pll); in gk20a_clk_prog()
627 clk->params = params; in gk20a_clk_ctor()
628 clk->parent_rate = clk_get_rate(tdev->clk); in gk20a_clk_ctor()
644 struct gk20a_clk *clk; in gk20a_clk_new() local
647 clk = kzalloc(sizeof(*clk), GFP_KERNEL); in gk20a_clk_new()
648 if (!clk) in gk20a_clk_new()
[all …]
/drivers/clk/
A DMakefile3 obj-$(CONFIG_HAVE_CLK) += clk-devres.o clk-bulk.o clkdev.o
4 obj-$(CONFIG_COMMON_CLK) += clk.o
5 obj-$(CONFIG_CLK_KUNIT_TEST) += clk-test.o
6 clk-test-y := clk_test.o \
23 obj-$(CONFIG_COMMON_CLK) += clk-divider.o
27 clk-fixed-rate-test-y := clk-fixed-rate_test.o kunit_clk_fixed_rate_test.dtbo.o
28 obj-$(CONFIG_COMMON_CLK) += clk-gate.o
31 obj-$(CONFIG_COMMON_CLK) += clk-mux.o
35 obj-$(CONFIG_COMMON_CLK) += clk-gpio.o
37 obj-$(CONFIG_COMMON_CLK) += clk-conf.o
[all …]
/drivers/clk/ti/
A Dautoidle.c41 if (clk->ops && clk->ops->deny_idle) { in _omap2_clk_deny_idle()
47 clk->ops->deny_idle(clk); in _omap2_clk_deny_idle()
56 if (clk->ops && clk->ops->allow_idle) { in _omap2_clk_allow_idle()
62 clk->ops->allow_idle(clk); in _omap2_clk_allow_idle()
75 int omap2_clk_deny_idle(struct clk *clk) in omap2_clk_deny_idle() argument
79 if (!clk) in omap2_clk_deny_idle()
99 int omap2_clk_allow_idle(struct clk *clk) in omap2_clk_allow_idle() argument
103 if (!clk) in omap2_clk_allow_idle()
194 clk = kzalloc(sizeof(*clk), GFP_KERNEL); in of_ti_clk_autoidle_setup()
196 if (!clk) in of_ti_clk_autoidle_setup()
[all …]
A Dclkt_dflt.c94 clk->ops->find_companion(clk, &companion_reg, &other_bit); in _omap2_module_wait_ready()
100 clk->ops->find_idlest(clk, &idlest_reg, &idlest_bit, &idlest_val); in _omap2_module_wait_ready()
196 struct clk_hw_omap *clk; in omap2_dflt_clk_enable() local
206 clk = to_clk_hw_omap(hw); in omap2_dflt_clk_enable()
209 ret = ti_clk_ll_ops->clkdm_clk_enable(clk->clkdm, hw->clk); in omap2_dflt_clk_enable()
228 if (clk->ops && clk->ops->find_idlest) in omap2_dflt_clk_enable()
245 struct clk_hw_omap *clk; in omap2_dflt_clk_disable() local
248 clk = to_clk_hw_omap(hw); in omap2_dflt_clk_disable()
259 clk->clkdm) in omap2_dflt_clk_disable()
260 ti_clk_ll_ops->clkdm_clk_disable(clk->clkdm, hw->clk); in omap2_dflt_clk_disable()
[all …]
/drivers/clk/rockchip/
A DMakefile8 clk-rockchip-y += clk.o
9 clk-rockchip-y += clk-pll.o
10 clk-rockchip-y += clk-cpu.o
11 clk-rockchip-y += clk-gate-grf.o
12 clk-rockchip-y += clk-half-divider.o
13 clk-rockchip-y += clk-inverter.o
14 clk-rockchip-y += clk-mmc-phase.o
15 clk-rockchip-y += clk-muxgrf.o
16 clk-rockchip-y += clk-ddr.o
17 clk-rockchip-y += gate-link.o
[all …]

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