Searched refs:clk2 (Results 1 – 10 of 10) sorted by relevance
| /drivers/clk/ti/ |
| A D | clk-33xx.c | 272 struct clk *clk1, *clk2; in am33xx_dt_clk_init() local
293 clk2 = clk_get_sys(NULL, "timer3_fck"); in am33xx_dt_clk_init()
294 clk_set_parent(clk2, clk1); in am33xx_dt_clk_init()
296 clk2 = clk_get_sys(NULL, "timer6_fck"); in am33xx_dt_clk_init()
297 clk_set_parent(clk2, clk1); in am33xx_dt_clk_init()
306 clk2 = clk_get_sys(NULL, "clkdiv32k_ick"); in am33xx_dt_clk_init()
307 clk_set_parent(clk1, clk2); in am33xx_dt_clk_init()
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| A D | clk-43xx.c | 275 struct clk *clk1, *clk2; in am43xx_dt_clk_init() local
297 clk2 = clk_get_sys(NULL, "dpll_core_m5_ck"); in am43xx_dt_clk_init()
298 clk_set_parent(clk1, clk2); in am43xx_dt_clk_init()
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| /drivers/clocksource/ |
| A D | timer-sp804.c | 259 struct clk *clk1, *clk2; in sp804_of_init() local
284 clk2 = of_clk_get(np, 1); in sp804_of_init()
285 if (IS_ERR(clk2)) { in sp804_of_init()
287 (int)PTR_ERR(clk2)); in sp804_of_init()
288 clk2 = NULL; in sp804_of_init()
291 clk2 = clk1; in sp804_of_init()
302 ret = sp804_clockevents_init(timer2_base, irq, clk2, name); in sp804_of_init()
317 name, clk2, 1); in sp804_of_init()
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| /drivers/phy/allwinner/ |
| A D | phy-sun4i-usb.c | 124 struct clk *clk2; member
275 clk_disable_unprepare(phy->clk2); in sun4i_usb_phy_init()
287 clk_disable_unprepare(phy->clk2); in sun4i_usb_phy_init()
296 clk_disable_unprepare(phy->clk2); in sun4i_usb_phy_init()
310 clk_disable_unprepare(phy->clk2); in sun4i_usb_phy_init()
321 clk_disable_unprepare(phy->clk2); in sun4i_usb_phy_init()
396 clk_disable_unprepare(phy->clk2); in sun4i_usb_phy_exit()
818 if (IS_ERR(phy->clk2)) { in sun4i_usb_phy_probe()
820 return PTR_ERR(phy->clk2); in sun4i_usb_phy_probe()
825 if (IS_ERR(phy->clk2)) { in sun4i_usb_phy_probe()
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| /drivers/clk/rockchip/ |
| A D | clk-rk3188.c | 823 struct clk *clk1, *clk2; in rk3188a_clk_init() local
845 clk2 = __clk_lookup("gpll"); in rk3188a_clk_init()
846 if (clk1 && clk2) { in rk3188a_clk_init()
849 ret = clk_set_parent(clk1, clk2); in rk3188a_clk_init()
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| /drivers/clk/renesas/ |
| A D | r9a08g045-cpg.c | 54 #define G3S_PLL146_CONF(clk1, clk2, setting) ((clk1) << 22 | (clk2) << 12 | (setting)) argument
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| A D | rzv2h-cpg.c | 225 unsigned int clk1, clk2; in rzv2h_cpg_pll_clk_recalc_rate() local
232 clk2 = readl(priv->base + CPG_PLL_CLK2(pll.offset)); in rzv2h_cpg_pll_clk_recalc_rate()
235 CPG_PLL_CLK1_KDIV(clk1), 16 + CPG_PLL_CLK2_SDIV(clk2)); in rzv2h_cpg_pll_clk_recalc_rate()
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| /drivers/gpu/drm/amd/pm/swsmu/smu13/ |
| A D | smu_v13_0_6_ppt.c | 1309 uint32_t clk1, clk2; in smu_v13_0_6_print_clks() local
1336 clk2 = clocks.data[i + 1].clocks_in_khz / 1000; in smu_v13_0_6_print_clks()
1340 } else if (curr_clk >= clk1 && curr_clk < clk2) { in smu_v13_0_6_print_clks()
1341 level = (curr_clk - clk1) <= (clk2 - curr_clk) ? in smu_v13_0_6_print_clks()
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| /drivers/pinctrl/ |
| A D | pinctrl-lpc18xx.c | 418 LPC_N(clk2, 0xc08, EMC, CLKOUT, R, R, SDMMC, EMC_ALT,I2S0_TX_MCLK,I2S1, 0, HS);
627 LPC18XX_PIN(clk2, PIN_CLK2),
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| /drivers/clk/qcom/ |
| A D | clk-rpmh.c | 377 DEFINE_CLK_RPMH_VRM(clk2, _a1, "clka2", 1);
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