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Searched refs:clk_src (Results 1 – 25 of 63) sorted by relevance

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/drivers/gpu/drm/amd/display/dc/dce/
A Ddce_clock_source.c42 (clk_src->regs->reg)
45 clk_src->base.ctx
54 clk_src->cs_shift->field_name, clk_src->cs_mask->field_name
497 clk_src, in dce110_get_pix_clk_dividers_helper()
642 clk_src->bios, in disable_spread_spectrum()
723 clk_src, in enable_spread_spectrum()
1473 clk_src->bios, in get_ss_info_from_atombios()
1570 clk_src, in ss_info_from_atombios_create()
1575 clk_src, in ss_info_from_atombios_create()
1580 clk_src, in ss_info_from_atombios_create()
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A Ddce_clock_source.h30 #define TO_DCE110_CLK_SRC(clk_src)\ argument
31 container_of(clk_src, struct dce110_clk_src, base)
257 struct dce110_clk_src *clk_src,
266 struct dce110_clk_src *clk_src,
275 struct dce110_clk_src *clk_src,
284 struct dce110_clk_src *clk_src,
293 struct dce110_clk_src *clk_src,
302 struct dce110_clk_src *clk_src,
311 struct dce110_clk_src *clk_src,
/drivers/net/ethernet/intel/ice/
A Dice_tspll.c102 enum ice_clk_src clk_src) in ice_tspll_check_params() argument
110 if (clk_src >= NUM_ICE_CLK_SRC) { in ice_tspll_check_params()
112 clk_src); in ice_tspll_check_params()
117 clk_src == ICE_CLK_SRC_TCXO) && in ice_tspll_check_params()
134 switch (clk_src) { in ice_tspll_clk_src_str()
180 enum ice_clk_src clk_src) in ice_tspll_cfg_e82x() argument
385 if (clk_src == ICE_CLK_SRC_TCXO) in ice_tspll_cfg_e825c()
547 enum ice_clk_src clk_src) in ice_tspll_cfg() argument
592 enum ice_clk_src clk_src; in ice_tspll_init() local
601 clk_src = (enum ice_clk_src)ts_info->clk_src; in ice_tspll_init()
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/drivers/gpu/drm/amd/display/dc/hwss/dce/
A Ddce_hwseq.c176 struct clock_source *clk_src, in dce_crtc_switch_to_clk_src() argument
179 if (clk_src->id == CLOCK_SOURCE_ID_DP_DTO || clk_src->dp_clk_src) { in dce_crtc_switch_to_clk_src()
183 } else if (clk_src->id >= CLOCK_SOURCE_COMBO_PHY_PLL0) { in dce_crtc_switch_to_clk_src()
184 uint32_t rate_source = clk_src->id - CLOCK_SOURCE_COMBO_PHY_PLL0; in dce_crtc_switch_to_clk_src()
193 } else if (clk_src->id <= CLOCK_SOURCE_ID_PLL2) { in dce_crtc_switch_to_clk_src()
194 uint32_t rate_source = clk_src->id - CLOCK_SOURCE_ID_PLL0; in dce_crtc_switch_to_clk_src()
205 clk_src->id, tg_inst); in dce_crtc_switch_to_clk_src()
/drivers/gpu/drm/omapdrm/dss/
A Ddss.c67 enum dss_clk_source clk_src);
178 enum dss_clk_source clk_src, in dss_ctrl_pll_set_control_mux() argument
190 switch (clk_src) { in dss_ctrl_pll_set_control_mux()
204 switch (clk_src) { in dss_ctrl_pll_set_control_mux()
220 switch (clk_src) { in dss_ctrl_pll_set_control_mux()
406 enum dss_clk_source clk_src) in dss_select_dispc_clk_source() argument
417 switch (clk_src) { in dss_select_dispc_clk_source()
436 dss->dispc_clk_source = clk_src; in dss_select_dispc_clk_source()
444 switch (clk_src) { in dss_select_dsi_clk_source()
469 enum dss_clk_source clk_src) in dss_lcd_clk_mux_dra7() argument
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A Ddpi.c37 enum dss_clk_source clk_src; member
227 ctx->clkout_idx = dss_pll_get_clkout_idx_for_src(dpi->clk_src); in dpi_pll_clk_calc()
304 dpi->clk_src); in dpi_set_pll_clk()
404 dpi->clk_src = dpi_get_clk_src(dpi); in dpi_init_pll()
406 pll = dss_pll_find_by_src(dpi->dss, dpi->clk_src); in dpi_init_pll()
/drivers/ptp/
A Dptp_qoriq.c377 static u32 ptp_qoriq_nominal_freq(u32 clk_src) in ptp_qoriq_nominal_freq() argument
381 clk_src /= 1000000; in ptp_qoriq_nominal_freq()
382 remainder = clk_src % 100; in ptp_qoriq_nominal_freq()
384 clk_src -= remainder; in ptp_qoriq_nominal_freq()
385 clk_src += 100; in ptp_qoriq_nominal_freq()
389 clk_src -= 100; in ptp_qoriq_nominal_freq()
391 } while (1000 % clk_src); in ptp_qoriq_nominal_freq()
393 return clk_src * 1000000; in ptp_qoriq_nominal_freq()
422 u32 clk_src = 0; in ptp_qoriq_auto_config() local
428 clk_src = clk_get_rate(clk); in ptp_qoriq_auto_config()
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/drivers/comedi/drivers/
A Dni_tio.c304 unsigned int *clk_src) in ni_m_series_clock_src_select() argument
366 *clk_src = clock_source; in ni_m_series_clock_src_select()
371 unsigned int *clk_src) in ni_660x_clock_src_select() argument
424 *clk_src = clock_source; in ni_660x_clock_src_select()
429 unsigned int *clk_src) in ni_tio_generic_clock_src_select() argument
450 unsigned int clk_src = 0; in ni_tio_set_sync_mode() local
621 switch (clk_src) { in ni_660x_clk_src()
645 if (clk_src == NI_GPCT_RTSI_CLOCK_SRC_BITS(i)) { in ni_660x_clk_src()
672 switch (clk_src) { in ni_m_clk_src()
702 if (clk_src == NI_GPCT_RTSI_CLOCK_SRC_BITS(i)) { in ni_m_clk_src()
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A Daddi_apci_1500.c47 unsigned int clk_src; member
670 devpriv->clk_src = data[1]; in apci1500_timer_insn_config()
671 if (devpriv->clk_src == 2) in apci1500_timer_insn_config()
672 devpriv->clk_src = 3; in apci1500_timer_insn_config()
673 outw(devpriv->clk_src, devpriv->addon + APCI1500_CLK_SEL_REG); in apci1500_timer_insn_config()
676 switch (devpriv->clk_src) { in apci1500_timer_insn_config()
/drivers/rtc/
A Drtc-s32g.c61 struct clk *clk_src; member
254 priv->clk_src = devm_clk_get_enabled(dev, rtc_clk_src[i]); in rtc_clk_dts_setup()
255 if (!IS_ERR(priv->clk_src)) { in rtc_clk_dts_setup()
261 if (IS_ERR(priv->clk_src)) in rtc_clk_dts_setup()
262 return dev_err_probe(dev, PTR_ERR(priv->clk_src), in rtc_clk_dts_setup()
307 rtc_hz = clk_get_rate(priv->clk_src); in s32g_rtc_probe()
/drivers/video/fbdev/omap2/omapfb/dss/
A Ddss.c349 return dss_generic_clk_source_names[clk_src]; in dss_get_generic_clk_source_name()
396 static void dss_select_dispc_clk_source(enum omap_dss_clk_source clk_src) in dss_select_dispc_clk_source() argument
401 switch (clk_src) { in dss_select_dispc_clk_source()
420 dss.dispc_clk_source = clk_src; in dss_select_dispc_clk_source()
424 enum omap_dss_clk_source clk_src) in dss_select_dsi_clk_source() argument
428 switch (clk_src) { in dss_select_dsi_clk_source()
448 dss.dsi_clk_source[dsi_module] = clk_src; in dss_select_dsi_clk_source()
452 enum omap_dss_clk_source clk_src) in dss_select_lcd_clk_source() argument
457 dss_select_dispc_clk_source(clk_src); in dss_select_lcd_clk_source()
461 switch (clk_src) { in dss_select_lcd_clk_source()
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/drivers/clk/socfpga/
A Dclk-periph.c39 u32 clk_src; in clk_periclk_get_parent() local
41 clk_src = readl(clk_mgr_base_addr + CLKMGR_DBCTRL); in clk_periclk_get_parent()
42 return clk_src & 0x1; in clk_periclk_get_parent()
A Dclk-periph-a10.c42 u32 clk_src; in clk_periclk_get_parent() local
45 clk_src = readl(socfpgaclk->hw.reg); in clk_periclk_get_parent()
49 return (clk_src >> CLK_MGR_FREE_SHIFT) & in clk_periclk_get_parent()
A Dclk-periph-s10.c66 u32 clk_src, mask; in clk_periclk_get_parent() local
79 clk_src = readl(socfpgaclk->hw.reg); in clk_periclk_get_parent()
80 parent = (clk_src >> CLK_MGR_FREE_SHIFT) & in clk_periclk_get_parent()
/drivers/clk/
A Dclk-nomadik.c158 struct clk_src { struct
166 #define to_src(_hw) container_of(_hw, struct clk_src, hw) argument
306 struct clk_src *sclk = to_src(hw); in src_clk_enable()
319 struct clk_src *sclk = to_src(hw); in src_clk_disable()
331 struct clk_src *sclk = to_src(hw); in src_clk_is_enabled()
357 struct clk_src *sclk; in src_clk_register()
/drivers/gpu/drm/amd/display/dc/resource/dce100/
A Ddce100_resource.c733 struct dce110_clk_src *clk_src = in dce100_clock_source_create() local
736 if (!clk_src) in dce100_clock_source_create()
739 if (dce110_clk_src_construct(clk_src, ctx, bios, id, in dce100_clock_source_create()
741 clk_src->base.dp_clk_src = dp_clk_src; in dce100_clock_source_create()
742 return &clk_src->base; in dce100_clock_source_create()
745 kfree(clk_src); in dce100_clock_source_create()
750 static void dce100_clock_source_destroy(struct clock_source **clk_src) in dce100_clock_source_destroy() argument
752 kfree(TO_DCE110_CLK_SRC(*clk_src)); in dce100_clock_source_destroy()
753 *clk_src = NULL; in dce100_clock_source_destroy()
/drivers/gpu/drm/amd/display/dc/resource/dce120/
A Ddce120_resource.c540 struct dce110_clk_src *clk_src = in dce120_clock_source_create() local
541 kzalloc(sizeof(*clk_src), GFP_KERNEL); in dce120_clock_source_create()
543 if (!clk_src) in dce120_clock_source_create()
546 if (dce112_clk_src_construct(clk_src, ctx, bios, id, in dce120_clock_source_create()
548 clk_src->base.dp_clk_src = dp_clk_src; in dce120_clock_source_create()
549 return &clk_src->base; in dce120_clock_source_create()
552 kfree(clk_src); in dce120_clock_source_create()
557 static void dce120_clock_source_destroy(struct clock_source **clk_src) in dce120_clock_source_destroy() argument
559 kfree(TO_DCE110_CLK_SRC(*clk_src)); in dce120_clock_source_destroy()
560 *clk_src = NULL; in dce120_clock_source_destroy()
/drivers/gpu/drm/amd/display/dc/dccg/dcn31/
A Ddcn31_dccg.c445 enum physymclk_clock_source clk_src, in dccg31_set_physymclk() argument
456 PHYASYMCLK_FORCE_SRC_SEL, clk_src); in dccg31_set_physymclk()
473 PHYBSYMCLK_FORCE_SRC_SEL, clk_src); in dccg31_set_physymclk()
490 PHYCSYMCLK_FORCE_SRC_SEL, clk_src); in dccg31_set_physymclk()
507 PHYDSYMCLK_FORCE_SRC_SEL, clk_src); in dccg31_set_physymclk()
524 PHYESYMCLK_FORCE_SRC_SEL, clk_src); in dccg31_set_physymclk()
/drivers/i2c/busses/
A Di2c-mt65xx.c697 unsigned int clk_src, in mtk_i2c_check_ac_timing() argument
706 clk_src); in mtk_i2c_check_ac_timing()
717 clk_ns = 1000000000 / clk_src; in mtk_i2c_check_ac_timing()
820 opt_div = DIV_ROUND_UP(clk_src >> 1, target_speed); in mtk_i2c_calculate_speed()
837 ret = mtk_i2c_check_ac_timing(i2c, clk_src, in mtk_i2c_calculate_speed()
856 if ((clk_src / (2 * (sample_cnt * step_cnt - clk_div_restri))) > in mtk_i2c_calculate_speed()
873 unsigned int clk_src; in mtk_i2c_set_speed() local
894 clk_src = parent_clk / clk_div; in mtk_i2c_set_speed()
899 ret = mtk_i2c_calculate_speed(i2c, clk_src, in mtk_i2c_set_speed()
909 ret = mtk_i2c_calculate_speed(i2c, clk_src, in mtk_i2c_set_speed()
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/drivers/gpu/drm/amd/display/dc/dccg/dcn401/
A Ddcn401_dccg.c270 enum physymclk_clock_source clk_src, in dccg401_set_physymclk() argument
281 PHYASYMCLK_SRC_SEL, clk_src); in dccg401_set_physymclk()
298 PHYBSYMCLK_SRC_SEL, clk_src); in dccg401_set_physymclk()
315 PHYCSYMCLK_SRC_SEL, clk_src); in dccg401_set_physymclk()
332 PHYDSYMCLK_SRC_SEL, clk_src); in dccg401_set_physymclk()
663 dccg401_set_dtbclk_p_src(dccg, params->clk_src, params->otg_inst); in dccg401_set_dp_dto()
/drivers/gpu/drm/amd/display/dc/resource/dcn201/
A Ddcn201_resource.c823 struct dce110_clk_src *clk_src = in dcn201_clock_source_create() local
826 if (!clk_src) in dcn201_clock_source_create()
829 if (dce112_clk_src_construct(clk_src, ctx, bios, id, in dcn201_clock_source_create()
831 clk_src->base.dp_clk_src = dp_clk_src; in dcn201_clock_source_create()
832 return &clk_src->base; in dcn201_clock_source_create()
834 kfree(clk_src); in dcn201_clock_source_create()
904 static void dcn201_clock_source_destroy(struct clock_source **clk_src) in dcn201_clock_source_destroy() argument
906 kfree(TO_DCE110_CLK_SRC(*clk_src)); in dcn201_clock_source_destroy()
907 *clk_src = NULL; in dcn201_clock_source_destroy()
/drivers/gpu/drm/amd/display/dc/link/hwss/
A Dlink_hwss_hpo_fixed_vs_pe_retimer_dp.c77 uint8_t clk_src = 0xC4; in dp_hpo_fixed_vs_pe_retimer_program_override_test_pattern() local
81 const uint8_t vendor_lttpr_write_data_pg1[4] = {0x1, 0x50, 0x50, clk_src}; in dp_hpo_fixed_vs_pe_retimer_program_override_test_pattern()
82 const uint8_t vendor_lttpr_write_data_pg2[4] = {0x1, 0x51, 0x50, clk_src}; in dp_hpo_fixed_vs_pe_retimer_program_override_test_pattern()
/drivers/gpu/drm/amd/display/dc/resource/dce110/
A Ddce110_resource.c778 struct dce110_clk_src *clk_src = in dce110_clock_source_create() local
781 if (!clk_src) in dce110_clock_source_create()
784 if (dce110_clk_src_construct(clk_src, ctx, bios, id, in dce110_clock_source_create()
786 clk_src->base.dp_clk_src = dp_clk_src; in dce110_clock_source_create()
787 return &clk_src->base; in dce110_clock_source_create()
790 kfree(clk_src); in dce110_clock_source_create()
795 static void dce110_clock_source_destroy(struct clock_source **clk_src) in dce110_clock_source_destroy() argument
799 if (!clk_src) in dce110_clock_source_destroy()
802 dce110_clk_src = TO_DCE110_CLK_SRC(*clk_src); in dce110_clock_source_destroy()
809 *clk_src = NULL; in dce110_clock_source_destroy()
/drivers/gpu/drm/amd/display/dc/resource/dce112/
A Ddce112_resource.c754 struct dce110_clk_src *clk_src = in dce112_clock_source_create() local
757 if (!clk_src) in dce112_clock_source_create()
760 if (dce112_clk_src_construct(clk_src, ctx, bios, id, in dce112_clock_source_create()
762 clk_src->base.dp_clk_src = dp_clk_src; in dce112_clock_source_create()
763 return &clk_src->base; in dce112_clock_source_create()
766 kfree(clk_src); in dce112_clock_source_create()
771 static void dce112_clock_source_destroy(struct clock_source **clk_src) in dce112_clock_source_destroy() argument
773 kfree(TO_DCE110_CLK_SRC(*clk_src)); in dce112_clock_source_destroy()
774 *clk_src = NULL; in dce112_clock_source_destroy()
/drivers/gpu/drm/amd/display/dc/resource/dce60/
A Ddce60_resource.c759 struct dce110_clk_src *clk_src = in dce60_clock_source_create() local
762 if (!clk_src) in dce60_clock_source_create()
765 if (dce110_clk_src_construct(clk_src, ctx, bios, id, in dce60_clock_source_create()
767 clk_src->base.dp_clk_src = dp_clk_src; in dce60_clock_source_create()
768 return &clk_src->base; in dce60_clock_source_create()
771 kfree(clk_src); in dce60_clock_source_create()
776 static void dce60_clock_source_destroy(struct clock_source **clk_src) in dce60_clock_source_destroy() argument
778 kfree(TO_DCE110_CLK_SRC(*clk_src)); in dce60_clock_source_destroy()
779 *clk_src = NULL; in dce60_clock_source_destroy()

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