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Searched refs:clock_id (Results 1 – 24 of 24) sorted by relevance

/drivers/interconnect/qcom/
A Dicc-rpm-clocks.c12 .clock_id = 1,
18 .clock_id = 2,
24 .clock_id = 0,
30 .clock_id = 1,
36 .clock_id = 0,
42 .clock_id = 1,
48 .clock_id = 2,
54 .clock_id = 0,
60 .clock_id = 1,
66 .clock_id = 0,
[all …]
A Dsmd-rpm.c61 clk->clock_id, in qcom_icc_rpm_set_bus_rate()
A Dicc-rpm.h36 u32 clock_id; member
/drivers/dpll/
A Ddpll_core.c243 dpll_device_alloc(const u64 clock_id, u32 device_idx, struct module *module) in dpll_device_alloc() argument
254 dpll->clock_id = clock_id; in dpll_device_alloc()
282 dpll_device_get(u64 clock_id, u32 device_idx, struct module *module) in dpll_device_get() argument
289 if (dpll->clock_id == clock_id && in dpll_device_get()
298 ret = dpll_device_alloc(clock_id, device_idx, module); in dpll_device_get()
486 dpll_pin_alloc(u64 clock_id, u32 pin_idx, struct module *module, in dpll_pin_alloc() argument
496 pin->clock_id = clock_id; in dpll_pin_alloc()
561 dpll_pin_get(u64 clock_id, u32 pin_idx, struct module *module, in dpll_pin_get() argument
569 if (pos->clock_id == clock_id && in dpll_pin_get()
578 ret = dpll_pin_alloc(clock_id, pin_idx, module, prop); in dpll_pin_get()
[all …]
A Ddpll_netlink.c600 &pin->clock_id, DPLL_A_PIN_PAD)) in dpll_cmd_pin_get_one()
658 &dpll->clock_id, DPLL_A_PAD)) in dpll_device_get_one()
1416 cid_match = clock_id ? pin->clock_id == clock_id : true; in dpll_pin_find()
1451 u64 clock_id = 0; in dpll_pin_find_from_nlattr() local
1458 if (clock_id) in dpll_pin_find_from_nlattr()
1460 clock_id = nla_get_u64(attr); in dpll_pin_find_from_nlattr()
1618 cid_match = clock_id ? dpll->clock_id == clock_id : true; in dpll_device_find()
1644 u64 clock_id = 0; in dpll_device_find_from_nlattr() local
1651 if (clock_id) in dpll_device_find_from_nlattr()
1653 clock_id = nla_get_u64(attr); in dpll_device_find_from_nlattr()
[all …]
A Ddpll_core.h31 u64 clock_id; member
55 u64 clock_id; member
/drivers/clk/zynqmp/
A Dclkc.c226 static int zynqmp_pm_clock_get_name(u32 clock_id, in zynqmp_pm_clock_get_name() argument
234 qdata.arg1 = clock_id; in zynqmp_pm_clock_get_name()
262 static int zynqmp_pm_clock_get_topology(u32 clock_id, u32 index, in zynqmp_pm_clock_get_topology() argument
270 qdata.arg1 = clock_id; in zynqmp_pm_clock_get_topology()
359 static int zynqmp_pm_clock_get_parents(u32 clock_id, u32 index, in zynqmp_pm_clock_get_parents() argument
367 qdata.arg1 = clock_id; in zynqmp_pm_clock_get_parents()
385 static int zynqmp_pm_clock_get_attributes(u32 clock_id, in zynqmp_pm_clock_get_attributes() argument
393 qdata.arg1 = clock_id; in zynqmp_pm_clock_get_attributes()
/drivers/virtio/
A Dvirtio_rtc_driver.c323 u16 clock_id; in viortc_alarmq_hdlr() local
347 clock_id = virtio_le_to_cpu(notif->clock_id); in viortc_alarmq_hdlr()
353 viortc_class_alarm(viortc->viortc_class, clock_id); in viortc_alarmq_hdlr()
600 VIORTC_MSG_WRITE(hdl, clock_id, &vio_clk_id); in viortc_read()
641 VIORTC_MSG_WRITE(hdl, clock_id, &vio_clk_id); in viortc_read_cross()
723 VIORTC_MSG_WRITE(hdl, clock_id, &vio_clk_id); in viortc_clock_cap()
766 VIORTC_MSG_WRITE(hdl, clock_id, &vio_clk_id); in viortc_cross_cap()
809 VIORTC_MSG_WRITE(hdl, clock_id, &vio_clk_id); in viortc_read_alarm()
856 VIORTC_MSG_WRITE(hdl, clock_id, &vio_clk_id); in viortc_set_alarm()
899 VIORTC_MSG_WRITE(hdl, clock_id, &vio_clk_id); in viortc_set_alarm_enabled()
/drivers/firmware/xilinx/
A Dzynqmp.c706 int zynqmp_pm_clock_enable(u32 clock_id) in zynqmp_pm_clock_enable() argument
708 return zynqmp_pm_invoke_fn(PM_CLOCK_ENABLE, NULL, 1, clock_id); in zynqmp_pm_clock_enable()
721 int zynqmp_pm_clock_disable(u32 clock_id) in zynqmp_pm_clock_disable() argument
723 return zynqmp_pm_invoke_fn(PM_CLOCK_DISABLE, NULL, 1, clock_id); in zynqmp_pm_clock_disable()
737 int zynqmp_pm_clock_getstate(u32 clock_id, u32 *state) in zynqmp_pm_clock_getstate() argument
742 ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETSTATE, ret_payload, 1, clock_id); in zynqmp_pm_clock_getstate()
759 int zynqmp_pm_clock_setdivider(u32 clock_id, u32 divider) in zynqmp_pm_clock_setdivider() argument
775 int zynqmp_pm_clock_getdivider(u32 clock_id, u32 *divider) in zynqmp_pm_clock_getdivider() argument
796 int zynqmp_pm_clock_setparent(u32 clock_id, u32 parent_id) in zynqmp_pm_clock_setparent() argument
812 int zynqmp_pm_clock_getparent(u32 clock_id, u32 *parent_id) in zynqmp_pm_clock_getparent() argument
[all …]
/drivers/net/ethernet/mellanox/mlx5/core/
A Ddpll.c25 static int mlx5_dpll_clock_id_get(struct mlx5_core_dev *mdev, u64 *clock_id) in mlx5_dpll_clock_id_get() argument
35 *clock_id = MLX5_GET64(msecq_reg, out, local_clock_identity); in mlx5_dpll_clock_id_get()
422 u64 clock_id; in mlx5_dpll_probe() local
430 err = mlx5_dpll_clock_id_get(mdev, &clock_id); in mlx5_dpll_probe()
441 mdpll->dpll = dpll_device_get(clock_id, 0, THIS_MODULE); in mlx5_dpll_probe()
453 mdpll->dpll_pin = dpll_pin_get(clock_id, mlx5_get_dev_index(mdev), in mlx5_dpll_probe()
/drivers/dpll/zl3073x/
A Ddevlink.c122 if (zldev->clock_id != val.vu64) { in zl3073x_devlink_reload_up()
125 zldev->clock_id = val.vu64; in zl3073x_devlink_reload_up()
246 value.vu64 = zldev->clock_id; in zl3073x_devlink_register()
A Dcore.h82 u64 clock_id; member
A Dcore.c992 zldev->clock_id = get_random_u64(); in zl3073x_dev_probe()
A Ddpll.c1726 pin->dpll_pin = dpll_pin_get(zldpll->dev->clock_id, index, THIS_MODULE, in zl3073x_dpll_pin_register()
1954 zldpll->dpll_dev = dpll_device_get(zldev->clock_id, zldpll->id, in zl3073x_dpll_device_register()
/drivers/gpu/drm/msm/
A Dmsm_io_utils.c135 clockid_t clock_id, in msm_hrtimer_work_init() argument
138 hrtimer_setup(&work->timer, msm_hrtimer_worktimer, clock_id, mode); in msm_hrtimer_work_init()
A Dmsm_drv.h498 clockid_t clock_id,
/drivers/net/ethernet/intel/ice/
A Dice_dpll.h130 u64 clock_id; member
A Dice_dpll.c2837 int start_idx, int count, u64 clock_id) in ice_dpll_get_pins() argument
2842 pins[i].pin = dpll_pin_get(clock_id, i + start_idx, THIS_MODULE, in ice_dpll_get_pins()
2996 ret = ice_dpll_get_pins(pf, pins, start_idx, count, pf->dplls.clock_id); in ice_dpll_init_direct_pins()
3069 pf->dplls.clock_id); in ice_dpll_init_rclk_pins()
3271 u64 clock_id = pf->dplls.clock_id; in ice_dpll_init_dpll() local
3274 d->dpll = dpll_device_get(clock_id, d->dpll_idx, THIS_MODULE); in ice_dpll_init_dpll()
3676 d->clock_id = ice_generate_clock_id(pf); in ice_dpll_init_info()
/drivers/gpu/drm/amd/display/dc/
A Ddm_pp_smu.h204 enum pp_smu_nv_clock_id clock_id, int Mhz);
/drivers/firmware/arm_scmi/
A Dclock.c154 __le32 clock_id; member
1025 r->clock_id = le32_to_cpu(p->clock_id); in scmi_clk_fill_custom_report()
1027 *src_id = r->clock_id; in scmi_clk_fill_custom_report()
/drivers/usb/gadget/function/
A Df_uac2.c74 int clock_id; member
1715 if (uac2->clock_id == USB_IN_CLK_ID) { in uac2_cs_control_sam_freq()
1717 } else if (uac2->clock_id == USB_OUT_CLK_ID) { in uac2_cs_control_sam_freq()
1783 u8 clock_id = w_index >> 8; in out_rq_cur() local
1788 "control_selector UAC2_CS_CONTROL_SAM_FREQ, clock: %d\n", clock_id); in out_rq_cur()
1790 uac2->clock_id = clock_id; in out_rq_cur()
/drivers/gpu/drm/amd/display/amdgpu_dm/
A Damdgpu_dm_pp_smu.c657 enum pp_smu_nv_clock_id clock_id, int mhz) in pp_nv_set_voltage_by_freq() argument
664 switch (clock_id) { in pp_nv_set_voltage_by_freq()
/drivers/iio/
A Dindustrialio-core.c273 int iio_device_set_clock(struct iio_dev *indio_dev, clockid_t clock_id) in iio_device_set_clock() argument
287 iio_dev_opaque->clock_id = clock_id; in iio_device_set_clock()
304 return iio_dev_opaque->clock_id; in iio_device_get_clock()
/drivers/clk/imx/
A Dclk-imx6q.c148 static int ldb_di_sel_by_clock_id(int clock_id) in ldb_di_sel_by_clock_id() argument
150 switch (clock_id) { in ldb_di_sel_by_clock_id()

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