| /drivers/gpu/drm/amd/display/dc/resource/dce60/ |
| A D | dce60_resource.c | 979 pool->base.clock_sources[0] = in dce60_construct()
981 pool->base.clock_sources[1] = in dce60_construct()
989 pool->base.clock_sources[0] = in dce60_construct()
991 pool->base.clock_sources[1] = in dce60_construct()
1175 pool->base.clock_sources[0] = in dce61_construct()
1177 pool->base.clock_sources[1] = in dce61_construct()
1179 pool->base.clock_sources[2] = in dce61_construct()
1187 pool->base.clock_sources[0] = in dce61_construct()
1189 pool->base.clock_sources[1] = in dce61_construct()
1374 pool->base.clock_sources[0] = in dce64_construct()
[all …]
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| /drivers/gpu/drm/amd/display/dc/resource/dce80/ |
| A D | dce80_resource.c | 987 pool->base.clock_sources[0] = in dce80_construct()
989 pool->base.clock_sources[1] = in dce80_construct()
991 pool->base.clock_sources[2] = in dce80_construct()
999 pool->base.clock_sources[0] = in dce80_construct()
1001 pool->base.clock_sources[1] = in dce80_construct()
1187 pool->base.clock_sources[0] = in dce81_construct()
1189 pool->base.clock_sources[1] = in dce81_construct()
1191 pool->base.clock_sources[2] = in dce81_construct()
1199 pool->base.clock_sources[0] = in dce81_construct()
1201 pool->base.clock_sources[1] = in dce81_construct()
[all …]
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| /drivers/gpu/drm/amd/display/dc/resource/dce112/ |
| A D | dce112_resource.c | 821 if (pool->base.clock_sources[i] != NULL) { in dce112_resource_destruct()
853 return pool->clock_sources[DCE112_CLK_SRC_PLL0]; in find_matching_pll()
855 return pool->clock_sources[DCE112_CLK_SRC_PLL1]; in find_matching_pll()
857 return pool->clock_sources[DCE112_CLK_SRC_PLL2]; in find_matching_pll()
1255 pool->base.clock_sources[DCE112_CLK_SRC_PLL0] = in dce112_resource_construct()
1260 pool->base.clock_sources[DCE112_CLK_SRC_PLL1] = in dce112_resource_construct()
1265 pool->base.clock_sources[DCE112_CLK_SRC_PLL2] = in dce112_resource_construct()
1270 pool->base.clock_sources[DCE112_CLK_SRC_PLL3] = in dce112_resource_construct()
1275 pool->base.clock_sources[DCE112_CLK_SRC_PLL4] = in dce112_resource_construct()
1280 pool->base.clock_sources[DCE112_CLK_SRC_PLL5] = in dce112_resource_construct()
[all …]
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| /drivers/gpu/drm/amd/display/dc/resource/dce100/ |
| A D | dce100_resource.c | 800 if (pool->base.clock_sources[i] != NULL) in dce100_resource_destruct()
801 dce100_clock_source_destroy(&pool->base.clock_sources[i]); in dce100_resource_destruct()
1003 pool->base.clock_sources[0] = in dce100_resource_construct()
1005 pool->base.clock_sources[1] = in dce100_resource_construct()
1007 pool->base.clock_sources[2] = in dce100_resource_construct()
1015 pool->base.clock_sources[0] = in dce100_resource_construct()
1017 pool->base.clock_sources[1] = in dce100_resource_construct()
1029 if (pool->base.clock_sources[i] == NULL) { in dce100_resource_construct()
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| /drivers/gpu/drm/amd/display/dc/resource/dce120/ |
| A D | dce120_resource.c | 650 if (pool->base.clock_sources[i] != NULL) in dce120_resource_destruct()
652 &pool->base.clock_sources[i]); in dce120_resource_destruct()
1097 pool->base.clock_sources[DCE120_CLK_SRC_PLL0] = in dce120_resource_construct()
1101 pool->base.clock_sources[DCE120_CLK_SRC_PLL1] = in dce120_resource_construct()
1105 pool->base.clock_sources[DCE120_CLK_SRC_PLL2] = in dce120_resource_construct()
1109 pool->base.clock_sources[DCE120_CLK_SRC_PLL3] = in dce120_resource_construct()
1113 pool->base.clock_sources[DCE120_CLK_SRC_PLL4] = in dce120_resource_construct()
1117 pool->base.clock_sources[DCE120_CLK_SRC_PLL5] = in dce120_resource_construct()
1129 if (pool->base.clock_sources[i] == NULL) { in dce120_resource_construct()
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| /drivers/gpu/drm/amd/display/dc/resource/dcn21/ |
| A D | dcn21_resource.c | 735 if (pool->base.clock_sources[i] != NULL) { in dcn21_resource_destruct()
736 dcn20_clock_source_destroy(&pool->base.clock_sources[i]); in dcn21_resource_destruct()
737 pool->base.clock_sources[i] = NULL; in dcn21_resource_destruct()
1473 pool->base.clock_sources[DCN20_CLK_SRC_PLL0] = in dcn21_resource_construct()
1477 pool->base.clock_sources[DCN20_CLK_SRC_PLL1] = in dcn21_resource_construct()
1481 pool->base.clock_sources[DCN20_CLK_SRC_PLL2] = in dcn21_resource_construct()
1485 pool->base.clock_sources[DCN20_CLK_SRC_PLL3] = in dcn21_resource_construct()
1489 pool->base.clock_sources[DCN20_CLK_SRC_PLL4] = in dcn21_resource_construct()
1503 if (pool->base.clock_sources[i] == NULL) { in dcn21_resource_construct()
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| /drivers/gpu/drm/amd/display/dc/resource/dcn302/ |
| A D | dcn302_resource.c | 1078 if (pool->clock_sources[i] != NULL) in dcn302_resource_destruct()
1079 dcn20_clock_source_destroy(&pool->clock_sources[i]); in dcn302_resource_destruct()
1305 pool->clock_sources[DCN302_CLK_SRC_PLL0] = in dcn302_resource_construct()
1309 pool->clock_sources[DCN302_CLK_SRC_PLL1] = in dcn302_resource_construct()
1313 pool->clock_sources[DCN302_CLK_SRC_PLL2] = in dcn302_resource_construct()
1317 pool->clock_sources[DCN302_CLK_SRC_PLL3] = in dcn302_resource_construct()
1321 pool->clock_sources[DCN302_CLK_SRC_PLL4] = in dcn302_resource_construct()
1335 if (pool->clock_sources[i] == NULL) { in dcn302_resource_construct()
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| /drivers/gpu/drm/amd/display/dc/resource/dcn10/ |
| A D | dcn10_resource.c | 959 if (pool->base.clock_sources[i] != NULL) { in dcn10_resource_destruct()
960 dcn10_clock_source_destroy(&pool->base.clock_sources[i]); in dcn10_resource_destruct()
961 pool->base.clock_sources[i] = NULL; in dcn10_resource_destruct()
1406 pool->base.clock_sources[DCN10_CLK_SRC_PLL0] = in dcn10_resource_construct()
1410 pool->base.clock_sources[DCN10_CLK_SRC_PLL1] = in dcn10_resource_construct()
1414 pool->base.clock_sources[DCN10_CLK_SRC_PLL2] = in dcn10_resource_construct()
1420 pool->base.clock_sources[DCN10_CLK_SRC_PLL3] = in dcn10_resource_construct()
1438 if (pool->base.clock_sources[i] == NULL) { in dcn10_resource_construct()
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| /drivers/gpu/drm/amd/display/dc/resource/dcn31/ |
| A D | dcn31_resource.c | 1457 if (pool->base.clock_sources[i] != NULL) { in dcn31_resource_destruct()
1458 dcn20_clock_source_destroy(&pool->base.clock_sources[i]); in dcn31_resource_destruct()
1459 pool->base.clock_sources[i] = NULL; in dcn31_resource_destruct()
1994 pool->base.clock_sources[DCN31_CLK_SRC_PLL0] = in dcn31_resource_construct()
1998 pool->base.clock_sources[DCN31_CLK_SRC_PLL1] = in dcn31_resource_construct()
2004 pool->base.clock_sources[DCN31_CLK_SRC_PLL2] = in dcn31_resource_construct()
2008 pool->base.clock_sources[DCN31_CLK_SRC_PLL3] = in dcn31_resource_construct()
2013 pool->base.clock_sources[DCN31_CLK_SRC_PLL2] = in dcn31_resource_construct()
2017 pool->base.clock_sources[DCN31_CLK_SRC_PLL3] = in dcn31_resource_construct()
2023 pool->base.clock_sources[DCN31_CLK_SRC_PLL4] = in dcn31_resource_construct()
[all …]
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| /drivers/gpu/drm/amd/display/dc/resource/dcn301/ |
| A D | dcn301_resource.c | 1127 if (pool->base.clock_sources[i] != NULL) { in dcn301_destruct()
1128 dcn20_clock_source_destroy(&pool->base.clock_sources[i]); in dcn301_destruct()
1129 pool->base.clock_sources[i] = NULL; in dcn301_destruct()
1514 pool->base.clock_sources[DCN301_CLK_SRC_PLL0] = in dcn301_resource_construct()
1518 pool->base.clock_sources[DCN301_CLK_SRC_PLL1] = in dcn301_resource_construct()
1522 pool->base.clock_sources[DCN301_CLK_SRC_PLL2] = in dcn301_resource_construct()
1526 pool->base.clock_sources[DCN301_CLK_SRC_PLL3] = in dcn301_resource_construct()
1540 if (pool->base.clock_sources[i] == NULL) { in dcn301_resource_construct()
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| /drivers/gpu/drm/amd/display/dc/resource/dcn201/ |
| A D | dcn201_resource.c | 966 if (pool->base.clock_sources[i] != NULL) { in dcn201_resource_destruct()
967 dcn201_clock_source_destroy(&pool->base.clock_sources[i]); in dcn201_resource_destruct()
968 pool->base.clock_sources[i] = NULL; in dcn201_resource_destruct()
1164 pool->base.clock_sources[DCN20_CLK_SRC_PLL0] = in dcn201_resource_construct()
1168 pool->base.clock_sources[DCN20_CLK_SRC_PLL1] = in dcn201_resource_construct()
1182 if (pool->base.clock_sources[i] == NULL) { in dcn201_resource_construct()
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| /drivers/gpu/drm/amd/display/dc/resource/dcn316/ |
| A D | dcn316_resource.c | 1453 if (pool->base.clock_sources[i] != NULL) { in dcn316_resource_destruct()
1454 dcn20_clock_source_destroy(&pool->base.clock_sources[i]); in dcn316_resource_destruct()
1455 pool->base.clock_sources[i] = NULL; in dcn316_resource_destruct()
1831 pool->base.clock_sources[DCN31_CLK_SRC_PLL0] = in dcn316_resource_construct()
1835 pool->base.clock_sources[DCN31_CLK_SRC_PLL1] = in dcn316_resource_construct()
1839 pool->base.clock_sources[DCN31_CLK_SRC_PLL2] = in dcn316_resource_construct()
1843 pool->base.clock_sources[DCN31_CLK_SRC_PLL3] = in dcn316_resource_construct()
1847 pool->base.clock_sources[DCN31_CLK_SRC_PLL4] = in dcn316_resource_construct()
1861 if (pool->base.clock_sources[i] == NULL) { in dcn316_resource_construct()
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| /drivers/gpu/drm/amd/display/dc/resource/dcn314/ |
| A D | dcn314_resource.c | 1514 if (pool->base.clock_sources[i] != NULL) { in dcn314_resource_destruct()
1515 dcn20_clock_source_destroy(&pool->base.clock_sources[i]); in dcn314_resource_destruct()
1516 pool->base.clock_sources[i] = NULL; in dcn314_resource_destruct()
1932 pool->base.clock_sources[DCN31_CLK_SRC_PLL0] = in dcn314_resource_construct()
1936 pool->base.clock_sources[DCN31_CLK_SRC_PLL1] = in dcn314_resource_construct()
1940 pool->base.clock_sources[DCN31_CLK_SRC_PLL2] = in dcn314_resource_construct()
1944 pool->base.clock_sources[DCN31_CLK_SRC_PLL3] = in dcn314_resource_construct()
1948 pool->base.clock_sources[DCN31_CLK_SRC_PLL4] = in dcn314_resource_construct()
1962 if (pool->base.clock_sources[i] == NULL) { in dcn314_resource_construct()
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| /drivers/gpu/drm/amd/display/dc/resource/dcn321/ |
| A D | dcn321_resource.c | 1443 if (pool->base.clock_sources[i] != NULL) { in dcn321_resource_destruct()
1444 dcn20_clock_source_destroy(&pool->base.clock_sources[i]); in dcn321_resource_destruct()
1445 pool->base.clock_sources[i] = NULL; in dcn321_resource_destruct()
1813 pool->base.clock_sources[DCN321_CLK_SRC_PLL0] = in dcn321_resource_construct()
1817 pool->base.clock_sources[DCN321_CLK_SRC_PLL1] = in dcn321_resource_construct()
1821 pool->base.clock_sources[DCN321_CLK_SRC_PLL2] = in dcn321_resource_construct()
1825 pool->base.clock_sources[DCN321_CLK_SRC_PLL3] = in dcn321_resource_construct()
1829 pool->base.clock_sources[DCN321_CLK_SRC_PLL4] = in dcn321_resource_construct()
1843 if (pool->base.clock_sources[i] == NULL) { in dcn321_resource_construct()
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| /drivers/gpu/drm/amd/display/dc/resource/dcn35/ |
| A D | dcn35_resource.c | 1526 if (pool->base.clock_sources[i] != NULL) { in dcn35_resource_destruct()
1527 dcn20_clock_source_destroy(&pool->base.clock_sources[i]); in dcn35_resource_destruct()
1528 pool->base.clock_sources[i] = NULL; in dcn35_resource_destruct()
1952 pool->base.clock_sources[DCN35_CLK_SRC_PLL0] = in dcn35_resource_construct()
1956 pool->base.clock_sources[DCN35_CLK_SRC_PLL1] = in dcn35_resource_construct()
1960 pool->base.clock_sources[DCN35_CLK_SRC_PLL2] = in dcn35_resource_construct()
1964 pool->base.clock_sources[DCN35_CLK_SRC_PLL3] = in dcn35_resource_construct()
1968 pool->base.clock_sources[DCN35_CLK_SRC_PLL4] = in dcn35_resource_construct()
1982 if (pool->base.clock_sources[i] == NULL) { in dcn35_resource_construct()
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| /drivers/gpu/drm/amd/display/dc/resource/dcn315/ |
| A D | dcn315_resource.c | 1457 if (pool->base.clock_sources[i] != NULL) { in dcn315_resource_destruct()
1458 dcn20_clock_source_destroy(&pool->base.clock_sources[i]); in dcn315_resource_destruct()
1459 pool->base.clock_sources[i] = NULL; in dcn315_resource_destruct()
1955 pool->base.clock_sources[DCN31_CLK_SRC_PLL0] = in dcn315_resource_construct()
1959 pool->base.clock_sources[DCN31_CLK_SRC_PLL1] = in dcn315_resource_construct()
1963 pool->base.clock_sources[DCN31_CLK_SRC_PLL2] = in dcn315_resource_construct()
1967 pool->base.clock_sources[DCN31_CLK_SRC_PLL3] = in dcn315_resource_construct()
1971 pool->base.clock_sources[DCN31_CLK_SRC_PLL4] = in dcn315_resource_construct()
1985 if (pool->base.clock_sources[i] == NULL) { in dcn315_resource_construct()
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| /drivers/gpu/drm/amd/display/dc/resource/dcn351/ |
| A D | dcn351_resource.c | 1506 if (pool->base.clock_sources[i] != NULL) { in dcn351_resource_destruct()
1507 dcn20_clock_source_destroy(&pool->base.clock_sources[i]); in dcn351_resource_destruct()
1508 pool->base.clock_sources[i] = NULL; in dcn351_resource_destruct()
1923 pool->base.clock_sources[DCN351_CLK_SRC_PLL0] = in dcn351_resource_construct()
1927 pool->base.clock_sources[DCN351_CLK_SRC_PLL1] = in dcn351_resource_construct()
1931 pool->base.clock_sources[DCN351_CLK_SRC_PLL2] = in dcn351_resource_construct()
1935 pool->base.clock_sources[DCN351_CLK_SRC_PLL3] = in dcn351_resource_construct()
1939 pool->base.clock_sources[DCN351_CLK_SRC_PLL4] = in dcn351_resource_construct()
1953 if (pool->base.clock_sources[i] == NULL) { in dcn351_resource_construct()
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| /drivers/gpu/drm/amd/display/dc/resource/dcn36/ |
| A D | dcn36_resource.c | 1507 if (pool->base.clock_sources[i] != NULL) { in dcn36_resource_destruct()
1508 dcn20_clock_source_destroy(&pool->base.clock_sources[i]); in dcn36_resource_destruct()
1509 pool->base.clock_sources[i] = NULL; in dcn36_resource_destruct()
1925 pool->base.clock_sources[DCN36_CLK_SRC_PLL0] = in dcn36_resource_construct()
1929 pool->base.clock_sources[DCN36_CLK_SRC_PLL1] = in dcn36_resource_construct()
1933 pool->base.clock_sources[DCN36_CLK_SRC_PLL2] = in dcn36_resource_construct()
1937 pool->base.clock_sources[DCN36_CLK_SRC_PLL3] = in dcn36_resource_construct()
1941 pool->base.clock_sources[DCN36_CLK_SRC_PLL4] = in dcn36_resource_construct()
1955 if (pool->base.clock_sources[i] == NULL) { in dcn36_resource_construct()
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| /drivers/gpu/drm/amd/display/dc/resource/dcn30/ |
| A D | dcn30_resource.c | 1156 if (pool->base.clock_sources[i] != NULL) { in dcn30_resource_destruct()
1157 dcn20_clock_source_destroy(&pool->base.clock_sources[i]); in dcn30_resource_destruct()
1158 pool->base.clock_sources[i] = NULL; in dcn30_resource_destruct()
2390 pool->base.clock_sources[DCN30_CLK_SRC_PLL0] = in dcn30_resource_construct()
2394 pool->base.clock_sources[DCN30_CLK_SRC_PLL1] = in dcn30_resource_construct()
2398 pool->base.clock_sources[DCN30_CLK_SRC_PLL2] = in dcn30_resource_construct()
2402 pool->base.clock_sources[DCN30_CLK_SRC_PLL3] = in dcn30_resource_construct()
2406 pool->base.clock_sources[DCN30_CLK_SRC_PLL4] = in dcn30_resource_construct()
2410 pool->base.clock_sources[DCN30_CLK_SRC_PLL5] = in dcn30_resource_construct()
2424 if (pool->base.clock_sources[i] == NULL) { in dcn30_resource_construct()
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| /drivers/gpu/drm/amd/display/dc/resource/dcn20/ |
| A D | dcn20_resource.c | 1165 if (pool->base.clock_sources[i] != NULL) { in dcn20_resource_destruct()
1166 dcn20_clock_source_destroy(&pool->base.clock_sources[i]); in dcn20_resource_destruct()
1167 pool->base.clock_sources[i] = NULL; in dcn20_resource_destruct()
2490 pool->base.clock_sources[DCN20_CLK_SRC_PLL0] = in dcn20_resource_construct()
2494 pool->base.clock_sources[DCN20_CLK_SRC_PLL1] = in dcn20_resource_construct()
2498 pool->base.clock_sources[DCN20_CLK_SRC_PLL2] = in dcn20_resource_construct()
2502 pool->base.clock_sources[DCN20_CLK_SRC_PLL3] = in dcn20_resource_construct()
2506 pool->base.clock_sources[DCN20_CLK_SRC_PLL4] = in dcn20_resource_construct()
2510 pool->base.clock_sources[DCN20_CLK_SRC_PLL5] = in dcn20_resource_construct()
2522 if (pool->base.clock_sources[i] == NULL) { in dcn20_resource_construct()
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| /drivers/gpu/drm/amd/display/dc/resource/dce110/ |
| A D | dce110_resource.c | 856 if (pool->base.clock_sources[i] != NULL) { in dce110_resource_destruct()
857 dce110_clock_source_destroy(&pool->base.clock_sources[i]); in dce110_resource_destruct()
1390 pool->base.clock_sources[0] = in dce110_resource_construct()
1393 pool->base.clock_sources[1] = in dce110_resource_construct()
1409 if (pool->base.clock_sources[i] == NULL) { in dce110_resource_construct()
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| /drivers/gpu/drm/amd/display/dc/resource/dcn303/ |
| A D | dcn303_resource.c | 1023 if (pool->clock_sources[i] != NULL) in dcn303_resource_destruct()
1024 dcn20_clock_source_destroy(&pool->clock_sources[i]); in dcn303_resource_destruct()
1250 pool->clock_sources[DCN303_CLK_SRC_PLL0] = in dcn303_resource_construct()
1254 pool->clock_sources[DCN303_CLK_SRC_PLL1] = in dcn303_resource_construct()
1268 if (pool->clock_sources[i] == NULL) { in dcn303_resource_construct()
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| /drivers/gpu/drm/amd/display/dc/resource/dcn32/ |
| A D | dcn32_resource.c | 1462 if (pool->base.clock_sources[i] != NULL) { in dcn32_resource_destruct()
1463 dcn20_clock_source_destroy(&pool->base.clock_sources[i]); in dcn32_resource_destruct()
1464 pool->base.clock_sources[i] = NULL; in dcn32_resource_destruct()
2309 pool->base.clock_sources[DCN32_CLK_SRC_PLL0] = in dcn32_resource_construct()
2313 pool->base.clock_sources[DCN32_CLK_SRC_PLL1] = in dcn32_resource_construct()
2317 pool->base.clock_sources[DCN32_CLK_SRC_PLL2] = in dcn32_resource_construct()
2321 pool->base.clock_sources[DCN32_CLK_SRC_PLL3] = in dcn32_resource_construct()
2325 pool->base.clock_sources[DCN32_CLK_SRC_PLL4] = in dcn32_resource_construct()
2339 if (pool->base.clock_sources[i] == NULL) { in dcn32_resource_construct()
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| /drivers/gpu/drm/amd/display/dc/resource/dcn401/ |
| A D | dcn401_resource.c | 1465 if (pool->base.clock_sources[i] != NULL) { in dcn401_resource_destruct()
1466 dcn20_clock_source_destroy(&pool->base.clock_sources[i]); in dcn401_resource_destruct()
1467 pool->base.clock_sources[i] = NULL; in dcn401_resource_destruct()
2007 pool->base.clock_sources[DCN401_CLK_SRC_PLL0] = in dcn401_resource_construct()
2011 pool->base.clock_sources[DCN401_CLK_SRC_PLL1] = in dcn401_resource_construct()
2015 pool->base.clock_sources[DCN401_CLK_SRC_PLL2] = in dcn401_resource_construct()
2019 pool->base.clock_sources[DCN401_CLK_SRC_PLL3] = in dcn401_resource_construct()
2037 if (pool->base.clock_sources[i] == NULL) { in dcn401_resource_construct()
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| /drivers/gpu/drm/amd/display/dc/inc/ |
| A D | core_types.h | 307 struct clock_source *clock_sources[MAX_CLOCK_SOURCES]; member
|