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Searched refs:cmdq_reg (Results 1 – 14 of 14) sorted by relevance

/drivers/gpu/drm/mediatek/
A Dmtk_mdp_rdma.c96 struct cmdq_client_reg cmdq_reg; member
155 FLD_EXT_PREULTRA_EN | FLD_COMMAND_DIV, &priv->cmdq_reg, in mtk_mdp_rdma_fifo_config()
165 mtk_ddp_write_mask(cmdq_pkt, FLD_ROT_ENABLE, &priv->cmdq_reg, in mtk_mdp_rdma_start()
173 mtk_ddp_write_mask(cmdq_pkt, 0, &priv->cmdq_reg, in mtk_mdp_rdma_stop()
196 mtk_ddp_write_mask(cmdq_pkt, FLD_OUTPUT_ARGB, &priv->cmdq_reg, in mtk_mdp_rdma_config()
199 mtk_ddp_write_mask(cmdq_pkt, 0, &priv->cmdq_reg, priv->regs, in mtk_mdp_rdma_config()
202 mtk_ddp_write_mask(cmdq_pkt, cfg->addr0, &priv->cmdq_reg, priv->regs, in mtk_mdp_rdma_config()
216 &priv->cmdq_reg, priv->regs, MDP_RDMA_TRANSFORM_0, in mtk_mdp_rdma_config()
223 mtk_ddp_write_mask(cmdq_pkt, offset_y, &priv->cmdq_reg, priv->regs, in mtk_mdp_rdma_config()
225 mtk_ddp_write_mask(cmdq_pkt, cfg->width, &priv->cmdq_reg, priv->regs, in mtk_mdp_rdma_config()
[all …]
A Dmtk_disp_merge.c67 struct cmdq_client_reg cmdq_reg; member
88 mtk_ddp_write(cmdq_pkt, 0x0, &priv->cmdq_reg, priv->regs, in mtk_merge_start_cmdq()
91 mtk_ddp_write(cmdq_pkt, 1, &priv->cmdq_reg, priv->regs, in mtk_merge_start_cmdq()
100 mtk_ddp_write(cmdq_pkt, 0x1, &priv->cmdq_reg, priv->regs, in mtk_merge_stop_cmdq()
103 mtk_ddp_write(cmdq_pkt, 0, &priv->cmdq_reg, priv->regs, in mtk_merge_stop_cmdq()
114 &priv->cmdq_reg, priv->regs, DISP_REG_MERGE_CFG_36); in mtk_merge_fifo_setting()
117 &priv->cmdq_reg, priv->regs, DISP_REG_MERGE_CFG_37, in mtk_merge_fifo_setting()
121 &priv->cmdq_reg, priv->regs, DISP_REG_MERGE_CFG_40, in mtk_merge_fifo_setting()
125 &priv->cmdq_reg, priv->regs, DISP_REG_MERGE_CFG_41, in mtk_merge_fifo_setting()
190 mtk_ddp_write_mask(cmdq_pkt, mode, &priv->cmdq_reg, priv->regs, in mtk_merge_advance_config()
[all …]
A Dmtk_ddp_comp.c66 struct cmdq_client_reg cmdq_reg; member
70 struct cmdq_client_reg *cmdq_reg, void __iomem *regs, in mtk_ddp_write() argument
75 cmdq_pkt_write(cmdq_pkt, cmdq_reg->subsys, in mtk_ddp_write()
76 cmdq_reg->offset + offset, value); in mtk_ddp_write()
88 cmdq_pkt_write(cmdq_pkt, cmdq_reg->subsys, in mtk_ddp_write_relaxed()
89 cmdq_reg->offset + offset, value); in mtk_ddp_write_relaxed()
96 struct cmdq_client_reg *cmdq_reg, void __iomem *regs, in mtk_ddp_write_mask() argument
101 cmdq_pkt_write_mask(cmdq_pkt, cmdq_reg->subsys, in mtk_ddp_write_mask()
102 cmdq_reg->offset + offset, value, mask); in mtk_ddp_write_mask()
143 cmdq_reg, regs, DISP_REG_DITHER_15); in mtk_dither_set_common()
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A Dmtk_disp_ovl.c164 struct cmdq_client_reg cmdq_reg; member
292 &ovl->cmdq_reg, ovl->regs, in mtk_ovl_set_afbc()
309 &ovl->cmdq_reg, ovl->regs, DISP_REG_OVL_CLRFMT_EXT, in mtk_ovl_set_bit_depth()
327 mtk_ddp_write_relaxed(cmdq_pkt, OVL_COLOR_ALPHA, &ovl->cmdq_reg, in mtk_ovl_config()
376 mtk_ddp_write(cmdq_pkt, 0x1, &ovl->cmdq_reg, ovl->regs, in mtk_ovl_layer_on()
388 &ovl->cmdq_reg, ovl->regs, DISP_REG_OVL_RDMA_GMC(idx)); in mtk_ovl_layer_on()
398 mtk_ddp_write_mask(cmdq_pkt, 0, &ovl->cmdq_reg, ovl->regs, in mtk_ovl_layer_off()
400 mtk_ddp_write(cmdq_pkt, 0, &ovl->cmdq_reg, ovl->regs, in mtk_ovl_layer_off()
556 mtk_ddp_write_relaxed(cmdq_pkt, con, &ovl->cmdq_reg, ovl->regs, in mtk_ovl_layer_config()
559 &ovl->cmdq_reg, ovl->regs, DISP_REG_OVL_PITCH(idx)); in mtk_ovl_layer_config()
[all …]
A Dmtk_disp_ccorr.c39 struct cmdq_client_reg cmdq_reg; member
63 mtk_ddp_write(cmdq_pkt, w << 16 | h, &ccorr->cmdq_reg, ccorr->regs, in mtk_ccorr_config()
65 mtk_ddp_write(cmdq_pkt, CCORR_ENGINE_EN, &ccorr->cmdq_reg, ccorr->regs, in mtk_ccorr_config()
125 &ccorr->cmdq_reg, ccorr->regs, DISP_CCORR_COEF_0); in mtk_ccorr_ctm_set()
127 &ccorr->cmdq_reg, ccorr->regs, DISP_CCORR_COEF_1); in mtk_ccorr_ctm_set()
129 &ccorr->cmdq_reg, ccorr->regs, DISP_CCORR_COEF_2); in mtk_ccorr_ctm_set()
131 &ccorr->cmdq_reg, ccorr->regs, DISP_CCORR_COEF_3); in mtk_ccorr_ctm_set()
133 &ccorr->cmdq_reg, ccorr->regs, DISP_CCORR_COEF_4); in mtk_ccorr_ctm_set()
173 ret = cmdq_dev_get_client_reg(dev, &priv->cmdq_reg, 0); in mtk_disp_ccorr_probe()
A Dmtk_disp_rdma.c84 struct cmdq_client_reg cmdq_reg; member
193 mtk_ddp_write_mask(cmdq_pkt, width, &rdma->cmdq_reg, rdma->regs, in mtk_rdma_config()
195 mtk_ddp_write_mask(cmdq_pkt, height, &rdma->cmdq_reg, rdma->regs, in mtk_rdma_config()
273 mtk_ddp_write_mask(cmdq_pkt, RDMA_MATRIX_ENABLE, &rdma->cmdq_reg, rdma->regs, in mtk_rdma_layer_config()
277 &rdma->cmdq_reg, rdma->regs, DISP_REG_RDMA_SIZE_CON_0, in mtk_rdma_layer_config()
280 mtk_ddp_write_mask(cmdq_pkt, 0, &rdma->cmdq_reg, rdma->regs, in mtk_rdma_layer_config()
284 mtk_ddp_write_relaxed(cmdq_pkt, addr, &rdma->cmdq_reg, rdma->regs, in mtk_rdma_layer_config()
286 mtk_ddp_write_relaxed(cmdq_pkt, pitch, &rdma->cmdq_reg, rdma->regs, in mtk_rdma_layer_config()
288 mtk_ddp_write(cmdq_pkt, RDMA_MEM_GMC, &rdma->cmdq_reg, rdma->regs, in mtk_rdma_layer_config()
290 mtk_ddp_write_mask(cmdq_pkt, RDMA_MODE_MEMORY, &rdma->cmdq_reg, rdma->regs, in mtk_rdma_layer_config()
[all …]
A Dmtk_disp_color.c42 struct cmdq_client_reg cmdq_reg; member
66 mtk_ddp_write(cmdq_pkt, w, &color->cmdq_reg, color->regs, DISP_COLOR_WIDTH(color)); in mtk_color_config()
67 mtk_ddp_write(cmdq_pkt, h, &color->cmdq_reg, color->regs, DISP_COLOR_HEIGHT(color)); in mtk_color_config()
115 ret = cmdq_dev_get_client_reg(dev, &priv->cmdq_reg, 0); in mtk_disp_color_probe()
A Dmtk_disp_aal.c49 struct cmdq_client_reg cmdq_reg; member
77 mtk_ddp_write(cmdq_pkt, sz, &aal->cmdq_reg, aal->regs, DISP_AAL_SIZE); in mtk_aal_config()
78 mtk_ddp_write(cmdq_pkt, sz, &aal->cmdq_reg, aal->regs, DISP_AAL_OUTPUT_SIZE); in mtk_aal_config()
188 ret = cmdq_dev_get_client_reg(dev, &priv->cmdq_reg, 0); in mtk_disp_aal_probe()
A Dmtk_disp_gamma.c63 struct cmdq_client_reg cmdq_reg; member
219 mtk_ddp_write(cmdq_pkt, sz, &gamma->cmdq_reg, gamma->regs, DISP_GAMMA_SIZE); in mtk_gamma_config()
221 mtk_dither_set_common(gamma->regs, &gamma->cmdq_reg, bpc, in mtk_gamma_config()
276 ret = cmdq_dev_get_client_reg(dev, &priv->cmdq_reg, 0); in mtk_disp_gamma_probe()
A Dmtk_padding.c38 struct cmdq_client_reg cmdq_reg; member
116 ret = cmdq_dev_get_client_reg(dev, &priv->cmdq_reg, 0); in mtk_padding_probe()
A Dmtk_ddp_comp.h357 struct cmdq_client_reg *cmdq_reg, void __iomem *regs,
360 struct cmdq_client_reg *cmdq_reg, void __iomem *regs,
363 struct cmdq_client_reg *cmdq_reg, void __iomem *regs,
A Dmtk_disp_drv.h42 void mtk_dither_set_common(void __iomem *regs, struct cmdq_client_reg *cmdq_reg,
/drivers/soc/mediatek/
A Dmtk-mutex.c368 struct cmdq_client_reg cmdq_reg; member
996 if (!mtx->cmdq_reg.size) { in mtk_mutex_enable_by_cmdq()
1001 cmdq_pkt_write(cmdq_pkt, mtx->cmdq_reg.subsys, in mtk_mutex_enable_by_cmdq()
1123 ret = cmdq_dev_get_client_reg(dev, &mtx->cmdq_reg, 0); in mtk_mutex_probe()
/drivers/media/platform/mediatek/mdp3/
A Dmtk-mdp3-comp.c1676 struct cmdq_client_reg cmdq_reg; in mdp_get_subsys_id() local
1692 ret = cmdq_dev_get_client_reg(&comp_pdev->dev, &cmdq_reg, index); in mdp_get_subsys_id()
1699 comp->subsys_id = cmdq_reg.subsys; in mdp_get_subsys_id()
1700 dev_dbg(&comp_pdev->dev, "subsys id=%d\n", cmdq_reg.subsys); in mdp_get_subsys_id()

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