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Searched refs:cmrr (Results 1 – 4 of 4) sorted by relevance

/drivers/gpu/drm/i915/display/
A Dintel_vrr.c223 crtc_state->cmrr.cmrr_n); in cmrr_get_vtotal()
225 crtc_state->cmrr.cmrr_m = do_div(adjusted_pixel_rate, crtc_state->cmrr.cmrr_n); in cmrr_get_vtotal()
233 crtc_state->cmrr.enable = true; in intel_vrr_compute_cmrr_timings()
479 if (crtc_state->cmrr.enable) { in intel_vrr_set_transcoder_timings()
481 upper_32_bits(crtc_state->cmrr.cmrr_m)); in intel_vrr_set_transcoder_timings()
483 lower_32_bits(crtc_state->cmrr.cmrr_m)); in intel_vrr_set_transcoder_timings()
485 upper_32_bits(crtc_state->cmrr.cmrr_n)); in intel_vrr_set_transcoder_timings()
619 if (crtc_state->cmrr.enable) { in intel_vrr_enable()
714 if (crtc_state->cmrr.enable) { in intel_vrr_get_config()
715 crtc_state->cmrr.cmrr_n = in intel_vrr_get_config()
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A Dintel_display.c982 return old_crtc_state->cmrr.cmrr_m != new_crtc_state->cmrr.cmrr_m || in cmrr_params_changed()
983 old_crtc_state->cmrr.cmrr_n != new_crtc_state->cmrr.cmrr_n; in cmrr_params_changed()
5430 PIPE_CONF_CHECK_LLI(cmrr.cmrr_m); in intel_pipe_config_compare()
5431 PIPE_CONF_CHECK_LLI(cmrr.cmrr_n); in intel_pipe_config_compare()
5432 PIPE_CONF_CHECK_BOOL(cmrr.enable); in intel_pipe_config_compare()
A Dintel_display_types.h1328 } cmrr; member
A Dintel_dp.c2861 if (crtc_state->cmrr.enable) { in intel_dp_compute_as_sdp()

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