| /drivers/infiniband/core/ |
| A D | multicast.c | 255 static int check_selector(ib_sa_comp_mask comp_mask, in check_selector() argument 262 if (!(comp_mask & selector_mask) || !(comp_mask & value_mask)) in check_selector() 288 if (comp_mask & IB_SA_MCMEMBER_REC_PORT_GID && in cmp_rec() 299 if (comp_mask & IB_SA_MCMEMBER_REC_TRAFFIC_CLASS && in cmp_rec() 308 if (check_selector(comp_mask, in cmp_rec() 316 if (comp_mask & IB_SA_MCMEMBER_REC_FLOW_LABEL && in cmp_rec() 319 if (comp_mask & IB_SA_MCMEMBER_REC_HOP_LIMIT && in cmp_rec() 339 member->multicast.comp_mask, in send_join() 452 multicast->comp_mask); in mcast_work_handler() 610 ib_sa_comp_mask comp_mask, gfp_t gfp_mask, in ib_sa_join_multicast() argument [all …]
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| A D | sa_query.c | 704 ib_sa_comp_mask comp_mask = mad->sa_hdr.comp_mask; in ib_nl_set_path_rec_attrs() local 731 if (comp_mask & IB_SA_PATH_REC_DGID) in ib_nl_set_path_rec_attrs() 734 if (comp_mask & IB_SA_PATH_REC_SGID) in ib_nl_set_path_rec_attrs() 759 if (comp_mask & IB_SA_PATH_REC_DGID) in ib_nl_get_path_rec_attrs_len() 761 if (comp_mask & IB_SA_PATH_REC_SGID) in ib_nl_get_path_rec_attrs_len() 1519 ib_sa_comp_mask comp_mask, in ib_sa_path_rec_get() argument 1583 mad->sa_hdr.comp_mask = comp_mask; in ib_sa_path_rec_get() 1646 ib_sa_comp_mask comp_mask, in ib_sa_mcmember_rec_query() argument 1688 mad->sa_hdr.comp_mask = comp_mask; in ib_sa_mcmember_rec_query() 1785 mad->sa_hdr.comp_mask = comp_mask; in ib_sa_guid_info_rec_query() [all …]
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| A D | sa.h | 54 ib_sa_comp_mask comp_mask,
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| A D | uverbs_cmd.c | 1126 if (cmd.comp_mask) in ib_uverbs_ex_create_cq() 1337 if (cmd->comp_mask & IB_UVERBS_CREATE_QP_MASK_IND_TABLE) { in create_qp() 1565 if (cmd.comp_mask & ~IB_UVERBS_CREATE_QP_SUP_COMP_MASK) in ib_uverbs_ex_create_qp() 2925 if (cmd.comp_mask) in ib_uverbs_ex_create_wq() 3008 if (cmd.comp_mask) in ib_uverbs_ex_destroy_wq() 3095 if (cmd.comp_mask) in ib_uverbs_ex_create_rwq_ind_table() 3198 if (cmd.comp_mask) in ib_uverbs_ex_destroy_rwq_ind_table() 3226 if (cmd.comp_mask) in ib_uverbs_ex_create_flow() 3381 if (cmd.comp_mask) in ib_uverbs_ex_destroy_flow() 3635 if (cmd.comp_mask) in ib_uverbs_ex_query_device() [all …]
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| A D | cma.c | 2947 ib_sa_comp_mask comp_mask; in cma_query_ib_route() local 2965 comp_mask = IB_SA_PATH_REC_DGID | IB_SA_PATH_REC_SGID | in cma_query_ib_route() 2972 comp_mask |= IB_SA_PATH_REC_QOS_CLASS; in cma_query_ib_route() 2977 comp_mask |= IB_SA_PATH_REC_TRAFFIC_CLASS; in cma_query_ib_route() 2982 comp_mask |= IB_SA_PATH_REC_TRAFFIC_CLASS; in cma_query_ib_route() 2988 comp_mask, timeout_ms, in cma_query_ib_route() 4916 ib_sa_comp_mask comp_mask; in cma_join_ib_multicast() local 4937 comp_mask = IB_SA_MCMEMBER_REC_MGID | IB_SA_MCMEMBER_REC_PORT_GID | in cma_join_ib_multicast() 4944 comp_mask |= IB_SA_MCMEMBER_REC_RATE | in cma_join_ib_multicast() 4951 id_priv->id.port_num, &rec, comp_mask, in cma_join_ib_multicast()
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| /drivers/infiniband/hw/mlx4/ |
| A D | mcg.c | 298 mad.sa_hdr.comp_mask = IB_SA_MCMEMBER_REC_MGID | in send_leave_to_wire() 352 static int check_selector(ib_sa_comp_mask comp_mask, in check_selector() argument 362 if (!(comp_mask & selector_mask) || !(comp_mask & value_mask)) in check_selector() 384 struct ib_sa_mcmember_data *dst, ib_sa_comp_mask comp_mask) in cmp_rec() argument 395 if (check_selector(comp_mask, IB_SA_MCMEMBER_REC_MTU_SELECTOR, in cmp_rec() 399 if (comp_mask & IB_SA_MCMEMBER_REC_TRAFFIC_CLASS && in cmp_rec() 408 if (check_selector(comp_mask, in cmp_rec() 413 if (comp_mask & IB_SA_MCMEMBER_REC_SL && in cmp_rec() 417 if (comp_mask & IB_SA_MCMEMBER_REC_FLOW_LABEL && in cmp_rec() 421 if (comp_mask & IB_SA_MCMEMBER_REC_HOP_LIMIT && in cmp_rec() [all …]
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| A D | alias_GUID.c | 455 ib_sa_comp_mask comp_mask = 0; in invalidate_guid_record() local 474 comp_mask |= mlx4_ib_get_aguid_comp_mask_from_ix(i); in invalidate_guid_record() 477 all_rec_per_port[index].guid_indexes |= comp_mask; in invalidate_guid_record() 491 ib_sa_comp_mask comp_mask; in set_guid_rec() local 535 comp_mask = IB_SA_GUIDINFO_REC_LID | IB_SA_GUIDINFO_REC_BLOCK_NUM | in set_guid_rec() 546 comp_mask, rec->method, 1000, in set_guid_rec()
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| A D | qp.c | 741 if (ucmd.comp_mask || ucmd.reserved1) in _mlx4_ib_create_qp_rss() 893 if (wq.comp_mask || wq.reserved[0] || wq.reserved[1] || in create_rq() 4140 required_cmd_sz = offsetof(typeof(ucmd), comp_mask) + in mlx4_ib_create_wq() 4141 sizeof(ucmd.comp_mask); in mlx4_ib_create_wq() 4290 if (ucmd.comp_mask || ucmd.reserved) in mlx4_ib_modify_wq()
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| A D | mlx4_ib.h | 666 __u32 comp_mask; member
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| /drivers/crypto/ccree/ |
| A D | cc_driver.c | 207 if (irr & drvdata->comp_mask) { in cc_isr() 211 cc_iowrite(drvdata, CC_REG(HOST_IMR), imr | drvdata->comp_mask); in cc_isr() 212 irr &= ~drvdata->comp_mask; in cc_isr() 292 val = drvdata->comp_mask | CC_AXI_ERR_IRQ_MASK; in init_cc_regs() 338 new_drvdata->comp_mask = CC_COMP_IRQ_MASK; in init_cc_resources() 459 new_drvdata->comp_mask |= CC_CPP_SM4_ABORT_MASK; in init_cc_resources() 461 new_drvdata->comp_mask |= CC_CPP_AES_ABORT_MASK; in init_cc_resources()
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| A D | cc_request_mgr.c | 622 irq = (drvdata->irq & drvdata->comp_mask); in comp_handler() 639 irq = (drvdata->irq & drvdata->comp_mask); in comp_handler() 658 cc_ioread(drvdata, CC_REG(HOST_IMR)) & ~drvdata->comp_mask); in comp_handler()
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| A D | cc_driver.h | 155 u32 comp_mask; member
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| /drivers/gpu/drm/arm/display/komeda/ |
| A D | komeda_pipeline.c | 142 u32 comp_mask) in komeda_pipeline_get_first_component() argument 145 unsigned long comp_mask_local = (unsigned long)comp_mask; in komeda_pipeline_get_first_component()
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| A D | komeda_pipeline.h | 497 u32 comp_mask);
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| /drivers/infiniband/ulp/ipoib/ |
| A D | ipoib_multicast.c | 468 ib_sa_comp_mask comp_mask; in ipoib_mcast_join() local 484 comp_mask = in ipoib_mcast_join() 498 comp_mask |= in ipoib_mcast_join() 535 &rec, comp_mask, GFP_ATOMIC, in ipoib_mcast_join()
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| /drivers/media/platform/qcom/camss/ |
| A D | camss-vfe-4-1.c | 561 u32 comp_mask = 0; in vfe_enable_irq_pix_line() local 571 comp_mask |= (1 << output->wm_idx[i]) << comp * 8; in vfe_enable_irq_pix_line() 577 vfe_reg_set(vfe, VFE_0_IRQ_COMPOSITE_MASK_0, comp_mask); in vfe_enable_irq_pix_line() 581 vfe_reg_clr(vfe, VFE_0_IRQ_COMPOSITE_MASK_0, comp_mask); in vfe_enable_irq_pix_line()
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| A D | camss-vfe-4-7.c | 713 u32 comp_mask = 0; in vfe_enable_irq_pix_line() local 723 comp_mask |= (1 << output->wm_idx[i]) << comp * 8; in vfe_enable_irq_pix_line() 729 vfe_reg_set(vfe, VFE_0_IRQ_COMPOSITE_MASK_0, comp_mask); in vfe_enable_irq_pix_line() 733 vfe_reg_clr(vfe, VFE_0_IRQ_COMPOSITE_MASK_0, comp_mask); in vfe_enable_irq_pix_line()
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| A D | camss-vfe-4-8.c | 685 u32 comp_mask = 0; in vfe_enable_irq_pix_line() local 694 comp_mask |= (1 << output->wm_idx[i]) << comp * 8; in vfe_enable_irq_pix_line() 700 vfe_reg_set(vfe, VFE_0_IRQ_COMPOSITE_MASK_0, comp_mask); in vfe_enable_irq_pix_line() 704 vfe_reg_clr(vfe, VFE_0_IRQ_COMPOSITE_MASK_0, comp_mask); in vfe_enable_irq_pix_line()
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| /drivers/infiniband/hw/efa/ |
| A D | efa_verbs.c | 726 if (cmd.comp_mask || !is_reserved_cleared(cmd.reserved_98)) { in efa_create_qp() 1128 resp->comp_mask |= EFA_CREATE_CQ_RESP_DB_OFF; in cq_mmap_entries_setup() 1187 if (cmd.comp_mask || !is_reserved_cleared(cmd.reserved_58)) { in efa_create_cq_umem() 1944 if (EFA_CHECK_USER_COMP(dev, cmd->comp_mask, max_tx_batch, in efa_user_comp_handshake() 1948 if (EFA_CHECK_USER_COMP(dev, cmd->comp_mask, min_sq_depth, in efa_user_comp_handshake()
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| /drivers/infiniband/hw/mlx5/ |
| A D | qp.c | 1597 resp->comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_TISN; in create_raw_packet_qp() 1599 resp->comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_SQN; in create_raw_packet_qp() 1625 resp->comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_RQN; in create_raw_packet_qp() 1627 resp->comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_TIRN; in create_raw_packet_qp() 1640 resp->comp_mask |= in create_raw_packet_qp() 1734 if (ucmd->comp_mask) { in create_rss_raw_qp_tir() 1903 params->resp.comp_mask |= in create_rss_raw_qp_tir() 4717 if (ucmd.comp_mask & ~MLX5_IB_MODIFY_QP_OOO_DP || in mlx5_ib_modify_qp() 4722 if (ucmd.comp_mask & MLX5_IB_MODIFY_QP_OOO_DP) { in mlx5_ib_modify_qp() 5408 if (ucmd.comp_mask & (~MLX5_IB_CREATE_WQ_STRIDING_RQ)) { in prepare_user_rq() [all …]
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| A D | main.c | 903 resp_len = sizeof(resp.comp_mask) + sizeof(resp.response_length); in mlx5_ib_query_device() 1910 resp->comp_mask |= in set_ucontext_resp() 1951 resp->comp_mask |= in set_ucontext_resp() 1959 resp->comp_mask |= MLX5_IB_ALLOC_UCONTEXT_RESP_MASK_ECE; in set_ucontext_resp() 1964 resp->comp_mask |= in set_ucontext_resp() 1970 resp->comp_mask |= MLX5_IB_ALLOC_UCONTEXT_RESP_MASK_SQD2RTS; in set_ucontext_resp() 1972 resp->comp_mask |= in set_ucontext_resp() 2017 if (req.comp_mask || req.reserved0 || req.reserved1 || req.reserved2) in mlx5_ib_alloc_ucontext()
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| A D | mr.c | 2550 __u32 comp_mask; in mlx5_ib_alloc_mw() member 2558 if (req.comp_mask || req.reserved1 || req.reserved2) in mlx5_ib_alloc_mw()
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| /drivers/infiniband/hw/bnxt_re/ |
| A D | ib_verbs.c | 1894 resp.comp_mask |= BNXT_RE_SRQ_TOGGLE_PAGE_SUPPORT; in bnxt_re_create_srq() 3167 resp.comp_mask |= BNXT_RE_CQ_TOGGLE_PAGE_SUPPORT; in bnxt_re_create_cq() 4317 resp.comp_mask = BNXT_RE_UCNTX_CMASK_HAVE_CCTX; in bnxt_re_alloc_ucontext() 4332 resp.comp_mask |= BNXT_RE_UCNTX_CMASK_WC_DPI_ENABLED; in bnxt_re_alloc_ucontext() 4341 resp.comp_mask |= BNXT_RE_UCNTX_CMASK_DBR_PACING_ENABLED; in bnxt_re_alloc_ucontext() 4344 resp.comp_mask |= BNXT_RE_UCNTX_CMASK_MSN_TABLE_ENABLED; in bnxt_re_alloc_ucontext() 4350 if (ureq.comp_mask & BNXT_RE_COMP_MASK_REQ_UCNTX_POW2_SUPPORT) { in bnxt_re_alloc_ucontext() 4351 resp.comp_mask |= BNXT_RE_UCNTX_CMASK_POW2_DISABLED; in bnxt_re_alloc_ucontext() 4354 if (ureq.comp_mask & BNXT_RE_COMP_MASK_REQ_UCNTX_VAR_WQE_SUPPORT) { in bnxt_re_alloc_ucontext() 4355 resp.comp_mask |= BNXT_RE_UCNTX_CMASK_HAVE_MODE; in bnxt_re_alloc_ucontext()
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| /drivers/infiniband/hw/hns/ |
| A D | hns_roce_qp.c | 1081 if (ucmd->comp_mask & HNS_ROCE_CREATE_QP_MASK_CONGEST_TYPE) in set_congest_param()
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| /drivers/infiniband/hw/irdma/ |
| A D | verbs.c | 295 if (req.comp_mask & IRDMA_ALLOC_UCTX_USE_RAW_ATTR) in irdma_alloc_ucontext() 332 uresp.comp_mask |= IRDMA_ALLOC_UCTX_USE_RAW_ATTR; in irdma_alloc_ucontext() 334 uresp.comp_mask |= IRDMA_ALLOC_UCTX_MIN_HW_WQ_SIZE; in irdma_alloc_ucontext()
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