Searched refs:con1 (Results 1 – 5 of 5) sorted by relevance
| /drivers/iio/adc/ |
| A D | exynos_adc.c | 231 u32 con1; in exynos_adc_v1_init_hw() local
240 con1 |= ADC_V1_CON_RES; in exynos_adc_v1_init_hw()
267 u32 con1; in exynos_adc_v1_start_conv() local
313 u32 con1; in exynos_adc_s3c2416_start_conv() local
339 u32 con1; in exynos_adc_s3c2443_start_conv() local
360 u32 con1; in exynos_adc_s3c64xx_start_conv() local
389 u32 con1, con2; in exynos_adc_v2_init_hw() local
394 con1 = ADC_V2_CON1_SOFT_RESET; in exynos_adc_v2_init_hw()
425 u32 con1, con2; in exynos_adc_v2_start_conv() local
463 u32 con1, con2; in exynos_adc_exynos7_init_hw() local
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| /drivers/pwm/ |
| A D | pwm-mtk-disp.c | 34 unsigned int con1; member
152 mtk_disp_pwm_update_bits(mdp, mdp->data->con1, in mtk_disp_pwm_apply()
178 u32 clk_div, pwm_en, con0, con1; in mtk_disp_pwm_get_state() local
206 con1 = readl(mdp->base + mdp->data->con1); in mtk_disp_pwm_get_state()
210 period = FIELD_GET(PWM_PERIOD_MASK, con1); in mtk_disp_pwm_get_state()
216 high_width = FIELD_GET(PWM_HIGH_WIDTH_MASK, con1); in mtk_disp_pwm_get_state()
271 .con1 = 0xac,
281 .con1 = 0x14,
291 .con1 = 0x1c,
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| /drivers/clk/samsung/ |
| A D | clk-pll.c | 681 u32 con0, con1; in samsung_pll45xx_set_rate() local
692 con1 = readl_relaxed(pll->con_reg + 0x4); in samsung_pll45xx_set_rate()
712 con1 = readl_relaxed(pll->con_reg + 0x4); in samsung_pll45xx_set_rate()
714 con1 |= (rate->afc << PLL45XX_AFC_SHIFT); in samsung_pll45xx_set_rate()
729 writel_relaxed(con1, pll->con_reg + 0x4); in samsung_pll45xx_set_rate()
818 u32 con0, con1, lock; in samsung_pll46xx_set_rate() local
829 con1 = readl_relaxed(pll->con_reg + 0x4); in samsung_pll46xx_set_rate()
864 con1 = readl_relaxed(pll->con_reg + 0x4); in samsung_pll46xx_set_rate()
1151 u32 con0, con1; in samsung_pll2650x_set_rate() local
1162 con1 = readl_relaxed(pll->con_reg + 4); in samsung_pll2650x_set_rate()
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| /drivers/media/dvb-frontends/ |
| A D | itd1000.c | 120 u8 con1 = itd1000_read_reg(state, CON1) & 0xfd; in itd1000_set_lpf_bw() local
128 itd1000_write_reg(state, CON1, con1 | (1 << 1)); in itd1000_set_lpf_bw()
139 itd1000_write_reg(state, CON1, con1 | (0 << 1)); in itd1000_set_lpf_bw()
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| /drivers/net/ethernet/stmicro/stmmac/ |
| A D | dwmac-rk.c | 251 unsigned int con1; in px30_set_speed() local
260 con1 = PX30_GMAC_SPEED_10M; in px30_set_speed()
263 con1 = PX30_GMAC_SPEED_100M; in px30_set_speed()
270 regmap_write(bsp_priv->grf, PX30_GRF_GMAC_CON1, con1); in px30_set_speed()
989 u32 con0, con1; in rk3568_set_to_rgmii() local
993 con1 = (bsp_priv->id == 1) ? RK3568_GRF_GMAC1_CON1 : in rk3568_set_to_rgmii()
1000 regmap_write(bsp_priv->grf, con1, in rk3568_set_to_rgmii()
1008 u32 con1; in rk3568_set_to_rmii() local
1010 con1 = (bsp_priv->id == 1) ? RK3568_GRF_GMAC1_CON1 : in rk3568_set_to_rmii()
1012 regmap_write(bsp_priv->grf, con1, RK3568_GMAC_PHY_INTF_SEL_RMII); in rk3568_set_to_rmii()
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