Searched refs:conf0 (Results 1 – 8 of 8) sorted by relevance
| /drivers/tty/serial/ |
| A D | esp32_uart.c | 176 u32 conf0 = esp32_uart_read(port, UART_CONF0_REG); in esp32_uart_set_mctrl() local
178 conf0 &= ~(UART_LOOPBACK | in esp32_uart_set_mctrl()
183 conf0 |= UART_SW_RTS; in esp32_uart_set_mctrl()
185 conf0 |= UART_SW_DTR; in esp32_uart_set_mctrl()
187 conf0 |= UART_LOOPBACK; in esp32_uart_set_mctrl()
189 esp32_uart_write(port, UART_CONF0_REG, conf0); in esp32_uart_set_mctrl()
395 u32 conf0, conf1; in esp32_uart_set_termios() local
411 conf0 = esp32_uart_read(port, UART_CONF0_REG); in esp32_uart_set_termios()
418 conf0 |= UART_PARITY_EN; in esp32_uart_set_termios()
420 conf0 |= UART_PARITY; in esp32_uart_set_termios()
[all …]
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| /drivers/gpu/drm/bridge/synopsys/ |
| A D | dw-hdmi-i2s-audio.c | 43 u8 conf0 = 0; in dw_hdmi_i2s_hw_params() local
58 conf0 = (HDMI_AUD_CONF0_I2S_SELECT | HDMI_AUD_CONF0_I2S_EN0); in dw_hdmi_i2s_hw_params()
63 conf0 |= HDMI_AUD_CONF0_I2S_EN3; in dw_hdmi_i2s_hw_params()
66 conf0 |= HDMI_AUD_CONF0_I2S_EN2; in dw_hdmi_i2s_hw_params()
69 conf0 |= HDMI_AUD_CONF0_I2S_EN1; in dw_hdmi_i2s_hw_params()
110 hdmi_write(audio, conf0, HDMI_AUD_CONF0); in dw_hdmi_i2s_hw_params()
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| A D | dw-hdmi-qp.c | 322 u32 conf0 = 0; in dw_hdmi_qp_set_audio_interface() local
341 conf0 |= I2S_LINES_EN(3); in dw_hdmi_qp_set_audio_interface()
344 conf0 |= I2S_LINES_EN(2); in dw_hdmi_qp_set_audio_interface()
347 conf0 |= I2S_LINES_EN(1); in dw_hdmi_qp_set_audio_interface()
350 conf0 |= I2S_LINES_EN(0); in dw_hdmi_qp_set_audio_interface()
354 dw_hdmi_qp_mod(hdmi, conf0, I2S_LINES_EN_MSK, AUDIO_INTERFACE_CONFIG0); in dw_hdmi_qp_set_audio_interface()
362 conf0 = (hparms->channels == 8) ? AUD_HBR : AUD_ASP; in dw_hdmi_qp_set_audio_interface()
363 conf0 |= I2S_BPCUV_RCV_EN; in dw_hdmi_qp_set_audio_interface()
366 conf0 = AUD_ASP | I2S_BPCUV_RCV_DIS; in dw_hdmi_qp_set_audio_interface()
370 dw_hdmi_qp_mod(hdmi, conf0, I2S_BPCUV_RCV_MSK | AUD_FORMAT_MSK, in dw_hdmi_qp_set_audio_interface()
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| A D | dw-hdmi-ahb-audio.c | 428 u8 threshold, conf0, conf1, ca; in dw_hdmi_prepare() local
433 conf0 = HDMI_AHB_DMA_CONF0_BURST_MODE | in dw_hdmi_prepare()
441 conf0 = HDMI_AHB_DMA_CONF0_BURST_MODE | in dw_hdmi_prepare()
455 conf0 |= HDMI_AHB_DMA_CONF0_EN_HLOCK; in dw_hdmi_prepare()
460 writeb_relaxed(conf0, dw->data.base + HDMI_AHB_DMA_CONF0); in dw_hdmi_prepare()
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| /drivers/pinctrl/intel/ |
| A D | pinctrl-baytrail.c | 100 u32 conf0; member
1139 u32 conf0, val; in byt_gpio_dbg_show() local
1163 conf0 = readl(conf_reg); in byt_gpio_dbg_show()
1186 switch (conf0 & BYT_PULL_STR_MASK) { in byt_gpio_dbg_show()
1209 conf0 & 0x7, in byt_gpio_dbg_show()
1219 if (conf0 & BYT_IODEN) in byt_gpio_dbg_show()
1414 trig = conf0 & BYT_TRIG_MASK; in byt_direct_irq_sanity_check()
1419 pin, conf0); in byt_direct_irq_sanity_check()
1647 vg->context.pads[i].conf0 = value; in byt_gpio_suspend()
1680 vg->context.pads[i].conf0) { in byt_gpio_resume()
[all …]
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| /drivers/net/wireless/mediatek/mt76/ |
| A D | mt76x02_eeprom.c | 93 u16 conf0 = mt76x02_eeprom_get(dev, MT_EE_NIC_CONF_0); in mt76x02_ext_pa_enabled() local
96 return !(conf0 & MT_EE_NIC_CONF_0_PA_INT_5G); in mt76x02_ext_pa_enabled()
98 return !(conf0 & MT_EE_NIC_CONF_0_PA_INT_2G); in mt76x02_ext_pa_enabled()
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| /drivers/gpu/drm/mcde/ |
| A D | mcde_display.c | 754 u32 conf0; in mcde_configure_dsi_formatter() local
763 conf0 = MCDE_DSIVID0CONF0; in mcde_configure_dsi_formatter()
772 conf0 = MCDE_DSIVID1CONF0; in mcde_configure_dsi_formatter()
781 conf0 = MCDE_DSIVID2CONF0; in mcde_configure_dsi_formatter()
824 writel(val, mcde->regs + conf0); in mcde_configure_dsi_formatter()
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| /drivers/iio/adc/ |
| A D | xilinx-xadc-core.c | 1319 unsigned int conf0; in xadc_probe() local
1353 ret = xadc_parse_dt(indio_dev, &conf0, irq); in xadc_probe()
1417 ret = xadc_write_adc_reg(xadc, XADC_REG_CONF0, conf0); in xadc_probe()
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