| /drivers/iio/light/ |
| A D | isl29125.c | 53 u8 conf1; member
97 data->conf1 | isl29125_regs[si].mode); in isl29125_read_data()
164 data->conf1 |= ISL29125_MODE_RANGE; in isl29125_write_raw()
170 data->conf1); in isl29125_write_raw()
222 data->conf1 |= ISL29125_MODE_RGB; in isl29125_buffer_postenable()
224 data->conf1); in isl29125_buffer_postenable()
231 data->conf1 &= ~ISL29125_MODE_MASK; in isl29125_buffer_predisable()
232 data->conf1 |= ISL29125_MODE_PD; in isl29125_buffer_predisable()
234 data->conf1); in isl29125_buffer_predisable()
270 data->conf1); in isl29125_probe()
[all …]
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| /drivers/gpu/drm/bridge/synopsys/ |
| A D | dw-hdmi-i2s-audio.c | 44 u8 conf1 = 0; in dw_hdmi_i2s_hw_params() local
75 conf1 = HDMI_AUD_CONF1_WIDTH_16; in dw_hdmi_i2s_hw_params()
79 conf1 = HDMI_AUD_CONF1_WIDTH_24; in dw_hdmi_i2s_hw_params()
85 conf1 |= HDMI_AUD_CONF1_MODE_I2S; in dw_hdmi_i2s_hw_params()
88 conf1 |= HDMI_AUD_CONF1_MODE_RIGHT_J; in dw_hdmi_i2s_hw_params()
91 conf1 |= HDMI_AUD_CONF1_MODE_LEFT_J; in dw_hdmi_i2s_hw_params()
94 conf1 |= HDMI_AUD_CONF1_MODE_BURST_1; in dw_hdmi_i2s_hw_params()
97 conf1 |= HDMI_AUD_CONF1_MODE_BURST_2; in dw_hdmi_i2s_hw_params()
111 hdmi_write(audio, conf1, HDMI_AUD_CONF1); in dw_hdmi_i2s_hw_params()
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| A D | dw-hdmi-ahb-audio.c | 80 u8 conf1; member
428 u8 threshold, conf0, conf1, ca; in dw_hdmi_prepare() local
456 conf1 = default_hdmi_channel_config[runtime->channels - 2].conf1; in dw_hdmi_prepare()
461 writeb_relaxed(conf1, dw->data.base + HDMI_AHB_DMA_CONF1); in dw_hdmi_prepare()
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| A D | dw-hdmi-gp-audio.c | 38 u8 conf1; member
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| /drivers/hwmon/ |
| A D | adm1031.c | 77 u8 conf1; member
166 data->conf1 = adm1031_read_value(client, ADM1031_REG_CONF1); in adm1031_update_device()
344 old_fan_mode = data->conf1; in fan_auto_channel_store()
348 ret = get_fan_auto_nearest(data, nr, val, data->conf1); in fan_auto_channel_store()
354 data->conf1 = FAN_CHAN_TO_REG(reg, data->conf1); in fan_auto_channel_store()
355 if ((data->conf1 & ADM1031_CONF1_AUTO_MODE) ^ in fan_auto_channel_store()
357 if (data->conf1 & ADM1031_CONF1_AUTO_MODE) { in fan_auto_channel_store()
375 data->conf1 = FAN_CHAN_TO_REG(reg, data->conf1); in fan_auto_channel_store()
487 if ((data->conf1 & ADM1031_CONF1_AUTO_MODE) && in pwm_store()
518 if (data->conf1 & ADM1031_CONF1_AUTO_MODE) { in trust_fan_readings()
[all …]
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| A D | emc2103.c | 126 u8 conf1; in read_fan_config_from_i2c() local
128 if (read_u8_from_i2c(client, REG_FAN_CONF1, &conf1) < 0) in read_fan_config_from_i2c()
131 data->fan_multiplier = 1 << ((conf1 & 0x60) >> 5); in read_fan_config_from_i2c()
132 data->fan_rpm_control = (conf1 & 0x80) != 0; in read_fan_config_from_i2c()
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| /drivers/atm/ |
| A D | lanai.c | 285 u32 conf1, conf2; /* CONFIG[12] registers */ member
494 reg_write(lanai, lanai->conf1, Config1_Reg); in conf1_write()
890 tmp = (lanai->conf1 & ~CONFIG1_PROMDATA) | in eeprom_read()
892 if (lanai->conf1 != tmp) { in eeprom_read()
1532 lanai->conf1 &= ~CONFIG1_POWERDOWN; in host_vcc_bind()
1552 lanai->conf1 |= CONFIG1_POWERDOWN; in host_vcc_unbind()
1765 if (lanai->conf1 & CONFIG1_POWERDOWN) in lanai_timed_poll()
2185 lanai->conf1 |= CONFIG1_DMA_ENABLE; in lanai_dev_open()
2204 lanai->conf1 = (lanai->conf1 & ~CONFIG1_MASK_LOOPMODE) | in lanai_dev_open()
2211 lanai->conf1 |= CONFIG1_POWERDOWN; in lanai_dev_open()
[all …]
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| /drivers/gpu/drm/mcde/ |
| A D | mcde_display.c | 345 u32 conf1; in mcde_configure_overlay() local
355 conf1 = MCDE_OVL0CONF; in mcde_configure_overlay()
363 conf1 = MCDE_OVL1CONF; in mcde_configure_overlay()
371 conf1 = MCDE_OVL2CONF; in mcde_configure_overlay()
379 conf1 = MCDE_OVL3CONF; in mcde_configure_overlay()
387 conf1 = MCDE_OVL4CONF; in mcde_configure_overlay()
395 conf1 = MCDE_OVL5CONF; in mcde_configure_overlay()
408 writel(val, mcde->regs + conf1); in mcde_configure_overlay()
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| /drivers/tty/serial/ |
| A D | esp32_uart.c | 395 u32 conf0, conf1; in esp32_uart_set_termios() local
414 conf1 = esp32_uart_read(port, UART_CONF1_REG); in esp32_uart_set_termios()
415 conf1 &= ~rx_flow_en; in esp32_uart_set_termios()
444 conf1 |= rx_flow_en; in esp32_uart_set_termios()
447 esp32_uart_write(port, UART_CONF1_REG, conf1); in esp32_uart_set_termios()
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| /drivers/media/rc/ |
| A D | ene_ir.c | 572 u8 conf1 = ene_read_reg(dev, ENE_CIRCFG); in ene_tx_enable() local
575 dev->saved_conf1 = conf1; in ene_tx_enable()
589 conf1 &= ~ENE_CIRCFG_RX_EN; in ene_tx_enable()
592 conf1 |= ENE_CIRCFG_TX_EN | ENE_CIRCFG_TX_IRQ; in ene_tx_enable()
593 ene_write_reg(dev, ENE_CIRCFG, conf1); in ene_tx_enable()
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| /drivers/pci/ |
| A D | quirks.c | 1827 u32 conf1, conf5, class; in quirk_jmicron_ata() local
1834 pci_read_config_dword(pdev, 0x40, &conf1); in quirk_jmicron_ata()
1837 conf1 &= ~0x00CFF302; /* Clear bit 1, 8, 9, 12-19, 22, 23 */ in quirk_jmicron_ata()
1845 conf1 |= 0x0002A100; /* Set 8, 13, 15, 17 */ in quirk_jmicron_ata()
1858 conf1 |= 0x00C2A1B3; /* Set 0, 1, 4, 5, 7, 8, 13, 15, 17, 22, 23 */ in quirk_jmicron_ata()
1863 conf1 |= 0x00C00000; /* Set 22, 23 */ in quirk_jmicron_ata()
1867 pci_write_config_dword(pdev, 0x40, conf1); in quirk_jmicron_ata()
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