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Searched refs:consts (Results 1 – 25 of 27) sorted by relevance

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/drivers/gpu/drm/i915/gt/
A Dintel_llc.c51 struct ia_constants *consts) in get_ia_constants() argument
59 consts->max_ia_freq = cpu_max_MHz(); in get_ia_constants()
61 consts->min_ring_freq = in get_ia_constants()
64 consts->min_ring_freq = mult_frac(consts->min_ring_freq, 8, 3); in get_ia_constants()
74 const struct ia_constants *consts, in calc_ia_freq() argument
79 const int diff = consts->max_gpu_freq - gpu_freq; in calc_ia_freq()
120 struct ia_constants consts; in gen6_update_ring_freq() local
123 if (!get_ia_constants(llc, &consts)) in gen6_update_ring_freq()
130 if (consts.max_gpu_freq <= consts.min_gpu_freq) in gen6_update_ring_freq()
137 for (gpu_freq = consts.max_gpu_freq; in gen6_update_ring_freq()
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A Dselftest_llc.c12 struct ia_constants consts; in gen6_verify_ring_freq() local
19 if (!get_ia_constants(llc, &consts)) in gen6_verify_ring_freq()
22 for (gpu_freq = consts.min_gpu_freq; in gen6_verify_ring_freq()
23 gpu_freq <= consts.max_gpu_freq; in gen6_verify_ring_freq()
30 calc_ia_freq(llc, gpu_freq, &consts, &ia_freq, &ring_freq); in gen6_verify_ring_freq()
36 gpu_freq, consts.min_gpu_freq, consts.max_gpu_freq); in gen6_verify_ring_freq()
44 gpu_freq, consts.min_gpu_freq, consts.max_gpu_freq, in gen6_verify_ring_freq()
54 gpu_freq, consts.min_gpu_freq, consts.max_gpu_freq, in gen6_verify_ring_freq()
/drivers/net/ethernet/microchip/sparx5/
A Dsparx5_ptp.c281 const struct sparx5_consts *consts = sparx5->data->consts; in sparx5_get_hwtimestamp() local
293 sparx5, PTP_PTP_PIN_CFG(consts->tod_pin)); in sparx5_get_hwtimestamp()
448 const struct sparx5_consts *consts; in sparx5_ptp_settime64() local
451 consts = sparx5->data->consts; in sparx5_ptp_settime64()
462 sparx5, PTP_PTP_PIN_CFG(consts->tod_pin)); in sparx5_ptp_settime64()
478 sparx5, PTP_PTP_PIN_CFG(consts->tod_pin)); in sparx5_ptp_settime64()
489 const struct sparx5_consts *consts; in sparx5_ptp_gettime64() local
494 consts = sparx5->data->consts; in sparx5_ptp_gettime64()
504 sparx5, PTP_PTP_PIN_CFG(consts->tod_pin)); in sparx5_ptp_gettime64()
529 const struct sparx5_consts *consts; in sparx5_ptp_adjtime() local
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A Dsparx5_pgid.c8 for (i = 0; i < spx5->data->consts->n_pgids; i++) in sparx5_pgid_init()
26 i < spx5->data->consts->n_pgids; i++) { in sparx5_pgid_alloc_mcast()
40 idx >= spx5->data->consts->n_pgids) in sparx5_pgid_free()
52 return sparx5->data->consts->n_ports + pgid; in sparx5_get_pgid()
A Dsparx5_psfp.c26 sparx5->data->consts->n_filters, id); in sparx5_psfp_sf_get()
32 sparx5->data->consts->n_filters, id); in sparx5_psfp_sf_put()
38 sparx5->data->consts->n_gates, idx, id); in sparx5_psfp_sg_get()
44 sparx5->data->consts->n_gates, id); in sparx5_psfp_sg_put()
50 sparx5->data->consts->n_sdlbs, idx, id); in sparx5_psfp_fm_get()
56 sparx5->data->consts->n_sdlbs, id); in sparx5_psfp_fm_put()
326 for (i = 0; i < sparx5->data->consts->n_lb_groups; i++) { in sparx5_psfp_init()
A Dsparx5_vcap_impl.c1780 const struct sparx5_consts *consts = sparx5->data->consts; in sparx5_vcap_is0_port_key_selection() local
1807 const struct sparx5_consts *consts = sparx5->data->consts; in sparx5_vcap_is2_port_key_selection() local
1824 for (portno = 0; portno < consts->n_ports; ++portno) in sparx5_vcap_is2_port_key_selection()
1835 const struct sparx5_consts *consts = sparx5->data->consts; in sparx5_vcap_es0_port_key_selection() local
1852 const struct sparx5_consts *consts = sparx5->data->consts; in sparx5_vcap_es2_port_key_selection() local
1892 const struct sparx5_consts *consts = sparx5->data->consts; in sparx5_vcap_port_key_deselection() local
2034 const struct sparx5_consts *consts = sparx5->data->consts; in sparx5_vcap_init() local
2056 ctrl->vcaps = consts->vcaps; in sparx5_vcap_init()
2057 ctrl->stats = consts->vcap_stats; in sparx5_vcap_init()
2063 cfg = &consts->vcaps_cfg[idx]; in sparx5_vcap_init()
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A Dsparx5_main.c605 for (idx = 0; idx < sparx5->data->consts->n_sio_clks; idx++) in sparx5_init_coreclock()
627 return (sparx5->data->consts->buf_size / SPX5_BUFFER_CELL_SZ - 100) * in qlim_wm()
633 const struct sparx5_consts *consts = sparx5->data->consts; in sparx5_qlim_set() local
640 consts->qres_max_prio_idx + in sparx5_qlim_set()
646 consts->qres_max_colour_idx + in sparx5_qlim_set()
676 for (idx = 0; idx < sparx5->data->consts->n_ports; idx++) in sparx5_board_init()
687 const struct sparx5_consts *consts = sparx5->data->consts; in sparx5_start() local
694 for (idx = 0; idx < consts->n_own_upsids; idx++) { in sparx5_start()
702 for (idx = consts->n_ports; idx < consts->n_ports_all; idx++) in sparx5_start()
1110 .consts = &sparx5_consts,
A Dsparx5_calendar.c122 if (portno >= sparx5->data->consts->n_ports) { in sparx5_get_port_cal_speed()
156 const struct sparx5_consts *consts = sparx5->data->consts; in sparx5_config_auto_calendar() local
172 for (portno = 0; portno < consts->n_ports_all; portno++) { in sparx5_config_auto_calendar()
180 if (portno < consts->n_ports) in sparx5_config_auto_calendar()
212 for (idx = 0; idx < consts->n_auto_cals; idx++) in sparx5_config_auto_calendar()
303 if (portno < sparx5->data->consts->n_ports_all) { in sparx5_dsm_calendar_calc()
592 for (taxi = 0; taxi < sparx5->data->consts->n_dsm_cal_taxis; ++taxi) { in sparx5_config_dsm_calendar()
A Dsparx5_mactable.c83 const struct sparx5_consts *consts = sparx5->data->consts; in sparx5_mact_learn() local
86 if (pgid < consts->n_ports) { in sparx5_mact_learn()
92 addr = pgid - consts->n_ports; in sparx5_mact_learn()
376 if (port >= sparx5->data->consts->n_ports) in sparx5_mact_handle_entry()
A Dsparx5_netdev.c301 for (portno = 0; portno < sparx5->data->consts->n_ports; portno++) in sparx5_register_netdevs()
320 for (portno = 0; portno < sparx5->data->consts->n_ports; portno++) { in sparx5_destroy_netdevs()
338 for (portno = 0; portno < sparx5->data->consts->n_ports; portno++) in sparx5_unregister_netdevs()
A Dsparx5_sdlb.c189 for (i = sparx5->data->consts->n_lb_groups - 1; i >= 0; i--) { in sparx5_sdlb_group_get_by_rate()
213 for (i = 0; i < sparx5->data->consts->n_lb_groups; i++) { in sparx5_sdlb_group_get_by_index()
A Dsparx5_dcb.c241 for (i = 0; i < sparx5->data->consts->n_ports; i++) { in sparx5_dcb_ieee_dscp_setdel()
390 for (i = 0; i < sparx5->data->consts->n_ports; i++) { in sparx5_dcb_init()
A Dsparx5_ethtool.c1125 for (idx = 0; idx < sparx5->data->consts->n_ports; idx++) in sparx5_update_stats()
1231 const struct sparx5_consts *consts = sparx5->data->consts; in sparx_stats_init() local
1239 consts->n_ports_all * in sparx_stats_init()
1247 for (portno = 0; portno < consts->n_ports; portno++) in sparx_stats_init()
A Dsparx5_fdma.c156 port = fi.src_port < sparx5->data->consts->n_ports ? in sparx5_fdma_rx_get_frame()
290 for (idx = 0; idx < sparx5->data->consts->n_ports; ++idx) { in sparx5_fdma_rx_init()
A Dsparx5_mirror.c202 sparx5->data->consts->n_ports); in sparx5_mirror_del()
A Dsparx5_vlan.c181 for (port = 0; port < sparx5->data->consts->n_ports; port++) { in sparx5_update_fwd()
A Dsparx5_packet.c79 port = fi.src_port < sparx5->data->consts->n_ports ? in sparx5_xtr_grp()
A Dsparx5_switchdev.c563 for (i = 0; i < spx5->data->consts->n_ports; i++) in sparx5_handle_port_mdb_add()
A Dsparx5_main.h361 const struct sparx5_consts *consts; member
/drivers/net/ethernet/microchip/sparx5/lan969x/
A Dlan969x_fdma.c103 const struct sparx5_consts *consts = sparx5->data->consts; in lan969x_fdma_rx_get_frame() local
115 port = fi.src_port < consts->n_ports ? sparx5->ports[fi.src_port] : in lan969x_fdma_rx_get_frame()
222 for (int idx = 0; idx < sparx5->data->consts->n_ports; ++idx) { in lan969x_fdma_rx_init()
A Dlan969x_calendar.c97 if (portno < sparx5->data->consts->n_ports_all) in lan969x_dsm_calendar_calc()
A Dlan969x.c355 .consts = &lan969x_consts,
/drivers/phy/microchip/
A Dsparx5_serdes.h66 const struct sparx5_serdes_consts consts; member
A Dsparx5_serdes.c1132 for (i = 0; i < priv->data->consts.cmu_max; i++) { in sparx5_serdes_cmu_power_off()
2599 .consts = {
2614 .consts = {
2638 for (idx = 0; idx < priv->data->consts.sd_max; idx++) { in sparx5_serdes_xlate()
2708 for (idx = 0; idx < priv->data->consts.sd_max; idx++) { in sparx5_serdes_probe()
/drivers/crypto/inside-secure/
A Dsafexcel_hash.c2059 __be64 consts[4]; in safexcel_cmac_setkey() local
2074 memset(consts, 0, AES_BLOCK_SIZE); in safexcel_cmac_setkey()
2075 aes_encrypt(ctx->aes, (u8 *)consts, (u8 *)consts); in safexcel_cmac_setkey()
2078 _const[0] = be64_to_cpu(consts[1]); in safexcel_cmac_setkey()
2079 _const[1] = be64_to_cpu(consts[0]); in safexcel_cmac_setkey()
2087 consts[i + 0] = cpu_to_be64(_const[1]); in safexcel_cmac_setkey()
2088 consts[i + 1] = cpu_to_be64(_const[0]); in safexcel_cmac_setkey()
2093 ctx->base.ipad.be[i] = cpu_to_be32(((u32 *)consts)[i]); in safexcel_cmac_setkey()

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