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Searched refs:control (Results 1 – 25 of 851) sorted by relevance

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/drivers/greybus/
A Dcontrol.c276 dev_err(&control->dev, in gb_control_bundle_deactivate()
305 dev_err(&control->dev, in gb_control_bundle_activate()
436 kfree(control); in gb_control_release()
449 control = kzalloc(sizeof(*control), GFP_KERNEL); in gb_control_create()
450 if (!control) in gb_control_create()
453 control->intf = intf; in gb_control_create()
460 kfree(control); in gb_control_create()
474 gb_connection_set_data(control->connection, control); in gb_control_create()
476 return control; in gb_control_create()
497 if (control->protocol_major > 0 || control->protocol_minor > 1) in gb_control_enable()
[all …]
/drivers/gpu/drm/amd/amdgpu/
A Damdgpu_ras_eeprom.c178 if (!control) in __get_eeprom_i2c_addr()
686 a = control->ras_fri + control->ras_num_recs; in amdgpu_ras_eeprom_append_table()
704 control->ras_fri = g1 % control->ras_max_record_count; in amdgpu_ras_eeprom_append_table()
733 control->ras_fri = g1 % control->ras_max_record_count; in amdgpu_ras_eeprom_append_table()
746 control->ras_num_bad_pages = control->ras_num_pa_recs + in amdgpu_ras_eeprom_append_table()
1010 g0 = control->ras_max_record_count - control->ras_fri; in amdgpu_ras_eeprom_read()
1353 control->i2c_address + control->ras_info_offset, in __read_table_ras_info()
1395 control->i2c_address + control->ras_header_offset, in amdgpu_ras_eeprom_init()
1430 if (control->ras_num_recs > control->ras_max_record_count) { in amdgpu_ras_eeprom_init()
1433 control->ras_num_recs, control->ras_max_record_count); in amdgpu_ras_eeprom_init()
[all …]
A Dsmu_v11_0_i2c.c476 smu_v11_0_i2c_abort(control); in smu_v11_0_i2c_activity_done()
510 smu_v11_0_i2c_abort(control); in smu_v11_0_i2c_init()
513 smu_v11_0_i2c_configure(control); in smu_v11_0_i2c_init()
516 smu_v11_0_i2c_set_clock(control); in smu_v11_0_i2c_init()
540 smu_v11_0_i2c_abort(control); in smu_v11_0_i2c_fini()
734 control->owner = THIS_MODULE; in smu_v11_0_i2c_control_init()
738 snprintf(control->name, sizeof(control->name), "AMDGPU SMU 0"); in smu_v11_0_i2c_control_init()
746 res = i2c_add_adapter(control); in smu_v11_0_i2c_control_init()
757 i2c_del_adapter(control); in smu_v11_0_i2c_control_fini()
782 smu_v11_0_i2c_init(control);
[all …]
/drivers/tty/vt/
A Ddefkeymap.map20 control keycode 3 = nul
24 control keycode 4 = Escape
27 control keycode 5 = Control_backslash
36 control keycode 8 = Control_underscore
39 control keycode 9 = Delete
52 control keycode 14 = BackSpace
68 control keycode 26 = Escape
91 control keycode 40 = Control_g
94 control keycode 41 = nul
112 control keycode 52 = Compose
[all …]
/drivers/pinctrl/renesas/
A DKconfig210 bool "pin control support for SH7203" if COMPILE_TEST
214 bool "pin control support for SH7264" if COMPILE_TEST
218 bool "pin control support for SH7269" if COMPILE_TEST
227 bool "pin control support for SH7720" if COMPILE_TEST
231 bool "pin control support for SH7722" if COMPILE_TEST
243 bool "pin control support for SH7734" if COMPILE_TEST
247 bool "pin control support for SH7757" if COMPILE_TEST
259 bool "pin control support for SH-X3" if COMPILE_TEST
263 bool "pin control support for RZ/A1"
274 bool "pin control support for RZ/A2"
[all …]
/drivers/reset/
A Dreset-ti-sci.c68 struct ti_sci_reset_control *control; in ti_sci_reset_set() local
72 control = idr_find(&data->idr, id); in ti_sci_reset_set()
73 if (!control) in ti_sci_reset_set()
76 mutex_lock(&control->lock); in ti_sci_reset_set()
83 reset_state |= control->reset_mask; in ti_sci_reset_set()
89 mutex_unlock(&control->lock); in ti_sci_reset_set()
153 control = idr_find(&data->idr, id); in ti_sci_reset_status()
154 if (!control) in ti_sci_reset_status()
193 control = devm_kzalloc(data->dev, sizeof(*control), GFP_KERNEL); in ti_sci_reset_of_xlate()
194 if (!control) in ti_sci_reset_of_xlate()
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A Dreset-ti-syscon.c70 struct ti_syscon_reset_control *control; in ti_syscon_reset_assert() local
76 control = &data->controls[id]; in ti_syscon_reset_assert()
78 if (control->flags & ASSERT_NONE) in ti_syscon_reset_assert()
81 mask = BIT(control->assert_bit); in ti_syscon_reset_assert()
101 struct ti_syscon_reset_control *control; in ti_syscon_reset_deassert() local
107 control = &data->controls[id]; in ti_syscon_reset_deassert()
109 if (control->flags & DEASSERT_NONE) in ti_syscon_reset_deassert()
112 mask = BIT(control->deassert_bit); in ti_syscon_reset_deassert()
140 control = &data->controls[id]; in ti_syscon_reset_status()
142 if (control->flags & STATUS_NONE) in ti_syscon_reset_status()
[all …]
/drivers/spi/
A Dspi-microchip-core.c130 control &= ~CONTROL_ENABLE; in mchp_corespi_disable()
165 control |= INT_ENABLE_MASK; in mchp_corespi_enable_ints()
179 u32 control; in mchp_corespi_set_xfer_size() local
246 u32 control; in mchp_corespi_set_framesize() local
261 control |= CONTROL_ENABLE; in mchp_corespi_set_framesize()
317 control |= CONTROL_MASTER; in mchp_corespi_init()
319 control |= MOTOROLA_MODE; in mchp_corespi_init()
351 control &= ~CONTROL_RESET; in mchp_corespi_init()
352 control |= CONTROL_ENABLE; in mchp_corespi_init()
359 u32 control; in mchp_corespi_set_clk_gen() local
[all …]
A Dspi-microchip-core-qspi.c150 control |= CONTROL_MODE0; in mchp_coreqspi_set_mode()
163 u32 control, data; in mchp_coreqspi_read_op() local
174 control |= CONTROL_FLAGSX4; in mchp_coreqspi_read_op()
186 control &= ~CONTROL_FLAGSX4; in mchp_coreqspi_read_op()
199 u32 control, data; in mchp_coreqspi_write_op() local
202 control |= CONTROL_FLAGSX4; in mchp_coreqspi_write_op()
214 control &= ~CONTROL_FLAGSX4; in mchp_coreqspi_write_op()
227 u32 control, data; in mchp_coreqspi_write_read_op() local
232 control |= CONTROL_FLAGSX4; in mchp_coreqspi_write_read_op()
287 control &= ~CONTROL_FLAGSX4; in mchp_coreqspi_write_read_op()
[all …]
/drivers/s390/char/
A Ddefkeymap.map135 control keycode 74 = F22
136 control keycode 75 = F23
137 control keycode 76 = F24
142 control keycode 122 = F10
145 control keycode 125 = Linefeed
155 shift control keycode 113 = F1
156 shift control keycode 114 = F2
158 shift control keycode 116 = F4
159 shift control keycode 117 = F5
160 shift control keycode 118 = F6
[all …]
/drivers/staging/iio/frequency/
A Dad9834.c74 unsigned short control; member
182 st->control |= AD9834_PIN_SW; in ad9834_write()
204 st->control &= ~AD9834_RESET; in ad9834_write()
206 st->control |= AD9834_RESET; in ad9834_write()
235 st->control &= ~AD9834_MODE; in ad9834_store_wavetype()
241 st->control |= AD9834_MODE; in ad9834_store_wavetype()
245 st->control |= AD9834_MODE; in ad9834_store_wavetype()
248 st->control &= ~AD9834_MODE; in ad9834_store_wavetype()
258 st->control &= ~AD9834_MODE; in ad9834_store_wavetype()
309 if (st->control & AD9834_MODE) in ad9834_show_out1_wavetype_available()
[all …]
/drivers/pinctrl/mediatek/
A DKconfig51 bool "MediaTek MT7620 pin control"
58 bool "MediaTek MT7621 pin control"
65 bool "MediaTek MT76X8 pin control"
72 bool "Ralink RT2880 pin control"
79 bool "Ralink RT305X pin control"
86 bool "Ralink RT3883 pin control"
94 bool "MediaTek MT2701 pin control"
108 bool "MediaTek MT7629 pin control"
115 bool "MediaTek MT8135 pin control"
122 bool "MediaTek MT8127 pin control"
[all …]
/drivers/staging/vc04_services/bcm2835-camera/
A Dcontrols.c160 control = &dev->component[COMP_CAMERA]->control; in ctrl_set_rational()
178 control = &dev->component[COMP_CAMERA]->control; in ctrl_set_value()
203 control = &dev->component[COMP_CAMERA]->control; in ctrl_set_iso()
222 control = &dev->component[COMP_CAMERA]->control; in ctrl_set_value_ev()
310 control = &dev->component[COMP_CAMERA]->control; in ctrl_set_exposure()
383 control = &dev->component[COMP_CAMERA]->control; in ctrl_set_metering_mode()
400 control = &dev->component[COMP_CAMERA]->control; in ctrl_set_flicker_avoidance()
429 control = &dev->component[COMP_CAMERA]->control; in ctrl_set_awb_mode()
485 control = &dev->component[COMP_CAMERA]->control; in ctrl_set_awb_gains()
534 control = &dev->component[COMP_CAMERA]->control; in ctrl_set_image_effect()
[all …]
/drivers/rtc/
A Drtc-m48t35.c27 u8 control; member
33 u8 control; member
58 u8 control; in m48t35_read_time() local
67 control = readb(&priv->reg->control); in m48t35_read_time()
68 writeb(control | M48T35_RTC_READ, &priv->reg->control); in m48t35_read_time()
75 writeb(control, &priv->reg->control); in m48t35_read_time()
102 u8 control; in m48t35_set_time() local
132 control = readb(&priv->reg->control); in m48t35_set_time()
133 writeb(control | M48T35_RTC_SET, &priv->reg->control); in m48t35_set_time()
140 writeb(control, &priv->reg->control); in m48t35_set_time()
/drivers/pci/
A Dats.c232 u16 control, status; in pci_enable_pri() local
262 control = PCI_PRI_CTRL_ENABLE; in pci_enable_pri()
278 u16 control; in pci_disable_pri() local
292 control &= ~PCI_PRI_CTRL_ENABLE; in pci_disable_pri()
305 u16 control = PCI_PRI_CTRL_ENABLE; in pci_restore_pri_state() local
331 u16 control; in pci_reset_pri() local
343 control = PCI_PRI_CTRL_RESET; in pci_reset_pri()
397 u16 control, supported; in pci_enable_pasid() local
429 control = PCI_PASID_CTRL_ENABLE | features; in pci_enable_pasid()
446 u16 control = 0; in pci_disable_pasid() local
[all …]
/drivers/dma/
A Dep93xx_dma.c381 u32 control; in m2p_hw_setup() local
402 u32 control; in m2p_hw_synchronize() local
467 u32 control; in m2p_hw_interrupt() local
520 u32 control = 0; in m2m_hw_setup() local
539 control |= M2M_CONTROL_DAH; in m2m_hw_setup()
543 control |= M2M_CONTROL_SAH; in m2m_hw_setup()
557 control |= M2M_CONTROL_DAH; in m2m_hw_setup()
561 control |= M2M_CONTROL_SAH; in m2m_hw_setup()
567 control |= M2M_CONTROL_PW_16; in m2m_hw_setup()
631 control |= M2M_CONTROL_ENABLE; in m2m_hw_submit()
[all …]
/drivers/ata/
A Dpata_oldpiix.c70 int control = 0; in oldpiix_set_piomode() local
86 control |= 1; /* TIME */ in oldpiix_set_piomode()
88 control |= 2; /* IE */ in oldpiix_set_piomode()
92 control |= 4; /* PPE */ in oldpiix_set_piomode()
102 idetm_data |= control; in oldpiix_set_piomode()
105 idetm_data |= (control << 4); in oldpiix_set_piomode()
146 unsigned int control; in oldpiix_set_dmamode() local
154 control = 3; /* IORDY|TIME0 */ in oldpiix_set_dmamode()
157 control |= 4; /* PPE enable */ in oldpiix_set_dmamode()
170 idetm_data |= control; in oldpiix_set_dmamode()
[all …]
/drivers/platform/x86/intel/pmt/
A Dcrashlog.c107 const struct crashlog_control control; member
130 const struct crashlog_control *control = &crashlog->info->control; in pmt_crashlog_rmw() local
134 reg &= ~control->trigger_mask; in pmt_crashlog_rmw()
464 .control.clear = TYPE1_VER0_CLEAR,
465 .control.disable = TYPE1_VER0_DISABLE,
466 .control.manual = TYPE1_VER0_EXECUTE,
483 .control.clear = TYPE1_VER2_CLEAR,
484 .control.consume = TYPE1_VER2_CONSUME,
485 .control.disable = TYPE1_VER2_DISABLE,
486 .control.manual = TYPE1_VER2_EXECUTE,
[all …]
/drivers/leds/
A Dleds-sun50i-a100.c120 u32 control; in sun50i_a100_ledc_pio_xfer() local
148 u32 control; in sun50i_a100_ledc_start_xfer() local
163 writel(control, priv->base + LEDC_DMA_CTRL_REG); in sun50i_a100_ledc_start_xfer()
165 control = readl(priv->base + LEDC_CTRL_REG); in sun50i_a100_ledc_start_xfer()
166 control &= ~LEDC_CTRL_REG_DATA_LENGTH; in sun50i_a100_ledc_start_xfer()
168 writel(control, priv->base + LEDC_CTRL_REG); in sun50i_a100_ledc_start_xfer()
269 u32 control; in sun50i_a100_ledc_set_format() local
271 control = readl(priv->base + LEDC_CTRL_REG); in sun50i_a100_ledc_set_format()
272 control &= ~LEDC_CTRL_REG_RGB_MODE; in sun50i_a100_ledc_set_format()
274 writel(control, priv->base + LEDC_CTRL_REG); in sun50i_a100_ledc_set_format()
[all …]
/drivers/thermal/
A Ddove_thermal.c39 void __iomem *control; member
48 reg = readl_relaxed(priv->control); in dove_init_sensor()
61 writel(reg, priv->control); in dove_init_sensor()
64 reg = readl_relaxed(priv->control); in dove_init_sensor()
65 writel((reg | PMU_TDC0_SW_RST_MASK), priv->control); in dove_init_sensor()
66 writel(reg, priv->control); in dove_init_sensor()
93 reg = readl_relaxed(priv->control + PMU_TEMP_DIOD_CTRL1_REG); in dove_get_temp()
132 priv->control = devm_platform_get_and_ioremap_resource(pdev, 1, NULL); in dove_thermal_probe()
133 if (IS_ERR(priv->control)) in dove_thermal_probe()
134 return PTR_ERR(priv->control); in dove_thermal_probe()
/drivers/staging/greybus/
A Daudio_topology.c60 return control->name; in gbaudio_map_controlid()
69 return control->name; in gbaudio_map_controlid()
85 return control->id; in gbaudio_map_controlname()
100 return control->id; in gbaudio_map_wcontrolname()
1054 if (!control) { in gbaudio_tplg_create_widget()
1058 control->id = curr->id; in gbaudio_tplg_create_widget()
1072 if (!control->texts) { in gbaudio_tplg_create_widget()
1165 if (!control) { in gbaudio_tplg_process_kcontrols()
1169 control->id = curr->id; in gbaudio_tplg_process_kcontrols()
1296 dapm_routes->control = in gbaudio_tplg_process_routes()
[all …]
/drivers/net/wireless/ti/wl1251/
A Dtx.c72 *(u16 *)&tx_hdr->control = 0; in wl1251_tx_control()
74 tx_hdr->control.rate_policy = 0; in wl1251_tx_control()
77 tx_hdr->control.packet_type = 0; in wl1251_tx_control()
82 tx_hdr->control.rate_policy = 1; in wl1251_tx_control()
83 tx_hdr->control.ack_policy = 1; in wl1251_tx_control()
86 tx_hdr->control.tx_complete = 1; in wl1251_tx_control()
91 tx_hdr->control.qos = 1; in wl1251_tx_control()
179 if (control->control.hw_key && in wl1251_tx_send_packet()
180 control->control.hw_key->cipher == WLAN_CIPHER_SUITE_TKIP) { in wl1251_tx_send_packet()
297 if (info->control.hw_key) { in wl1251_tx_frame()
[all …]
/drivers/platform/x86/intel/uncore-frequency/
A Duncore-frequency-tpmi.c92 u64 control; in read_control_freq() local
195 u64 control; in write_eff_lat_ctrl() local
237 control &= ~UNCORE_EFF_LAT_CTRL_LOW_THRESHOLD_MASK; in write_eff_lat_ctrl()
244 control &= ~UNCORE_EFF_LAT_CTRL_HIGH_THRESHOLD_MASK; in write_eff_lat_ctrl()
249 control &= ~UNCORE_EFF_LAT_CTRL_HIGH_THRESHOLD_ENABLE; in write_eff_lat_ctrl()
254 control &= ~UNCORE_EFF_LAT_CTRL_RATIO_MASK; in write_eff_lat_ctrl()
271 u64 control; in write_control_freq() local
276 control &= ~UNCORE_MAX_RATIO_MASK; in write_control_freq()
277 control |= FIELD_PREP(UNCORE_MAX_RATIO_MASK, input); in write_control_freq()
279 control &= ~UNCORE_MIN_RATIO_MASK; in write_control_freq()
[all …]
/drivers/net/phy/
A Ddp83848.c63 int control, ret; in dp83848_config_intr() local
65 control = phy_read(phydev, DP83848_MICR); in dp83848_config_intr()
66 if (control < 0) in dp83848_config_intr()
67 return control; in dp83848_config_intr()
74 control |= DP83848_MICR_INT_OE; in dp83848_config_intr()
75 control |= DP83848_MICR_INTEN; in dp83848_config_intr()
81 ret = phy_write(phydev, DP83848_MICR, control); in dp83848_config_intr()
83 control &= ~DP83848_MICR_INTEN; in dp83848_config_intr()
84 ret = phy_write(phydev, DP83848_MICR, control); in dp83848_config_intr()
/drivers/usb/serial/
A Doti6858.c115 && ((a)->control == (priv)->pending_setup.control) \
183 u8 control; member
229 new_setup->control = priv->pending_setup.control; in setup_line()
412 control = priv->pending_setup.control; in oti6858_set_termios()
490 || control != priv->pending_setup.control in oti6858_set_termios()
493 priv->pending_setup.control = control; in oti6858_set_termios()
535 priv->pending_setup.control = buf->control; in oti6858_open()
584 u8 control; in oti6858_tiocmset() local
591 control = priv->pending_setup.control; in oti6858_tiocmset()
601 if (control != priv->pending_setup.control) in oti6858_tiocmset()
[all …]

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