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Searched refs:control_reg (Results 1 – 18 of 18) sorted by relevance

/drivers/scsi/pcmcia/
A Dnsp_message.c15 unsigned char data_reg, control_reg; in nsp_message_in() local
33 control_reg = nsp_index_read(base, SCSIBUSCTRL); in nsp_message_in()
34 control_reg |= SCSI_ACK; in nsp_message_in()
35 nsp_index_write(base, SCSIBUSCTRL, control_reg); in nsp_message_in()
41 control_reg = nsp_index_read(base, SCSIBUSCTRL); in nsp_message_in()
42 control_reg &= ~SCSI_ACK; in nsp_message_in()
43 nsp_index_write(base, SCSIBUSCTRL, control_reg); in nsp_message_in()
/drivers/clk/
A Dclk-palmas.c26 unsigned int control_reg; member
58 cinfo->clk_desc->control_reg, in palmas_clks_prepare()
63 cinfo->clk_desc->control_reg, ret); in palmas_clks_prepare()
83 cinfo->clk_desc->control_reg, in palmas_clks_unprepare()
87 cinfo->clk_desc->control_reg, ret); in palmas_clks_unprepare()
100 cinfo->clk_desc->control_reg, &val); in palmas_clks_is_prepared()
103 cinfo->clk_desc->control_reg, ret); in palmas_clks_is_prepared()
129 .control_reg = PALMAS_CLK32KG_CTRL,
145 .control_reg = PALMAS_CLK32KGAUDIO_CTRL,
202 cinfo->clk_desc->control_reg, in palmas_clks_init_configure()
[all …]
/drivers/clk/ti/
A Dapll.c55 v = ti_clk_ll_ops->clk_readl(&ad->control_reg); in dra7_apll_enable()
58 ti_clk_ll_ops->clk_writel(v, &ad->control_reg); in dra7_apll_enable()
94 v = ti_clk_ll_ops->clk_readl(&ad->control_reg); in dra7_apll_disable()
97 ti_clk_ll_ops->clk_writel(v, &ad->control_reg); in dra7_apll_disable()
108 v = ti_clk_ll_ops->clk_readl(&ad->control_reg); in dra7_apll_is_enabled()
241 v = ti_clk_ll_ops->clk_readl(&ad->control_reg); in omap2_apll_is_enabled()
267 v = ti_clk_ll_ops->clk_readl(&ad->control_reg); in omap2_apll_enable()
270 ti_clk_ll_ops->clk_writel(v, &ad->control_reg); in omap2_apll_enable()
297 v = ti_clk_ll_ops->clk_readl(&ad->control_reg); in omap2_apll_disable()
300 ti_clk_ll_ops->clk_writel(v, &ad->control_reg); in omap2_apll_disable()
[all …]
A Ddpll3xxx.c54 v = ti_clk_ll_ops->clk_readl(&dd->control_reg); in _omap3_dpll_write_clken()
57 ti_clk_ll_ops->clk_writel(v, &dd->control_reg); in _omap3_dpll_write_clken()
308 ctrl = ti_clk_ll_ops->clk_readl(&dd->control_reg); in omap3_noncore_dpll_ssc_program()
373 ti_clk_ll_ops->clk_writel(ctrl, &dd->control_reg); in omap3_noncore_dpll_ssc_program()
399 v = ti_clk_ll_ops->clk_readl(&dd->control_reg); in omap3_noncore_dpll_program()
402 ti_clk_ll_ops->clk_writel(v, &dd->control_reg); in omap3_noncore_dpll_program()
456 v = ti_clk_ll_ops->clk_readl(&dd->control_reg); in omap3_noncore_dpll_program()
472 ti_clk_ll_ops->clk_writel(v, &dd->control_reg); in omap3_noncore_dpll_program()
884 v = ti_clk_ll_ops->clk_readl(&dd->control_reg); in omap3_core_dpll_save_context()
945 v = ti_clk_ll_ops->clk_readl(&dd->control_reg); in omap3_noncore_dpll_save_context()
[all …]
A Dclkt_dpll.c213 v = ti_clk_ll_ops->clk_readl(&dd->control_reg); in omap2_init_dpll_parent()
249 v = ti_clk_ll_ops->clk_readl(&dd->control_reg); in omap2_get_dpll_rate()
A Ddpll44xx.c129 v = ti_clk_ll_ops->clk_readl(&dd->control_reg); in omap4_dpll_regm4xen_recalc()
A Ddpll.c316 if (ti_clk_get_reg_addr(node, 0, &dd->control_reg)) in of_ti_dpll_setup()
/drivers/watchdog/
A Dts72xx_wdt.c44 void __iomem *control_reg; member
55 writeb(priv->regval, priv->control_reg); in ts72xx_wdt_start()
65 writeb(TS72XX_WDT_CTRL_DISABLE, priv->control_reg); in ts72xx_wdt_stop()
133 priv->control_reg = devm_platform_ioremap_resource(pdev, 0); in ts72xx_wdt_probe()
134 if (IS_ERR(priv->control_reg)) in ts72xx_wdt_probe()
135 return PTR_ERR(priv->control_reg); in ts72xx_wdt_probe()
/drivers/tty/serial/
A Dpmac_zilog.h54 volatile u8 __iomem *control_reg; member
78 writeb(reg, port->control_reg); in read_zsreg()
79 return readb(port->control_reg); in read_zsreg()
85 writeb(reg, port->control_reg); in write_zsreg()
86 writeb(value, port->control_reg); in write_zsreg()
101 (void)readb(port->control_reg); in zssync()
A Dpmac_zilog.c1365 uap->control_reg = uap->port.membase; in pmz_init_port()
1366 uap->data_reg = uap->control_reg + 0x10; in pmz_init_port()
1451 iounmap(uap->control_reg); in pmz_dispose_port()
1642 uap->control_reg = uap->port.membase; in pmz_init_port()
1643 uap->data_reg = uap->control_reg + 4; in pmz_init_port()
/drivers/power/supply/
A Dds2780_battery.c357 u8 *control_reg) in ds2780_get_control_register() argument
363 u8 control_reg) in ds2780_set_control_register() argument
367 ret = ds2780_write(dev_info, &control_reg, in ds2780_set_control_register()
448 u8 control_reg; in ds2780_get_pmod_enabled() local
453 ret = ds2780_get_control_register(dev_info, &control_reg); in ds2780_get_pmod_enabled()
458 !!(control_reg & DS2780_CONTROL_REG_PMOD)); in ds2780_get_pmod_enabled()
467 u8 control_reg, new_setting; in ds2780_set_pmod_enabled() local
472 ret = ds2780_get_control_register(dev_info, &control_reg); in ds2780_set_pmod_enabled()
486 control_reg |= DS2780_CONTROL_REG_PMOD; in ds2780_set_pmod_enabled()
488 control_reg &= ~DS2780_CONTROL_REG_PMOD; in ds2780_set_pmod_enabled()
[all …]
A Dds2781_battery.c359 u8 *control_reg) in ds2781_get_control_register() argument
365 u8 control_reg) in ds2781_set_control_register() argument
369 ret = ds2781_write(dev_info, &control_reg, in ds2781_set_control_register()
450 u8 control_reg; in ds2781_get_pmod_enabled() local
455 ret = ds2781_get_control_register(dev_info, &control_reg); in ds2781_get_pmod_enabled()
460 !!(control_reg & DS2781_CONTROL_PMOD)); in ds2781_get_pmod_enabled()
469 u8 control_reg, new_setting; in ds2781_set_pmod_enabled() local
474 ret = ds2781_get_control_register(dev_info, &control_reg); in ds2781_set_pmod_enabled()
488 control_reg |= DS2781_CONTROL_PMOD; in ds2781_set_pmod_enabled()
490 control_reg &= ~DS2781_CONTROL_PMOD; in ds2781_set_pmod_enabled()
[all …]
/drivers/regulator/
A Das3722-regulator.c55 u32 control_reg; member
85 .control_reg = AS3722_SD0_CONTROL_REG,
97 .control_reg = AS3722_SD1_CONTROL_REG,
110 .control_reg = AS3722_SD23_CONTROL_REG,
124 .control_reg = AS3722_SD23_CONTROL_REG,
138 .control_reg = AS3722_SD4_CONTROL_REG,
152 .control_reg = AS3722_SD5_CONTROL_REG,
165 .control_reg = AS3722_SD6_CONTROL_REG,
427 if (!as3722_reg_lookup[id].control_reg) in as3722_sd_get_mode()
433 as3722_reg_lookup[id].control_reg, ret); in as3722_sd_get_mode()
[all …]
A Danatop-regulator.c166 u32 control_reg; in anatop_regulator_probe() local
203 ret = of_property_read_u32(np, "anatop-reg-offset", &control_reg); in anatop_regulator_probe()
247 rdesc->vsel_reg = control_reg; in anatop_regulator_probe()
258 if (control_reg && sreg->delay_bit_width) { in anatop_regulator_probe()
300 rdesc->enable_reg = control_reg; in anatop_regulator_probe()
A Dti-abb-regulator.c96 void __iomem *control_reg; member
261 ti_abb_rmw(regs->opp_sel_mask, info->opp_sel, abb->control_reg); in ti_abb_set_opp()
272 ti_abb_rmw(regs->opp_change_mask, 1, abb->control_reg); in ti_abb_set_opp()
717 abb->control_reg = abb->base + abb->regs->control_off; in ti_abb_probe()
720 abb->control_reg = devm_platform_ioremap_resource_byname(pdev, "control-address"); in ti_abb_probe()
721 if (IS_ERR(abb->control_reg)) in ti_abb_probe()
722 return PTR_ERR(abb->control_reg); in ti_abb_probe()
/drivers/i2c/busses/
A Di2c-mt65xx.c554 u16 control_reg; in mtk_i2c_init_hw() local
632 control_reg = I2C_CONTROL_ACKERR_DET_EN | in mtk_i2c_init_hw()
635 control_reg |= I2C_CONTROL_DMAACK_EN | I2C_CONTROL_ASYNC_MODE; in mtk_i2c_init_hw()
637 mtk_i2c_writew(i2c, control_reg, OFFSET_CONTROL); in mtk_i2c_init_hw()
1002 u16 control_reg; in mtk_i2c_do_transfer() local
1042 control_reg = mtk_i2c_readw(i2c, OFFSET_CONTROL) & in mtk_i2c_do_transfer()
1045 control_reg |= I2C_CONTROL_RS; in mtk_i2c_do_transfer()
1048 control_reg |= I2C_CONTROL_DIR_CHANGE | I2C_CONTROL_RS; in mtk_i2c_do_transfer()
1050 mtk_i2c_writew(i2c, control_reg, OFFSET_CONTROL); in mtk_i2c_do_transfer()
/drivers/net/ethernet/ti/
A Dcpsw.c686 u32 control_reg; in cpsw_init_host_port() local
696 control_reg = readl(&cpsw->regs->control); in cpsw_init_host_port()
697 control_reg |= CPSW_VLAN_AWARE | CPSW_RX_VLAN_ENCAP; in cpsw_init_host_port()
698 writel(control_reg, &cpsw->regs->control); in cpsw_init_host_port()
A Dcpsw_new.c555 u32 control_reg; in cpsw_init_host_port() local
564 control_reg = readl(&cpsw->regs->control); in cpsw_init_host_port()
565 control_reg |= CPSW_VLAN_AWARE | CPSW_RX_VLAN_ENCAP; in cpsw_init_host_port()
566 writel(control_reg, &cpsw->regs->control); in cpsw_init_host_port()

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