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Searched refs:controller (Results 1 – 25 of 746) sorted by relevance

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/drivers/spi/
A Dspi-qup.c181 return controller->n_words * controller->w_size; in spi_qup_len()
291 remainder = DIV_ROUND_UP(spi_qup_len(controller) - controller->rx_bytes, in spi_qup_read()
614 controller->tx_bytes, controller->w_size); in spi_qup_data_pending()
617 controller->rx_bytes, controller->w_size); in spi_qup_data_pending()
709 controller->n_words = xfer->len / controller->w_size; in spi_qup_io_prep()
711 if (controller->n_words <= (controller->in_fifo_sz / sizeof(u32))) in spi_qup_io_prep()
1010 controller = spi_controller_get_devdata(spi->controller); in spi_qup_set_cs()
1152 controller->out_fifo_sz = controller->out_blk_sz * (2 << size); in spi_qup_probe()
1155 controller->in_fifo_sz = controller->in_blk_sz * (2 << size); in spi_qup_probe()
1158 controller->in_blk_sz, controller->in_fifo_sz, in spi_qup_probe()
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A Dspi-fsl-lpspi.c199 if (!controller->dma_rx) in fsl_lpspi_can_dma()
672 if (controller->dma_rx) { in fsl_lpspi_dma_exit()
674 controller->dma_rx = NULL; in fsl_lpspi_dma_exit()
677 if (controller->dma_tx) { in fsl_lpspi_dma_exit()
679 controller->dma_tx = NULL; in fsl_lpspi_dma_exit()
694 controller->dma_tx = NULL; in fsl_lpspi_dma_init()
703 controller->dma_rx = NULL; in fsl_lpspi_dma_init()
714 fsl_lpspi_dma_exit(controller); in fsl_lpspi_dma_init()
873 if (!controller) in fsl_lpspi_probe()
948 controller->bus_num = pdev->id; in fsl_lpspi_probe()
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A Dspi-pxa2xx-dma.c98 chan = drv_data->controller->dma_tx; in pxa2xx_spi_dma_prepare_one()
105 chan = drv_data->controller->dma_rx; in pxa2xx_spi_dma_prepare_one()
188 struct spi_controller *controller = drv_data->controller; in pxa2xx_spi_dma_setup() local
197 if (!controller->dma_tx) in pxa2xx_spi_dma_setup()
202 if (!controller->dma_rx) { in pxa2xx_spi_dma_setup()
204 controller->dma_tx = NULL; in pxa2xx_spi_dma_setup()
213 struct spi_controller *controller = drv_data->controller; in pxa2xx_spi_dma_release() local
215 if (controller->dma_rx) { in pxa2xx_spi_dma_release()
218 controller->dma_rx = NULL; in pxa2xx_spi_dma_release()
220 if (controller->dma_tx) { in pxa2xx_spi_dma_release()
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A Dspi-loongson-core.c198 struct spi_controller *controller; in loongson_spi_init_controller() local
203 if (controller == NULL) in loongson_spi_init_controller()
212 controller->num_chipselect = 4; in loongson_spi_init_controller()
214 dev_set_drvdata(dev, controller); in loongson_spi_init_controller()
218 spi->controller = controller; in loongson_spi_init_controller()
236 struct spi_controller *controller; in loongson_spi_suspend() local
238 controller = dev_get_drvdata(dev); in loongson_spi_suspend()
239 spi_controller_suspend(controller); in loongson_spi_suspend()
256 struct spi_controller *controller; in loongson_spi_resume() local
258 controller = dev_get_drvdata(dev); in loongson_spi_resume()
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A Dspi-ljca.c71 struct spi_controller *controller; member
222 struct spi_controller *controller; in ljca_spi_probe() local
227 if (!controller) in ljca_spi_probe()
233 ljca_spi->controller = controller; in ljca_spi_probe()
235 controller->bus_num = -1; in ljca_spi_probe()
238 controller->auto_runtime_pm = false; in ljca_spi_probe()
242 auxiliary_set_drvdata(auxdev, controller); in ljca_spi_probe()
244 ret = spi_register_controller(controller); in ljca_spi_probe()
256 spi_unregister_controller(controller); in ljca_spi_dev_remove()
264 return spi_controller_suspend(controller); in ljca_spi_dev_suspend()
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A DKconfig103 tristate "Amlogic SPISG controller"
198 tristate "BCM2835 SPI controller"
276 tristate "Cadence SPI controller"
490 tristate "IMG SPFI controller"
645 tristate "Freescale SPI controller and Aeroflex Gaisler GRLIB SPI controller"
951 tristate "QTI QSPI controller"
957 tristate "QPIC SNAND controller"
1011 tristate "SuperH SPI controller"
1030 tristate "SiFive SPI controller"
1168 controller is different from the SPI controller and is available
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A Dspi-pxa2xx.c578 if (drv_data->controller->cur_msg) { in reset_sccr1()
1016 controller->max_speed_hz in pxa2xx_spi_transfer_one()
1021 controller->max_speed_hz / 2 in pxa2xx_spi_transfer_one()
1275 struct spi_controller *controller; in pxa2xx_spi_probe() local
1285 if (!controller) in pxa2xx_spi_probe()
1289 drv_data->controller = controller; in pxa2xx_spi_probe()
1300 controller->cleanup = cleanup; in pxa2xx_spi_probe()
1301 controller->setup = setup; in pxa2xx_spi_probe()
1350 controller->max_transfer_size = in pxa2xx_spi_probe()
1368 controller->min_speed_hz = in pxa2xx_spi_probe()
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A Dspi-imx.c246 if (!controller->dma_rx) in spi_imx_can_dma()
1376 struct spi_controller *controller = spi_imx->controller; in spi_imx_sdma_exit() local
1378 if (controller->dma_rx) { in spi_imx_sdma_exit()
1380 controller->dma_rx = NULL; in spi_imx_sdma_exit()
1383 if (controller->dma_tx) { in spi_imx_sdma_exit()
1385 controller->dma_tx = NULL; in spi_imx_sdma_exit()
1401 controller->dma_tx = NULL; in spi_imx_sdma_init()
1410 controller->dma_rx = NULL; in spi_imx_sdma_init()
1461 struct spi_controller *controller = spi_imx->controller; in spi_imx_dma_transfer() local
1796 if (!controller) in spi_imx_probe()
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/drivers/usb/musb/
A Dmusb_cppi41.c195 musb = controller->controller.musb; in cppi41_recheck_tx_req()
234 controller = cppi41_channel->controller; in cppi41_dma_callback()
235 if (controller->controller.dma_callback) in cppi41_dma_callback()
236 controller->controller.dma_callback(&controller->controller); in cppi41_dma_callback()
343 struct musb *musb = controller->controller.musb; in cppi41_set_dma_mode()
370 struct musb *musb = controller->controller.musb; in da8xx_set_dma_mode()
559 struct musb *musb = controller->controller.musb; in cppi41_is_compatible()
577 struct musb *musb = controller->controller.musb; in cppi41_dma_channel_abort()
709 cppi41_channel->controller = controller; in cppi41_dma_controller_start()
772 controller->controller.musb = musb; in cppi41_dma_controller_create()
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A Dmusbhsdma.c111 musb_channel->controller = controller; in dma_channel_allocate()
148 struct musb_dma_controller *controller = musb_channel->controller; in configure_channel() local
398 controller = kzalloc(sizeof(*controller), GFP_KERNEL); in dma_controller_alloc()
406 controller->controller.channel_alloc = dma_channel_allocate; in dma_controller_alloc()
407 controller->controller.channel_release = dma_channel_release; in dma_controller_alloc()
408 controller->controller.channel_program = dma_channel_program; in dma_controller_alloc()
409 controller->controller.channel_abort = dma_channel_abort; in dma_controller_alloc()
431 dev_name(musb->controller), controller)) { in musbhs_dma_controller_create()
433 musb_dma_controller_destroy(&controller->controller); in musbhs_dma_controller_create()
440 return &controller->controller; in musbhs_dma_controller_create()
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A Dux500_dma.c210 struct ux500_dma_controller *controller = ux500_channel->controller; in ux500_dma_channel_abort() local
303 ux500_channel->controller = controller; in ux500_dma_controller_start()
353 kfree(controller); in ux500_dma_controller_destroy()
365 controller = kzalloc(sizeof(*controller), GFP_KERNEL); in ux500_dma_controller_create()
366 if (!controller) in ux500_dma_controller_create()
380 controller->controller.channel_alloc = ux500_dma_channel_allocate; in ux500_dma_controller_create()
381 controller->controller.channel_release = ux500_dma_channel_release; in ux500_dma_controller_create()
382 controller->controller.channel_program = ux500_dma_channel_program; in ux500_dma_controller_create()
383 controller->controller.channel_abort = ux500_dma_channel_abort; in ux500_dma_controller_create()
384 controller->controller.is_compatible = ux500_dma_is_compatible; in ux500_dma_controller_create()
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/drivers/peci/
A Dcore.c25 kfree(controller); in peci_controller_dev_release()
55 controller = kzalloc(sizeof(*controller), GFP_KERNEL); in peci_controller_alloc()
56 if (!controller) in peci_controller_alloc()
62 controller->id = ret; in peci_controller_alloc()
64 controller->ops = ops; in peci_controller_alloc()
74 return controller; in peci_controller_alloc()
77 kfree(controller); in peci_controller_alloc()
122 if (IS_ERR(controller)) in devm_peci_controller_add()
123 return controller; in devm_peci_controller_add()
125 ret = dev_set_name(&controller->dev, "peci-%d", controller->id); in devm_peci_controller_add()
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/drivers/gpio/
A Dgpio-zevio.c83 spin_lock(&controller->lock); in zevio_gpio_get()
89 spin_unlock(&controller->lock); in zevio_gpio_get()
99 spin_lock(&controller->lock); in zevio_gpio_set()
117 spin_lock(&controller->lock); in zevio_gpio_direction_input()
134 spin_lock(&controller->lock); in zevio_gpio_direction_output()
176 struct zevio_gpio *controller; in zevio_gpio_probe() local
179 controller = devm_kzalloc(&pdev->dev, sizeof(*controller), GFP_KERNEL); in zevio_gpio_probe()
180 if (!controller) in zevio_gpio_probe()
188 if (!controller->chip.label) in zevio_gpio_probe()
192 if (IS_ERR(controller->regs)) in zevio_gpio_probe()
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/drivers/pci/hotplug/
A Dpciehp.h91 struct controller { struct
168 int pciehp_configure_device(struct controller *ctrl);
171 struct controller *pcie_init(struct pcie_device *dev);
172 int pcie_init_notification(struct controller *ctrl);
175 void pcie_enable_interrupt(struct controller *ctrl);
176 void pcie_disable_interrupt(struct controller *ctrl);
177 int pciehp_power_on_slot(struct controller *ctrl);
178 void pciehp_power_off_slot(struct controller *ctrl);
186 int pciehp_card_present(struct controller *ctrl);
190 bool pciehp_device_replaced(struct controller *ctrl);
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A Dcpqphp.h261 struct controller *ctrl;
277 struct controller { struct
278 struct controller *next; argument
395 void cpqhp_create_debugfs_files(struct controller *ctrl);
396 void cpqhp_remove_debugfs_files(struct controller *ctrl);
401 int cpqhp_find_available_resources(struct controller *ctrl,
435 extern struct controller *cpqhp_ctrl_list;
470 static inline void set_SOGO(struct controller *ctrl) in set_SOGO()
571 static inline u8 read_slot_enable(struct controller *ctrl) in read_slot_enable()
584 static inline u8 get_controller_speed(struct controller *ctrl) in get_controller_speed()
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/drivers/net/ethernet/mellanox/mlx5/core/sf/diag/
A Dsf_tracepoint.h17 u32 controller,
29 __entry->controller = controller;
41 u32 controller,
51 __entry->controller = controller;
61 u32 controller,
71 __entry->controller = controller;
109 u32 controller,
118 __entry->controller = controller;
129 u32 controller,
145 u32 controller,
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/drivers/pci/controller/dwc/
A DKconfig29 bool "Amazon Annapurna Labs PCIe controller"
36 controller IP on Amazon SoCs. The PCIe controller uses the DesignWare
42 bool "AMD MDB Versal2 PCIe controller"
53 tristate "Amlogic Meson PCIe controller"
87 tristate "Baikal-T1 PCIe controller"
133 controller works in RC mode.
145 controller works in RC mode.
168 bool "HiSilicon STB PCIe controller"
176 bool "Intel Gateway PCIe controller "
215 bool "Marvell Armada-8K PCIe controller"
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/drivers/pci/controller/
A DKconfig3 menu "PCI controller drivers"
11 tristate "Aardvark PCIe controller"
23 tristate "Altera PCIe controller"
44 tristate "Apple PCIe controller"
108 PCIe controller
148 bool "Intel IXP4xx PCI controller"
173 bool "LOONGSON PCIe controller"
190 Add support for Marvell EBU PCIe controller. This PCIe controller
304 bool "X-Gene PCIe controller"
323 bool "Xilinx AXI PCIe controller"
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/drivers/mtd/nand/raw/
A DKconfig24 Denali NAND controller core.
32 controller as a DT device.
175 by the SLC NAND controller.
183 controller. This is the default for the WORK92105 controller
187 by the MLC NAND controller.
289 tristate "TXx9 NAND controller"
333 tristate "QCOM NAND controller"
338 controller. This controller is found on IPQ806x SoC.
341 tristate "MTK NAND controller"
372 NAND controller. This controller is found on STM32MP SoCs.
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A Dcs553x_nand.c276 controller = kzalloc(sizeof(*controller), GFP_KERNEL); in cs553x_init_one()
277 if (!controller) { in cs553x_init_one()
282 this = &controller->chip; in cs553x_init_one()
285 this->controller = &controller->base; in cs553x_init_one()
292 controller->mmio = ioremap(adr, 4096); in cs553x_init_one()
293 if (!controller->mmio) { in cs553x_init_one()
313 controllers[cs] = controller; in cs553x_init_one()
319 iounmap(controller->mmio); in cs553x_init_one()
321 kfree(controller); in cs553x_init_one()
410 iounmap(controller->mmio); in cs553x_cleanup()
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/drivers/mtd/nand/raw/brcmnand/
A DKconfig2 tristate "Broadcom STB NAND controller"
6 Enables the Broadcom NAND controller driver. The controller was
13 tristate "Broadcom BCM63xx NAND controller glue"
16 Enables the BRCMNAND glue driver to register the NAND controller
20 tristate "Broadcom BCMA NAND controller"
29 tristate "Broadcom BCMBCA NAND controller glue"
32 Enables the BRCMNAND glue driver to register the NAND controller
36 tristate "Broadcom STB Nand controller glue"
39 Enables the BRCMNAND glue driver to register the NAND controller
43 tristate "Broadcom iProc NAND controller glue"
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/drivers/usb/host/
A Dohci-dbg.c107 ohci_dbg_sw (controller, next, size, in ohci_dump_status()
111 rh_state_string(controller)); in ohci_dump_status()
114 ohci_dbg_sw (controller, next, size, in ohci_dump_status()
129 ohci_dbg_sw (controller, next, size, in ohci_dump_status()
192 struct ohci_hcd *controller, in ohci_dump_roothub() argument
199 temp = roothub_a (controller); in ohci_dump_roothub()
214 temp = roothub_b (controller); in ohci_dump_roothub()
246 if (controller->hcca) in ohci_dump()
247 ohci_dbg (controller, in ohci_dump()
605 hcd->self.controller->bus->name, in fill_registers_buffer()
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/drivers/clk/samsung/
A DKconfig4 bool "Samsung Exynos clock controller support" if COMPILE_TEST
18 bool "Samsung S3C64xx clock controller support" if COMPILE_TEST
25 bool "Samsung S5Pv210 clock controller support" if COMPILE_TEST
35 Support for the clock controller present on the Samsung
42 Support for the clock controller present on the Samsung
50 Support for the clock controller present on the Samsung
57 Support for the clock controller present on the Samsung
64 Support for the clock controller present on the Samsung
71 Support for the clock controller present on the Samsung
80 tristate "Samsung Exynos AUDSS clock controller support"
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/drivers/clk/qcom/
A DKconfig552 tristate "QCS615 Graphics clock controller"
657 tristate "SA8775P Graphics clock controller"
675 tristate "SAR2130P Graphics clock controller"
757 controller to reset the LPASS subsystem.
766 controller to reset the LPASS subsystem.
776 core clock controller.
785 controller on SC7280 devices.
787 core clock controller.
856 controller to reset the Q6SSTOP subsystem.
873 clock controller functionality such as Ethernet.
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/drivers/clk/rockchip/
A DKconfig5 bool "Rockchip clock controller common support"
13 bool "Rockchip PX30 clock controller support"
20 bool "Rockchip RV110x clock controller support"
27 bool "Rockchip RV1126 clock controller support"
34 bool "Rockchip RK3036 clock controller support"
41 bool "Rockchip RK312x clock controller support"
48 bool "Rockchip RK3188 clock controller support"
55 bool "Rockchip RK322x clock controller support"
62 bool "Rockchip RK3288 clock controller support"
69 bool "Rockchip RK3308 clock controller support"
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