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Searched refs:crcs (Results 1 – 9 of 9) sorted by relevance

/drivers/soc/samsung/
A Ds3c-pm-check.c37 static u32 *crcs; /* allocated over suspend/resume */ variable
99 crcs = kmalloc(crc_size+4, GFP_KERNEL); in s3c_pm_check_prepare()
100 if (crcs == NULL) in s3c_pm_check_prepare()
130 if (crcs != NULL) in s3c_pm_check_store()
131 s3c_pm_run_sysram(s3c_pm_makecheck, crcs); in s3c_pm_check_store()
185 if (in_region(ptr, left, crcs, crc_size)) { in s3c_pm_runcheck()
216 if (crcs != NULL) in s3c_pm_check_restore()
217 s3c_pm_run_sysram(s3c_pm_runcheck, crcs); in s3c_pm_check_restore()
230 kfree(crcs); in s3c_pm_check_cleanup()
231 crcs = NULL; in s3c_pm_check_cleanup()
/drivers/gpu/drm/
A Ddrm_debugfs_crc.c336 sprintf(buf + 10 + i * 11, " 0x%08x", entry->crcs[i]); in crtc_crc_read()
395 uint32_t frame, uint32_t *crcs) in drm_crtc_add_crc_entry() argument
428 memcpy(&entry->crcs, crcs, sizeof(*crcs) * crc->values_cnt); in drm_crtc_add_crc_entry()
/drivers/gpu/drm/i915/display/
A Dintel_display_trace.h152 TP_PROTO(struct intel_crtc *crtc, const u32 *crcs),
153 TP_ARGS(crtc, crcs),
160 __array(u32, crcs, 5)
168 memcpy(__entry->crcs, crcs, sizeof(__entry->crcs));
174 __entry->crcs[0], __entry->crcs[1],
175 __entry->crcs[2], __entry->crcs[3],
176 __entry->crcs[4])
A Dintel_display_irq.c409 u32 crcs[5] = { crc0, crc1, crc2, crc3, crc4 }; in display_pipe_crc_irq_handler() local
411 trace_intel_pipe_crc(crtc, crcs); in display_pipe_crc_irq_handler()
432 crcs); in display_pipe_crc_irq_handler()
/drivers/gpu/drm/amd/display/amdgpu_dm/
A Damdgpu_dm_crc.c729 uint32_t crcs[3]; in amdgpu_dm_crtc_handle_crc_irq() local
761 &crcs[0], &crcs[1], &crcs[2])) in amdgpu_dm_crtc_handle_crc_irq()
765 drm_crtc_accurate_vblank_count(crtc), crcs); in amdgpu_dm_crtc_handle_crc_irq()
/drivers/gpu/drm/msm/disp/dpu1/
A Ddpu_encoder.h81 int dpu_encoder_get_crc(const struct drm_encoder *drm_enc, u32 *crcs, int pos);
A Ddpu_crtc.c203 u32 crcs[CRTC_DUAL_MIXERS]; in dpu_crtc_get_lm_crc() local
208 BUILD_BUG_ON(ARRAY_SIZE(crcs) != ARRAY_SIZE(crtc_state->mixers)); in dpu_crtc_get_lm_crc()
217 rc = m->hw_lm->ops.collect_misr(m->hw_lm, &crcs[i]); in dpu_crtc_get_lm_crc()
227 drm_crtc_accurate_vblank_count(crtc), crcs); in dpu_crtc_get_lm_crc()
234 u32 crcs[INTF_MAX]; in dpu_crtc_get_encoder_crc() local
237 rc = dpu_encoder_get_crc(drm_enc, crcs, pos); in dpu_crtc_get_encoder_crc()
249 drm_crtc_accurate_vblank_count(crtc), crcs); in dpu_crtc_get_encoder_crc()
A Ddpu_encoder.c358 int dpu_encoder_get_crc(const struct drm_encoder *drm_enc, u32 *crcs, int pos) in dpu_encoder_get_crc() argument
377 rc = phys->hw_intf->ops.collect_misr(phys->hw_intf, &crcs[pos + entries_added]); in dpu_encoder_get_crc()
/drivers/gpu/drm/display/
A Ddrm_dp_helper.c2284 uint32_t crcs[3]; in drm_dp_aux_crc_work() local
2311 crcs[0] = crc_bytes[0] | crc_bytes[1] << 8; in drm_dp_aux_crc_work()
2312 crcs[1] = crc_bytes[2] | crc_bytes[3] << 8; in drm_dp_aux_crc_work()
2313 crcs[2] = crc_bytes[4] | crc_bytes[5] << 8; in drm_dp_aux_crc_work()
2314 drm_crtc_add_crc_entry(crtc, false, 0, crcs); in drm_dp_aux_crc_work()

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