Home
last modified time | relevance | path

Searched refs:ctrl1 (Results 1 – 25 of 54) sorted by relevance

123

/drivers/gpu/drm/tve200/
A Dtve200_display.c133 u32 ctrl1 = 0; in tve200_display_enable() local
154 ctrl1 |= TVE200_CTRL_CSMODE; in tve200_display_enable()
162 ctrl1 |= TVE200_CTRL_NTSC; in tve200_display_enable()
165 ctrl1 |= TVE200_VSTSTYPE_VSYNC; in tve200_display_enable()
169 ctrl1 |= TVE200_CTRL_TVCLKP; in tve200_display_enable()
185 ctrl1 |= TVE200_CTRL_BBBP; in tve200_display_enable()
191 ctrl1 |= TVE200_IPDMOD_RGB888; in tve200_display_enable()
194 ctrl1 |= TVE200_IPDMOD_RGB565; in tve200_display_enable()
197 ctrl1 |= TVE200_IPDMOD_RGB555; in tve200_display_enable()
225 ctrl1 |= TVE200_CTRL_YUV420; in tve200_display_enable()
[all …]
/drivers/crypto/bcm/
A Dspu2.c402 if (ctrl1 & SPU2_GENIV) in spu2_dump_fmd_ctrl1()
513 u64 ctrl1; in spu2_dump_msg_hdr() local
526 ctrl1 = le64_to_cpu(fmd->ctrl1); in spu2_dump_msg_hdr()
561 u64 ctrl1; in spu2_fmd_init() local
591 fmd->ctrl1 = cpu_to_le64(ctrl1); in spu2_fmd_init()
670 u64 ctrl1 = 0; in spu2_fmd_ctrl1_write() local
673 ctrl1 |= SPU2_TAG_LOC; in spu2_fmd_ctrl1_write()
689 ctrl1 |= SPU2_GENIV; in spu2_fmd_ctrl1_write()
692 ctrl1 |= SPU2_HASH_IV; in spu2_fmd_ctrl1_write()
695 ctrl1 |= SPU2_RET_IV; in spu2_fmd_ctrl1_write()
[all …]
/drivers/gpu/drm/aspeed/
A Daspeed_gfx_crtc.c31 u32 ctrl1; in aspeed_gfx_set_pixel_fmt() local
33 ctrl1 = readl(priv->base + CRT_CTRL1); in aspeed_gfx_set_pixel_fmt()
34 ctrl1 &= ~CRT_CTRL_COLOR_MASK; in aspeed_gfx_set_pixel_fmt()
39 ctrl1 |= CRT_CTRL_COLOR_RGB565; in aspeed_gfx_set_pixel_fmt()
44 ctrl1 |= CRT_CTRL_COLOR_XRGB8888; in aspeed_gfx_set_pixel_fmt()
52 writel(ctrl1, priv->base + CRT_CTRL1); in aspeed_gfx_set_pixel_fmt()
83 u32 ctrl1, d_offset, t_count, bpp; in aspeed_gfx_crtc_mode_set_nofb() local
97 ctrl1 &= ~(CRT_CTRL_INTERLACED | in aspeed_gfx_crtc_mode_set_nofb()
102 ctrl1 |= CRT_CTRL_INTERLACED; in aspeed_gfx_crtc_mode_set_nofb()
105 ctrl1 |= CRT_CTRL_HSYNC_NEGATIVE; in aspeed_gfx_crtc_mode_set_nofb()
[all …]
/drivers/net/can/cc770/
A Dcc770.c465 if (ctrl1 & RMTPND_SET) { in cc770_rx()
604 u8 ctrl1; in cc770_rx_interrupt() local
608 ctrl1 = cc770_read_reg(priv, msgobj[mo].ctrl1); in cc770_rx_interrupt()
621 if (ctrl1 & MSGLST_SET) { in cc770_rx_interrupt()
629 cc770_rx(dev, mo, ctrl1); in cc770_rx_interrupt()
644 u8 ctrl0, ctrl1; in cc770_rtr_interrupt() local
652 ctrl1 = cc770_read_reg(priv, msgobj[mo].ctrl1); in cc770_rtr_interrupt()
653 cc770_rx(dev, mo, ctrl1); in cc770_rtr_interrupt()
669 u8 ctrl1; in cc770_tx_interrupt() local
671 ctrl1 = cc770_read_reg(priv, msgobj[mo].ctrl1); in cc770_tx_interrupt()
[all …]
/drivers/rtc/
A Drtc-rx8025.c83 u8 ctrl1; member
379 rx8025->ctrl1); in rx8025_set_alarm()
388 rx8025->ctrl1 |= RX8025_BIT_CTRL1_DALE; in rx8025_set_alarm()
390 rx8025->ctrl1); in rx8025_set_alarm()
402 u8 ctrl1; in rx8025_alarm_irq_enable() local
405 ctrl1 = rx8025->ctrl1; in rx8025_alarm_irq_enable()
407 ctrl1 |= RX8025_BIT_CTRL1_DALE; in rx8025_alarm_irq_enable()
409 ctrl1 &= ~RX8025_BIT_CTRL1_DALE; in rx8025_alarm_irq_enable()
411 if (ctrl1 != rx8025->ctrl1) { in rx8025_alarm_irq_enable()
412 rx8025->ctrl1 = ctrl1; in rx8025_alarm_irq_enable()
[all …]
A Drtc-rc5t619.c122 unsigned int ctrl1; in rc5t619_rtc_read_time() local
132 err = regmap_read(rtc->rn5t618->regmap, RN5T618_RTC_CTRL1, &ctrl1); in rc5t619_rtc_read_time()
149 if (ctrl1 & CTRL1_24HR) in rc5t619_rtc_read_time()
168 unsigned int ctrl1; in rc5t619_rtc_set_time() local
178 err = regmap_read(rtc->rn5t618->regmap, RN5T618_RTC_CTRL1, &ctrl1); in rc5t619_rtc_set_time()
190 if (ctrl1 & CTRL1_24HR) in rc5t619_rtc_set_time()
231 unsigned int ctrl1; in rc5t619_rtc_read_alarm() local
258 if (ctrl1 & CTRL1_24HR) in rc5t619_rtc_read_alarm()
266 alrm->enabled = !!(ctrl1 & CTRL1_ALARM_ENABLED); in rc5t619_rtc_read_alarm()
278 unsigned int ctrl1; in rc5t619_rtc_set_alarm() local
[all …]
/drivers/media/platform/raspberrypi/rp1-cfe/
A Ddphy.c62 u32 ctrl1 = dw_csi2_host_read(dphy, DPHY_PHY_TST_CTRL1); in get_tstdout() local
64 return ((ctrl1 >> 8) & 0xff); in get_tstdout()
69 u32 ctrl1 = dw_csi2_host_read(dphy, DPHY_PHY_TST_CTRL1); in set_testen() local
72 (ctrl1 & ~(1 << 16)) | (val << 16)); in set_testen()
77 u32 ctrl1 = dw_csi2_host_read(dphy, DPHY_PHY_TST_CTRL1); in set_testdin() local
79 dw_csi2_host_write(dphy, DPHY_PHY_TST_CTRL1, (ctrl1 & ~0xff) | val); in set_testdin()
/drivers/spi/
A Dspi-mpc52xx.c153 u8 ctrl1; in mpc52xx_spi_fsmstate_idle() local
168 ctrl1 = SPI_CTRL1_SPIE | SPI_CTRL1_SPE | SPI_CTRL1_MSTR; in mpc52xx_spi_fsmstate_idle()
171 ctrl1 |= SPI_CTRL1_CPHA; in mpc52xx_spi_fsmstate_idle()
173 ctrl1 |= SPI_CTRL1_CPOL; in mpc52xx_spi_fsmstate_idle()
175 ctrl1 |= SPI_CTRL1_LSBFE; in mpc52xx_spi_fsmstate_idle()
176 out_8(ms->regs + SPI_CTRL1, ctrl1); in mpc52xx_spi_fsmstate_idle()
393 u8 ctrl1; in mpc52xx_spi_probe() local
403 ctrl1 = SPI_CTRL1_SPIE | SPI_CTRL1_SPE | SPI_CTRL1_MSTR; in mpc52xx_spi_probe()
404 out_8(regs + SPI_CTRL1, ctrl1); in mpc52xx_spi_probe()
414 out_8(regs + SPI_CTRL1, ctrl1); in mpc52xx_spi_probe()
/drivers/usb/host/
A Dsl811-hcd.c95 sl811->ctrl1 = 0; in port_power()
692 sl811->ctrl1 = 0; in sl811h_irq()
1138 sl811->ctrl1 &= ~SL11H_CTL1MASK_FORCE; in sl811h_timer()
1149 sl811->ctrl1 = 0; in sl811h_timer()
1187 sl811->ctrl1 |= SL11H_CTL1MASK_LSPD; in sl811h_timer()
1192 sl811->ctrl1 |= SL11H_CTL1MASK_SOF_ENA; in sl811h_timer()
1205 sl811->ctrl1 = 0; in sl811h_timer()
1247 sl811->ctrl1 = 0; in sl811h_hub_control()
1262 sl811->ctrl1 |= SL11H_CTL1MASK_K; in sl811h_hub_control()
1309 sl811->ctrl1 &= ~SL11H_CTL1MASK_SOF_ENA; in sl811h_hub_control()
[all …]
/drivers/gpu/drm/bridge/analogix/
A Danalogix-i2c-dptx.c106 u8 ctrl1 = msg->request; in anx_dp_aux_transfer() local
119 ctrl1 |= (msg->size - 1) << SP_AUX_LENGTH_SHIFT; in anx_dp_aux_transfer()
135 err = regmap_write(map_dptx, SP_DP_AUX_CH_CTRL1_REG, ctrl1); in anx_dp_aux_transfer()
/drivers/net/phy/
A Dphy-c45.c112 int bt1_ctrl, ctrl1, ctrl2, ret; in genphy_c45_pma_setup_forced() local
118 ctrl1 = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL1); in genphy_c45_pma_setup_forced()
119 if (ctrl1 < 0) in genphy_c45_pma_setup_forced()
120 return ctrl1; in genphy_c45_pma_setup_forced()
126 ctrl1 &= ~MDIO_CTRL1_SPEEDSEL; in genphy_c45_pma_setup_forced()
141 ctrl1 |= MDIO_PMA_CTRL1_SPEED100; in genphy_c45_pma_setup_forced()
145 ctrl1 |= MDIO_PMA_CTRL1_SPEED1000; in genphy_c45_pma_setup_forced()
150 ctrl1 |= MDIO_CTRL1_SPEED2_5G; in genphy_c45_pma_setup_forced()
155 ctrl1 |= MDIO_CTRL1_SPEED5G; in genphy_c45_pma_setup_forced()
160 ctrl1 |= MDIO_CTRL1_SPEED10G; in genphy_c45_pma_setup_forced()
[all …]
/drivers/comedi/drivers/
A Dme_daq.c138 unsigned short ctrl1; /* Mirror of CONTROL_1 register */ member
268 devpriv->ctrl1 |= ME_CTRL1_ADC_MODE_SOFT_TRIG; in me_ai_insn_read()
269 writew(devpriv->ctrl1, dev->mmio + ME_CTRL1_REG); in me_ai_insn_read()
288 devpriv->ctrl1 &= ~ME_CTRL1_ADC_MODE_MASK; in me_ai_insn_read()
289 writew(devpriv->ctrl1, dev->mmio + ME_CTRL1_REG); in me_ai_insn_read()
420 devpriv->ctrl1 = 0; in me_reset()
/drivers/pinctrl/intel/
A Dpinctrl-cherryview.c616 static bool chv_pad_is_locked(u32 ctrl1) in chv_pad_is_locked() argument
618 return ctrl1 & CHV_PADCTRL1_CFGLOCK; in chv_pad_is_locked()
630 u32 ctrl0, ctrl1; in chv_pin_dbg_show() local
650 if (chv_pad_is_locked(ctrl1)) in chv_pin_dbg_show()
838 u32 ctrl0, ctrl1; in chv_config_get() local
900 if (ctrl1 & CHV_PADCTRL1_ODEN) in chv_config_get()
905 if (!(ctrl1 & CHV_PADCTRL1_ODEN)) in chv_config_get()
981 u32 ctrl1; in chv_config_set_oden() local
985 ctrl1 = chv_readl(pctrl, pin, CHV_PADCTRL1); in chv_config_set_oden()
988 ctrl1 |= CHV_PADCTRL1_ODEN; in chv_config_set_oden()
[all …]
/drivers/leds/
A Dleds-is31fl319x.c254 u8 ctrl1 = 0, ctrl2 = 0; in is31fl3196_brightness_set() local
279 ctrl1 |= on << i; /* 0..2 => bit 0..2 */ in is31fl3196_brightness_set()
281 ctrl1 |= on << (i + 1); /* 3..5 => bit 4..6 */ in is31fl3196_brightness_set()
286 if (ctrl1 > 0 || ctrl2 > 0) { in is31fl3196_brightness_set()
288 ctrl1, ctrl2); in is31fl3196_brightness_set()
289 regmap_write(is31->regmap, IS31FL3196_CTRL1, ctrl1); in is31fl3196_brightness_set()
/drivers/phy/
A Dphy-lgm-usb.c71 void __iomem *ctrl1 = phy->io_priv + CTRL1_OFFSET; in phy_init() local
80 ret = readl_poll_timeout(ctrl1, val, val & SRAM_INIT_DONE, 10, 10 * 1000); in phy_init()
86 writel(readl(ctrl1) | SRAM_EXT_LD_DONE, ctrl1); in phy_init()
/drivers/iio/adc/
A Dab8500-gpadc.c395 u8 ctrl1; in ab8500_gpadc_read() local
430 ctrl1 = AB8500_GPADC_CTRL1_ENABLE; in ab8500_gpadc_read()
451 ctrl1 |= AB8500_GPADC_CTRL1_TRIG_ENA; in ab8500_gpadc_read()
453 ctrl1 |= AB8500_GPADC_CTRL1_TRIG_EDGE; in ab8500_gpadc_read()
472 ctrl1 |= AB8500_GPADC_CTRL1_BUF_ENA | in ab8500_gpadc_read()
477 ctrl1 |= AB8500_GPADC_CTRL1_BUF_ENA | in ab8500_gpadc_read()
489 ctrl1 |= AB8500_GPADC_CTRL1_BUF_ENA; in ab8500_gpadc_read()
495 AB8500_GPADC, AB8500_GPADC_CTRL1_REG, ctrl1); in ab8500_gpadc_read()
/drivers/iio/accel/
A Dkxcjk-1013.c249 u8 ctrl1; member
261 .ctrl1 = KXCJK1013_REG_CTRL1,
274 .ctrl1 = KXCJK1013_REG_CTRL1,
287 .ctrl1 = KX023_REG_CNTL1,
463 ret = i2c_smbus_read_byte_data(data->client, regs->ctrl1); in kxcjk1013_set_mode()
474 ret = i2c_smbus_write_byte_data(data->client, regs->ctrl1, ret); in kxcjk1013_set_mode()
489 ret = i2c_smbus_read_byte_data(data->client, regs->ctrl1); in kxcjk1013_get_mode()
508 ret = i2c_smbus_read_byte_data(data->client, regs->ctrl1); in kxcjk1013_set_range()
519 ret = i2c_smbus_write_byte_data(data->client, regs->ctrl1, ret); in kxcjk1013_set_range()
554 ret = i2c_smbus_read_byte_data(data->client, regs->ctrl1); in kxcjk1013_chip_init()
[all …]
/drivers/gpu/drm/mxsfb/
A Dmxsfb_kms.c56 u32 ctrl, ctrl1; in mxsfb_set_formats() local
64 ctrl1 = readl(mxsfb->base + LCDC_CTRL1); in mxsfb_set_formats()
65 ctrl1 &= CTRL1_CUR_FRAME_DONE_IRQ_EN | CTRL1_CUR_FRAME_DONE_IRQ; in mxsfb_set_formats()
71 ctrl1 |= CTRL1_SET_BYTE_PACKAGING(0xf); in mxsfb_set_formats()
77 ctrl1 |= CTRL1_SET_BYTE_PACKAGING(0x7); in mxsfb_set_formats()
96 writel(ctrl1, mxsfb->base + LCDC_CTRL1); in mxsfb_set_formats()
/drivers/thermal/
A Darmada_thermal.c496 u32 ctrl1; in armada_set_overheat_thresholds() local
498 regmap_read(priv->syscon, data->syscon_control1_off, &ctrl1); in armada_set_overheat_thresholds()
502 ctrl1 &= ~(data->temp_mask << data->thresh_shift); in armada_set_overheat_thresholds()
503 ctrl1 |= threshold << data->thresh_shift; in armada_set_overheat_thresholds()
509 ctrl1 &= ~(data->hyst_mask << data->hyst_shift); in armada_set_overheat_thresholds()
510 ctrl1 |= hysteresis << data->hyst_shift; in armada_set_overheat_thresholds()
514 regmap_write(priv->syscon, data->syscon_control1_off, ctrl1); in armada_set_overheat_thresholds()
/drivers/extcon/
A Dextcon-max14577.c198 u8 ctrl1, ctrl2 = 0; in max14577_muic_set_path() local
211 ctrl1 = val; in max14577_muic_set_path()
213 ctrl1 = CTRL1_SW_OPEN; in max14577_muic_set_path()
217 CLEAR_IDBEN_MICEN_MASK, ctrl1); in max14577_muic_set_path()
238 ctrl1, ctrl2, attached ? "attached" : "detached"); in max14577_muic_set_path()
A Dextcon-max8997.c201 u8 ctrl1, ctrl2 = 0; in max8997_muic_set_path() local
204 ctrl1 = val; in max8997_muic_set_path()
206 ctrl1 = CONTROL1_SW_OPEN; in max8997_muic_set_path()
209 MAX8997_MUIC_REG_CONTROL1, ctrl1, COMP_SW_MASK); in max8997_muic_set_path()
230 ctrl1, ctrl2, attached ? "attached" : "detached"); in max8997_muic_set_path()
A Dextcon-max77843.c203 unsigned int ctrl1, ctrl2; in max77843_muic_set_path() local
206 ctrl1 = val; in max77843_muic_set_path()
208 ctrl1 = MAX77843_MUIC_CONTROL1_SW_OPEN; in max77843_muic_set_path()
211 ctrl1 |= MAX77843_MUIC_CONTROL1_NOBCCOMP_MASK; in max77843_muic_set_path()
218 ctrl1); in max77843_muic_set_path()
240 ctrl1, ctrl2, attached ? "attached" : "detached"); in max77843_muic_set_path()
/drivers/input/rmi4/
A Drmi_f3a.c170 u8 ctrl1[RMI_F3A_MAX_REG_SIZE]; in rmi_f3a_initialize() local
194 ctrl1, f3a->register_count); in rmi_f3a_initialize()
200 error = rmi_f3a_map_gpios(fn, f3a, query1, ctrl1); in rmi_f3a_initialize()
/drivers/net/wireless/ath/ath9k/
A Dar9003_paprd.c146 static const u32 ctrl1[3] = { in ar9003_paprd_setup_single_table() local
186 REG_RMW_FIELD(ah, ctrl1[i], in ar9003_paprd_setup_single_table()
188 REG_RMW_FIELD(ah, ctrl1[i], in ar9003_paprd_setup_single_table()
190 REG_RMW_FIELD(ah, ctrl1[i], in ar9003_paprd_setup_single_table()
192 REG_RMW_FIELD(ah, ctrl1[i], in ar9003_paprd_setup_single_table()
194 REG_RMW_FIELD(ah, ctrl1[i], in ar9003_paprd_setup_single_table()
196 REG_RMW_FIELD(ah, ctrl1[i], in ar9003_paprd_setup_single_table()
/drivers/usb/cdns3/
A Ddrd.h36 __le32 ctrl1; member
56 __le32 ctrl1; member

Completed in 67 milliseconds

123