| /drivers/hwmon/ |
| A D | fam15h_power.c | 138 int cu; in do_read_registers_on_cu() local
149 data->cu_on[cu] = 1; in do_read_registers_on_cu()
218 for (cu = 0; cu < cu_num; cu++) { in power1_average_show()
219 prev_cu_acc_power[cu] = data->cu_acc_power[cu]; in power1_average_show()
220 prev_ptsc[cu] = data->cpu_sw_pwr_ptsc[cu]; in power1_average_show()
231 for (cu = 0, avg_acc = 0; cu < cu_num; cu++) { in power1_average_show()
236 if (data->cu_acc_power[cu] < prev_cu_acc_power[cu]) { in power1_average_show()
237 jdelta[cu] = data->max_cu_acc_power + data->cu_acc_power[cu]; in power1_average_show()
238 jdelta[cu] -= prev_cu_acc_power[cu]; in power1_average_show()
240 jdelta[cu] = data->cu_acc_power[cu] - prev_cu_acc_power[cu]; in power1_average_show()
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| /drivers/gpu/drm/amd/amdkfd/ |
| A D | kfd_crat.c | 1022 struct crat_subtype_computeunit *cu) in kfd_populated_cu_info_cpu() argument
1030 cu->processor_id_low); in kfd_populated_cu_info_cpu()
1034 struct crat_subtype_computeunit *cu) in kfd_populated_cu_info_gpu() argument
1059 cu->proximity_domain, cu->hsa_capability); in kfd_parse_subtype_cu()
1063 kfd_populated_cu_info_cpu(dev, cu); in kfd_parse_subtype_cu()
1066 kfd_populated_cu_info_gpu(dev, cu); in kfd_parse_subtype_cu()
1310 struct crat_subtype_computeunit *cu; in kfd_parse_subtype() local
2242 struct crat_subtype_computeunit *cu; in kfd_create_vcrat_image_gpu() local
2277 cu->flags |= CRAT_CU_FLAGS_GPU_PRESENT; in kfd_create_vcrat_image_gpu()
2293 cu->lds_size_in_kb = cu_info->lds_size; in kfd_create_vcrat_image_gpu()
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| A D | kfd_mqd_manager.c | 107 int i, se, sh, cu, cu_bitmap_sh_mul, cu_inc = wgp_mode_req ? 2 : 1; in mqd_symmetrically_map_cu_mask() local
193 for (cu = 0; cu < 16; cu += cu_inc) { in mqd_symmetrically_map_cu_mask()
196 if (cu_per_sh[se][sh] > cu) { in mqd_symmetrically_map_cu_mask()
198 se_mask[se] |= en_mask << (cu + sh * 16); in mqd_symmetrically_map_cu_mask()
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| /drivers/media/platform/qcom/iris/ |
| A D | iris_hfi_gen1_command.c | 433 struct hfi_videocores_usage_type *in = pdata, *cu = prop_data; in iris_hfi_gen1_packet_session_set_property() local
435 cu->video_core_enable_mask = in->video_core_enable_mask; in iris_hfi_gen1_packet_session_set_property()
436 packet->shdr.hdr.size += sizeof(u32) + sizeof(*cu); in iris_hfi_gen1_packet_session_set_property()
577 struct hfi_videocores_usage_type cu; in iris_hfi_gen1_decide_core() local
579 cu.video_core_enable_mask = HFI_CORE_ID_1; in iris_hfi_gen1_decide_core()
581 return hfi_gen1_set_property(inst, ptype, &cu, sizeof(cu)); in iris_hfi_gen1_decide_core()
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| /drivers/media/platform/qcom/venus/ |
| A D | pm_helpers.c | 637 struct hfi_videocores_usage_type cu; in decide_core() local
645 cu.video_core_enable_mask = VIDC_CORE_ID_1; in decide_core()
647 cu.video_core_enable_mask = VIDC_CORE_ID_2; in decide_core()
672 cu.video_core_enable_mask = min_coreid; in decide_core()
676 cu.video_core_enable_mask = min_coreid; in decide_core()
681 cu.video_core_enable_mask = min_lp_coreid; in decide_core()
689 ret = hfi_session_set_property(inst, ptype, &cu); in decide_core()
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| A D | hfi_cmds.c | 1229 struct hfi_videocores_usage_type *in = pdata, *cu = prop_data; in pkt_session_set_property_4xx() local
1231 cu->video_core_enable_mask = in->video_core_enable_mask; in pkt_session_set_property_4xx()
1232 pkt->shdr.hdr.size += sizeof(u32) + sizeof(*cu); in pkt_session_set_property_4xx()
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| /drivers/accel/amdxdna/ |
| A D | aie2_message.c | 396 struct amdxdna_cu_config *cu = &hwctx->cus->cu_configs[i]; in aie2_config_cu() local
398 if (XDNA_MBZ_DBG(xdna, cu->pad, sizeof(cu->pad))) in aie2_config_cu()
401 gobj = drm_gem_object_lookup(hwctx->client->filp, cu->cu_bo); in aie2_config_cu()
416 req.cfgs[i] |= FIELD_PREP(AIE2_MSG_CFG_CU_FUNC, cu->cu_func); in aie2_config_cu()
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| /drivers/s390/cio/ |
| A D | chsc.c | 1532 u16 cu; member
1569 int chsc_scud(u16 cu, u64 *esm, u8 *esm_valid) in chsc_scud() argument
1580 scud->first_cu = cu; in chsc_scud()
1581 scud->last_cu = cu; in chsc_scud()
1589 || scud->cudb[0].cu != cu)) { in chsc_scud()
1594 scud->fmt_resp, scud->cudb[0].flags, scud->cudb[0].cu); in chsc_scud()
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| /drivers/gpu/drm/amd/amdgpu/ |
| A D | amdgpu_umr.h | 50 u32 gpr_or_wave, se, sh, cu, wave, simd, xcc_id; member
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| A D | amdgpu_ras_eeprom.h | 139 unsigned char cu; member
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| A D | gfx_v9_4_2.c | 422 uint32_t se, cu, simd, wave; in gfx_v9_4_2_log_wave_assignment() local
434 for (cu = 0; cu < CU_ID_MAX; cu++) { in gfx_v9_4_2_log_wave_assignment()
436 size = sprintf(str, "SE[%02d]CU[%02d]: ", se, cu); in gfx_v9_4_2_log_wave_assignment()
456 uint32_t se, cu, simd, wave; in gfx_v9_4_2_wait_for_waves_assigned() local
466 for (cu = 0; cu < CU_ID_MAX; cu++) in gfx_v9_4_2_wait_for_waves_assigned()
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| A D | amdgpu_debugfs.c | 429 amdgpu_gfx_select_se_sh(adev, rd->id.se, rd->id.sh, rd->id.cu, rd->id.xcc_id); in amdgpu_debugfs_gprwave_read()
1061 uint32_t offset, se, sh, cu, wave, simd, data[32]; in amdgpu_debugfs_wave_read() local
1070 cu = (*pos & GENMASK_ULL(30, 23)) >> 23; in amdgpu_debugfs_wave_read()
1088 amdgpu_gfx_select_se_sh(adev, se, sh, cu, 0); in amdgpu_debugfs_wave_read()
1153 uint32_t offset, se, sh, cu, wave, simd, thread, bank, *data; in amdgpu_debugfs_gpr_read() local
1162 cu = (*pos & GENMASK_ULL(35, 28)) >> 28; in amdgpu_debugfs_gpr_read()
1182 amdgpu_gfx_select_se_sh(adev, se, sh, cu, 0); in amdgpu_debugfs_gpr_read()
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| A D | amdgpu_gfx.c | 111 unsigned int se, sh, cu; in amdgpu_gfx_parse_disable_cu() local
122 int ret = sscanf(p, "%u.%u.%u", &se, &sh, &cu); in amdgpu_gfx_parse_disable_cu()
129 if (se < max_se && sh < max_sh && cu < 16) { in amdgpu_gfx_parse_disable_cu()
130 DRM_INFO("amdgpu: disabling CU %u.%u.%u\n", se, sh, cu); in amdgpu_gfx_parse_disable_cu()
131 mask[se * max_sh + sh] |= 1u << cu; in amdgpu_gfx_parse_disable_cu()
134 se, sh, cu); in amdgpu_gfx_parse_disable_cu()
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| A D | amdgpu_umc.c | 381 err_rec->cu = 0; in amdgpu_umc_fill_error_record()
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| /drivers/net/vmxnet3/ |
| A D | vmxnet3_defs.h | 852 } cu; member
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| A D | vmxnet3_ethtool.c | 1025 union Vmxnet3_CmdInfo *cmdInfo = &shared->cu.cmdInfo; in vmxnet3_set_rss_hash_opt()
1204 union Vmxnet3_CmdInfo *cmdInfo = &shared->cu.cmdInfo; in vmxnet3_set_coalesce()
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| A D | vmxnet3_drv.c | 3051 union Vmxnet3_CmdInfo *cmdInfo = &shared->cu.cmdInfo; in vmxnet3_init_bufsize()
3068 union Vmxnet3_CmdInfo *cmdInfo = &shared->cu.cmdInfo; in vmxnet3_init_coalesce()
3095 union Vmxnet3_CmdInfo *cmdInfo = &shared->cu.cmdInfo; in vmxnet3_init_rssfields()
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| /drivers/infiniband/hw/hfi1/ |
| A D | driver.c | 40 module_param_named(cu, hfi1_cu, uint, S_IRUGO);
41 MODULE_PARM_DESC(cu, "Credit return units");
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| A D | chip.c | 6456 static u8 cu_to_vcu(u32 cu) in cu_to_vcu() argument
6458 return ilog2(cu); in cu_to_vcu()
14688 static void assign_cm_au_table(struct hfi1_devdata *dd, u32 cu, in assign_cm_au_table() argument
14694 2ull * cu << in assign_cm_au_table()
14696 4ull * cu << in assign_cm_au_table()
14699 8ull * cu << in assign_cm_au_table()
14701 16ull * cu << in assign_cm_au_table()
14703 32ull * cu << in assign_cm_au_table()
14705 64ull * cu << in assign_cm_au_table()
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