| /drivers/crypto/intel/qat/qat_common/ |
| A D | qat_hal.c | 112 unsigned int cur_ctx; in qat_hal_get_wakeup_event() local
114 cur_ctx = qat_hal_rd_ae_csr(handle, ae, CSR_CTX_POINTER); in qat_hal_get_wakeup_event()
117 qat_hal_wr_ae_csr(handle, ae, CSR_CTX_POINTER, cur_ctx); in qat_hal_get_wakeup_event()
317 unsigned int ctx, cur_ctx; in qat_hal_wr_indr_csr() local
328 qat_hal_wr_ae_csr(handle, ae, CSR_CTX_POINTER, cur_ctx); in qat_hal_wr_indr_csr()
335 unsigned int cur_ctx, csr_val; in qat_hal_rd_indr_csr() local
340 qat_hal_wr_ae_csr(handle, ae, CSR_CTX_POINTER, cur_ctx); in qat_hal_rd_indr_csr()
349 unsigned int ctx, cur_ctx; in qat_hal_put_sig_event() local
358 qat_hal_wr_ae_csr(handle, ae, CSR_CTX_POINTER, cur_ctx); in qat_hal_put_sig_event()
365 unsigned int ctx, cur_ctx; in qat_hal_put_wakeup_event() local
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| /drivers/gpu/drm/amd/display/dc/inc/ |
| A D | resource.h | 311 struct dc_state *cur_ctx,
343 const struct dc_state *cur_ctx,
367 const struct dc_state *cur_ctx,
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| A D | core_types.h | 140 const struct dc_state *cur_ctx,
146 const struct dc_state *cur_ctx,
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| /drivers/gpu/drm/amd/display/dc/dml2/ |
| A D | dml2_wrapper.h | 80 const struct dc_state *cur_ctx,
86 const struct dc_state *cur_ctx,
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| /drivers/gpu/drm/amd/display/dc/hwss/dcn32/ |
| A D | dcn32_hwseq.h | 123 const struct dc_state *cur_ctx,
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| A D | dcn32_hwseq.c | 1716 const struct dc_state *cur_ctx, in is_subvp_phantom_topology_transition_seamless() argument
1721 enum mall_stream_type cur_pipe_type = dc_state_get_pipe_subvp_type(cur_ctx, cur_pipe); in is_subvp_phantom_topology_transition_seamless()
1724 …const struct dc_stream_state *cur_paired_stream = dc_state_get_paired_subvp_stream(cur_ctx, cur_pi… in is_subvp_phantom_topology_transition_seamless()
1734 const struct dc_state *cur_ctx, in dcn32_is_pipe_topology_transition_seamless() argument
1742 cur_pipe = &cur_ctx->res_ctx.pipe_ctx[i]; in dcn32_is_pipe_topology_transition_seamless()
1752 is_subvp_phantom_topology_transition_seamless(cur_ctx, new_ctx, cur_pipe, new_pipe)) in dcn32_is_pipe_topology_transition_seamless()
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| /drivers/gpu/drm/amd/display/dc/core/ |
| A D | dc_resource.c | 2969 struct dc_state *cur_ctx, in acquire_secondary_dpp_pipes_and_add_plane() argument
2990 cur_ctx, in acquire_secondary_dpp_pipes_and_add_plane()
3015 struct dc_state *cur_ctx, in resource_append_dpp_pipes_for_plane_composition() argument
3028 cur_ctx, pool); in resource_append_dpp_pipes_for_plane_composition()
3110 const struct dc_state *cur_ctx, in acquire_pipes_and_add_odm_slice() argument
3123 cur_ctx, new_ctx, pool, in acquire_pipes_and_add_odm_slice()
3138 cur_ctx, new_ctx, pool, in acquire_pipes_and_add_odm_slice()
3249 const struct dc_state *cur_ctx, in acquire_dpp_pipe_and_add_mpc_slice() argument
3336 const struct dc_state *cur_ctx, in resource_update_pipes_for_stream_with_slice_count() argument
3371 const struct dc_state *cur_ctx, in resource_update_pipes_for_plane_with_slice_count() argument
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| A D | dc_state.c | 452 const struct dc_state *cur_ctx, in remove_mpc_combine_for_stream() argument
459 new_ctx, cur_ctx, dc->res_pool, in remove_mpc_combine_for_stream()
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| /drivers/gpu/drm/amd/display/dc/resource/dcn20/ |
| A D | dcn20_resource.h | 62 const struct dc_state *cur_ctx,
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| A D | dcn20_resource.c | 2146 const struct dc_state *cur_ctx, in dcn20_acquire_free_pipe_for_layer() argument
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| /drivers/gpu/drm/amd/display/dc/hwss/ |
| A D | hw_sequencer.h | 450 const struct dc_state *cur_ctx,
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| /drivers/gpu/drm/amd/display/dc/resource/dcn32/ |
| A D | dcn32_resource.c | 2795 const struct dc_state *cur_ctx, in dcn32_acquire_free_pipe_as_secondary_dpp_pipe() argument
2809 &cur_ctx->res_ctx, &new_ctx->res_ctx, in dcn32_acquire_free_pipe_as_secondary_dpp_pipe()
2832 const struct dc_state *cur_ctx, in dcn32_acquire_free_pipe_as_secondary_opp_head() argument
2838 &cur_ctx->res_ctx, &new_ctx->res_ctx, in dcn32_acquire_free_pipe_as_secondary_opp_head()
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| A D | dcn32_resource.h | 147 const struct dc_state *cur_ctx,
153 const struct dc_state *cur_ctx,
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| /drivers/gpu/drm/amd/display/dc/resource/dcn201/ |
| A D | dcn201_resource.c | 1000 const struct dc_state *cur_ctx, in dcn201_acquire_free_pipe_for_layer() argument
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| /drivers/gpu/drm/amd/display/dc/resource/dce110/ |
| A D | dce110_resource.c | 1122 const struct dc_state *cur_ctx, in dce110_acquire_underlay() argument
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| /drivers/gpu/drm/amd/display/dc/resource/dcn10/ |
| A D | dcn10_resource.c | 1080 const struct dc_state *cur_ctx, in dcn10_acquire_free_pipe_for_layer() argument
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