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Searched refs:cur_link_settings (Results 1 – 25 of 25) sorted by relevance

/drivers/gpu/drm/amd/display/dc/link/protocols/
A Dlink_dp_training.c1651 cur_link_settings.link_rate, cur_link_settings.lane_count, in perform_link_training_with_retries()
1652 cur_link_settings.link_spread); in perform_link_training_with_retries()
1659 &cur_link_settings); in perform_link_training_with_retries()
1679 &cur_link_settings, in perform_link_training_with_retries()
1697 &cur_link_settings, in perform_link_training_with_retries()
1731 cur_link_settings.link_rate, cur_link_settings.lane_count, in perform_link_training_with_retries()
1732 cur_link_settings.link_spread, status); in perform_link_training_with_retries()
1737 cur_link_settings.link_rate, cur_link_settings.lane_count, in perform_link_training_with_retries()
1738 cur_link_settings.link_spread, status); in perform_link_training_with_retries()
1763 cur_link_settings = *link_setting; in perform_link_training_with_retries()
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A Dlink_dp_phy.c65 link->cur_link_settings = *link_settings; in dp_enable_link_phy()
84 memset(&link->cur_link_settings, 0, in dp_disable_link_phy()
85 sizeof(link->cur_link_settings)); in dp_disable_link_phy()
A Dlink_dp_irq_handler.c60 if (link->cur_link_settings.lane_count == 0) in dp_parse_link_loss_status()
66 for (lane = 0; lane < link->cur_link_settings.lane_count; lane++) { in dp_parse_link_loss_status()
88 if (link_dp_get_encoding_format(&link->cur_link_settings) == DP_128b_132b_ENCODING && in dp_parse_link_loss_status()
403 if ((link->cur_link_settings.lane_count != LANE_COUNT_UNKNOWN) || in dp_should_allow_hpd_rx_irq()
A Dlink_dp_capability.c2335 struct dc_link_settings cur_link_settings = {0}; in dp_verify_link_cap() local
2345 cur_link_settings = max_link_settings; in dp_verify_link_cap()
2355 if (!get_temp_dp_link_res(link, &link_res, &cur_link_settings)) in dp_verify_link_cap()
2358 skip_video_pattern = cur_link_settings.link_rate != LINK_RATE_LOW; in dp_verify_link_cap()
2364 &cur_link_settings); in dp_verify_link_cap()
2369 &cur_link_settings, in dp_verify_link_cap()
2390 &max_link_settings, &cur_link_settings, status)); in dp_verify_link_cap()
2393 cur_link_settings : fail_safe_link_settings; in dp_verify_link_cap()
A Dlink_dp_training_dpia.c694 dp_is_symbol_locked(link->cur_link_settings.lane_count, dpcd_lane_status) && in dpia_training_eq_non_transparent()
777 dp_is_symbol_locked(link->cur_link_settings.lane_count, dpcd_lane_status)) { in dpia_training_eq_transparent()
/drivers/gpu/drm/amd/display/dc/link/
A Dlink_dpms.c1121 &stream->link->cur_link_settings); in get_pbn_per_slot()
1522 &link->cur_link_settings, in allocate_mst_payload()
1534 dp_link_bandwidth_kbps(link, &link->cur_link_settings)); in link_calculate_sst_avg_time_slots_per_mtp()
1718 if (allocate && link_dp_get_encoding_format(&link->cur_link_settings) == in update_sst_payload()
1729 &link->cur_link_settings, in update_sst_payload()
1760 &link->cur_link_settings, in link_reduce_mst_payload()
1907 &link->cur_link_settings, in link_increase_mst_payload()
1917 struct dc_link_settings link_settings = link->cur_link_settings; in disable_link_dp()
2011 memset(&stream->link->cur_link_settings, 0, in enable_link_hdmi()
2170 memset(&stream->link->cur_link_settings, 0, in enable_link_lvds()
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A Dlink_detection.c541 link->cur_link_settings.lane_count = in read_current_link_settings_on_detect()
563 link->cur_link_settings.link_rate = in read_current_link_settings_on_detect()
565 link->cur_link_settings.link_rate_set = link_rate_set; in read_current_link_settings_on_detect()
566 link->cur_link_settings.use_link_rate_set = true; in read_current_link_settings_on_detect()
573 link->cur_link_settings.link_rate = link_bw_set; in read_current_link_settings_on_detect()
574 link->cur_link_settings.use_link_rate_set = false; in read_current_link_settings_on_detect()
579 link->cur_link_settings.link_spread = in read_current_link_settings_on_detect()
A Dlink_resource.c65 link_dp_get_encoding_format(&link->cur_link_settings) != DP_128b_132b_ENCODING) in link_get_cur_res_map()
/drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/
A Ddce110_clk_mgr.c156 stream->link->cur_link_settings.lane_count; in dce110_fill_display_configs()
158 stream->link->cur_link_settings.link_rate; in dce110_fill_display_configs()
160 stream->link->cur_link_settings.link_spread; in dce110_fill_display_configs()
/drivers/gpu/drm/amd/display/dc/link/accessories/
A Dlink_dp_cts.c81 …>dc->link_srv->dp_get_encoding_format((const struct dc_link_settings *) &link->cur_link_settings)); in dp_retrain_link_dp_test()
301 link_training_settings.link_settings = link->cur_link_settings; in dp_test_send_phy_test_pattern()
303 link_training_settings.lttpr_mode = dp_decide_lttpr_mode(link, &link->cur_link_settings); in dp_test_send_phy_test_pattern()
427 (unsigned int)(link->cur_link_settings.lane_count); in dp_test_send_phy_test_pattern()
431 if (link_dp_get_encoding_format(&link->cur_link_settings) == in dp_test_send_phy_test_pattern()
442 } else if (link_dp_get_encoding_format(&link->cur_link_settings) == in dp_test_send_phy_test_pattern()
/drivers/gpu/drm/amd/display/amdgpu_dm/
A Damdgpu_dm_debugfs.c210 link->cur_link_settings.lane_count, in dp_link_settings_read()
211 link->cur_link_settings.link_rate, in dp_link_settings_read()
212 link->cur_link_settings.link_spread); in dp_link_settings_read()
668 link->cur_link_settings.lane_count; in dp_phy_settings_write()
670 link->cur_link_settings.link_rate; in dp_phy_settings_write()
672 link->cur_link_settings.link_spread; in dp_phy_settings_write()
770 struct dc_link_settings cur_link_settings = {LANE_COUNT_UNKNOWN, in dp_phy_test_pattern_debugfs_write() local
859 cur_link_settings.lane_count = link->cur_link_settings.lane_count; in dp_phy_test_pattern_debugfs_write()
860 cur_link_settings.link_rate = link->cur_link_settings.link_rate; in dp_phy_test_pattern_debugfs_write()
861 cur_link_settings.link_spread = link->cur_link_settings.link_spread; in dp_phy_test_pattern_debugfs_write()
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A Damdgpu_dm_mst_types.c1814 struct dc_link_settings cur_link_settings; in dm_dp_mst_is_port_support_mode() local
1828 cur_link_settings = stream->link->verified_link_cap; in dm_dp_mst_is_port_support_mode()
1829 root_link_bw_in_kbps = dc_link_bandwidth_kbps(aconnector->dc_link, &cur_link_settings); in dm_dp_mst_is_port_support_mode()
A Damdgpu_dm_helpers.c559 link->cur_link_settings.lane_count = 0; in dm_helpers_dp_mst_stop_top_mgr()
/drivers/gpu/drm/amd/display/dc/link/hwss/
A Dlink_hwss_hpo_fixed_vs_pe_retimer_dp.c107 if (link->cur_link_settings.lane_count == LANE_COUNT_FOUR) in dp_hpo_fixed_vs_pe_retimer_program_override_test_pattern()
114 if (link->cur_link_settings.lane_count == LANE_COUNT_FOUR) in dp_hpo_fixed_vs_pe_retimer_program_override_test_pattern()
A Dlink_hwss_dio_fixed_vs_pe_retimer.c32 if (link->cur_link_settings.lane_count == LANE_COUNT_FOUR) in dp_dio_fixed_vs_pe_retimer_lane_cfg_to_hw_cfg()
/drivers/gpu/drm/amd/display/dc/dce/
A Ddce_clk_mgr.c532 stream->link->cur_link_settings.lane_count; in dce110_fill_display_configs()
534 stream->link->cur_link_settings.link_rate; in dce110_fill_display_configs()
536 stream->link->cur_link_settings.link_spread; in dce110_fill_display_configs()
A Ddmub_replay.c66 if (link->cur_link_settings.link_rate >= LINK_RATE_UHBR10) { in dmub_replay_enable()
177 if (link->cur_link_settings.link_rate >= LINK_RATE_UHBR10) { in dmub_replay_copy_settings()
/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/
A Ddcn30_clk_mgr.c476 …clk_mgr->cur_phyclk_req_table[link->link_index] = link->cur_link_settings.link_rate * LINK_RATE_RE… in dcn30_notify_link_rate_change()
/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/
A Ddcn20_clk_mgr.c504 …clk_mgr->cur_phyclk_req_table[link->link_index] = link->cur_link_settings.link_rate * LINK_RATE_RE… in dcn2_notify_link_rate_change()
/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/
A Drn_clk_mgr.c550 …clk_mgr->cur_phyclk_req_table[link->link_index] = link->cur_link_settings.link_rate * LINK_RATE_RE… in rn_notify_link_rate_change()
/drivers/gpu/drm/amd/display/dc/bios/
A Dcommand_table2.c396 process_phy_transition_init_params.display_port_link_rate = link->cur_link_settings.link_rate; in transmitter_control_v1_7()
/drivers/gpu/drm/amd/display/dc/hwss/dce110/
A Ddce110_hwseq.c665 pipe_ctx->stream->link->cur_link_settings.lane_count; in dce110_enable_stream()
1747 memset(&dc->links[i]->cur_link_settings, 0, in power_down_encoders()
1748 sizeof(dc->links[i]->cur_link_settings)); in power_down_encoders()
/drivers/gpu/drm/amd/display/dc/
A Ddc.h1540 struct dc_link_settings cur_link_settings; member
/drivers/gpu/drm/amd/display/dc/hwss/dcn401/
A Ddcn401_hwseq.c906 pipe_ctx->stream->link->cur_link_settings.lane_count; in dcn401_enable_stream_calc()
957 if (link->cur_link_settings.link_rate == LINK_RATE_UNKNOWN) { in dcn401_enable_stream()
/drivers/gpu/drm/amd/display/dc/hwss/dcn20/
A Ddcn20_hwseq.c3014 pipe_ctx->stream->link->cur_link_settings.lane_count; in dcn20_enable_stream()
3046 if (link->cur_link_settings.link_rate == LINK_RATE_UNKNOWN) { in dcn20_enable_stream()

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