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Searched refs:current_state (Results 1 – 25 of 146) sorted by relevance

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/drivers/hid/bpf/progs/
A DXPPen__Artist24.bpf.c157 __u8 current_state, changed_state; in SEC() local
163 current_state = data[1]; in SEC()
166 if (current_state == prev_state) in SEC()
181 if ((current_state & IN_RANGE) == 0) { in SEC()
191 changed_state = prev_state ^ current_state; in SEC()
194 prev_state = current_state; in SEC()
/drivers/net/ethernet/ti/
A Dnetcp_xgbepcsr.c309 u32 *current_state, u32 *lane_down) in netcp_xgbe_check_link_status() argument
332 switch (current_state[i]) { in netcp_xgbe_check_link_status()
339 current_state[i] = 1; in netcp_xgbe_check_link_status()
352 current_state[i] = 2; in netcp_xgbe_check_link_status()
359 current_state[i] = 1; in netcp_xgbe_check_link_status()
366 current_state[i] = 0; in netcp_xgbe_check_link_status()
372 i, current_state[i]); in netcp_xgbe_check_link_status()
385 status &= (current_state[i] == 1); in netcp_xgbe_check_link_status()
394 u32 current_state[2] = {0, 0}; in netcp_xgbe_serdes_check_lane() local
403 current_state, in netcp_xgbe_serdes_check_lane()
/drivers/gpu/drm/amd/display/modules/hdcp/
A Dhdcp.h427 return (current_state(hdcp) > HDCP1_STATE_START && in is_in_hdcp1_states()
428 current_state(hdcp) <= HDCP1_STATE_END); in is_in_hdcp1_states()
434 current_state(hdcp) <= HDCP1_DP_STATE_END); in is_in_hdcp1_dp_states()
439 return (current_state(hdcp) > HDCP2_STATE_START && in is_in_hdcp2_states()
440 current_state(hdcp) <= HDCP2_STATE_END); in is_in_hdcp2_states()
446 current_state(hdcp) <= HDCP2_DP_STATE_END); in is_in_hdcp2_dp_states()
452 current_state(hdcp) == H1_A45_AUTHENTICATED || in is_in_authenticated_states()
453 current_state(hdcp) == D2_A5_AUTHENTICATED || in is_in_authenticated_states()
454 current_state(hdcp) == H2_A5_AUTHENTICATED); in is_in_authenticated_states()
469 return current_state(hdcp) == HDCP_CP_NOT_DESIRED; in is_in_cp_not_desired_state()
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/drivers/pci/
A Dpci-driver.c488 if (pci_dev->current_state == PCI_D0) in pci_device_remove()
489 pci_dev->current_state = PCI_UNKNOWN; in pci_device_remove()
536 if (pci_dev->current_state != PCI_D0) { in pci_restore_standard_config()
603 if (pci_dev->current_state == PCI_D0) in pci_pm_set_unknown_state()
604 pci_dev->current_state = PCI_UNKNOWN; in pci_pm_set_unknown_state()
633 pci_power_t prev = pci_dev->current_state; in pci_legacy_suspend()
821 pci_power_t prev = pci_dev->current_state; in pci_pm_suspend()
867 pci_power_t prev = pci_dev->current_state; in pci_pm_suspend_noirq()
897 pci_power_name(pci_dev->current_state)); in pci_pm_suspend_noirq()
899 if (pci_dev->current_state == PCI_D0) { in pci_pm_suspend_noirq()
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A Dpci.c1202 dev->current_state = PCI_D3cold; in pci_update_current_state()
1213 dev->current_state = state; in pci_update_current_state()
1243 dev->current_state = PCI_D0; in pci_platform_power_transition()
1370 dev->current_state = PCI_D0; in pci_power_up()
1372 dev->current_state = state; in pci_power_up()
1381 dev->current_state = PCI_D3cold; in pci_power_up()
1406 dev->current_state = PCI_D0; in pci_power_up()
1476 dev->current_state = state; in __pci_dev_set_current_state()
1530 if (dev->current_state <= PCI_D3cold && dev->current_state > state) { in pci_set_low_power_state()
1565 if (dev->current_state != state) in pci_set_low_power_state()
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/drivers/gpu/drm/amd/display/dc/core/
A Ddc.c405 if (!dc->current_state) in set_long_vtotal()
922 if (dc->current_state) { in dc_destruct()
924 dc->current_state = NULL; in dc_destruct()
1158 if (!dc->current_state) { in dc_construct()
4725 dc->current_state, in commit_minimal_transition_based_on_new_context()
4772 dc->current_state, in commit_minimal_transition_based_on_current_context()
5322 dc->current_state); in commit_planes_and_stream_update_on_current_context()
5331 dc->current_state); in commit_planes_and_stream_update_on_current_context()
5532 if (!dc->current_state) in dc_set_power_state()
5884 if (dc->current_state) in dc_mclk_switch_using_fw_based_vblank_stretch_shut_down()
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A Ddc_link_enc_cfg.c59 if (dc->current_state->res_ctx.link_enc_cfg_ctx.mode == LINK_ENC_CFG_TRANSIENT) in get_assignment()
62 assignment = dc->current_state->res_ctx.link_enc_cfg_ctx.link_enc_assignments[i]; in get_assignment()
300 for (i = 0; i < dc->current_state->stream_count; i++) in link_enc_cfg_link_encs_assign()
301 dc->res_pool->funcs->link_enc_unassign(state, dc->current_state->streams[i]); in link_enc_cfg_link_encs_assign()
326 if (state != dc->current_state) { in link_enc_cfg_link_encs_assign()
327 struct dc_state *prev_state = dc->current_state; in link_enc_cfg_link_encs_assign()
400 dc->current_state->res_ctx.link_enc_cfg_ctx.transient_assignments[i] = in link_enc_cfg_link_encs_assign()
407 dc->current_state->res_ctx.link_enc_cfg_ctx.link_enc_assignments[i]; in link_enc_cfg_link_encs_assign()
584 dc->current_state->res_ctx.link_enc_cfg_ctx.link_enc_assignments[i]; in link_enc_cfg_get_link_enc_used_by_stream_current()
736 if (current_state->res_ctx.link_enc_cfg_ctx.transient_assignments[i].valid) in link_enc_cfg_set_transient_mode()
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A Ddc_stream.c238 res_ctx = &dc->current_state->res_ctx; in program_cursor_attributes()
367 res_ctx = &dc->current_state->res_ctx; in program_cursor_position()
522 if (!dc->hwss.update_bandwidth(dc, dc->current_state)) { in dc_stream_add_writeback()
618 if (!dc->hwss.update_bandwidth(dc, dc->current_state)) { in dc_stream_remove_writeback()
641 &dc->current_state->res_ctx; in dc_stream_get_vblank_counter()
671 res_ctx = &dc->current_state->res_ctx; in dc_stream_send_dp_sdp()
704 &dc->current_state->res_ctx; in dc_stream_get_scanoutpos()
736 pipe = &dc->current_state->res_ctx.pipe_ctx[i]; in dc_stream_dmdata_status_done()
766 pipe_ctx = &dc->current_state->res_ctx.pipe_ctx[i]; in dc_stream_set_dynamic_metadata()
1209 if (dc->current_state) in dc_stream_is_cursor_limit_pending()
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A Ddc_surface.c129 if (dc->current_state == NULL) in dc_plane_get_status()
135 &dc->current_state->res_ctx.pipe_ctx[i]; in dc_plane_get_status()
150 &dc->current_state->res_ctx.pipe_ctx[i]; in dc_plane_get_status()
286 if (!dc || !dc->current_state) in dc_plane_force_dcc_and_tiling_disable()
290 struct pipe_ctx *pipe_ctx = &dc->current_state->res_ctx.pipe_ctx[i]; in dc_plane_force_dcc_and_tiling_disable()
A Ddc_state.c285 dc_state_copy(dst_state, dc->current_state); in dc_state_copy_current()
290 return dc_state_create_copy(dc->current_state); in dc_state_create_current_copy()
417 dc->current_state, dc->res_pool, stream, 1); in dc_state_remove_stream()
491 dc->current_state, pool, otg_master_pipe, plane_state); in dc_state_add_plane()
497 dc->current_state, in dc_state_add_plane()
500 dc->current_state, pool, in dc_state_add_plane()
509 dc->current_state, dc->res_pool, stream, in dc_state_add_plane()
513 dc->current_state, pool, in dc_state_add_plane()
982 if (dc->current_state) in dc_state_is_fams2_in_use()
983 is_fams2_in_use |= dc->current_state->bw_ctx.bw.dcn.fams2_global_config.features.bits.enable; in dc_state_is_fams2_in_use()
/drivers/scsi/elx/libefc/
A Defc_sm.c24 if (!ctx->current_state) in efc_sm_post_event()
27 ctx->current_state(ctx, evt, data); in efc_sm_post_event()
37 if (ctx->current_state == state) { in efc_sm_transition()
41 ctx->current_state = state; in efc_sm_transition()
/drivers/gpu/drm/amd/display/dc/hwss/dcn32/
A Ddcn32_hwseq.c209 if (i == dc->current_state->stream_count) in dcn32_check_no_memory_request_for_cab()
266 if (dc->current_state->streams[i] != NULL && in dcn32_apply_idle_power_optimizations()
268 (dc->current_state->stream_count > 1 || (!dc->current_state->streams[i]->dpms_off && in dcn32_apply_idle_power_optimizations()
772 dc->current_state, in dcn32_initialize_min_clocks()
874 hws->funcs.init_pipes(dc, dc->current_state); in dcn32_init_hw()
1253 pipe = &dc->current_state->res_ctx.pipe_ctx[i]; in dcn32_resync_fifo_dccg_dio()
1254 dc_state = dc->current_state; in dcn32_resync_fifo_dccg_dio()
1274 pipe = &dc->current_state->res_ctx.pipe_ctx[i]; in dcn32_resync_fifo_dccg_dio()
1297 dc_trigger_sync(dc, dc->current_state); in dcn32_resync_fifo_dccg_dio()
1541 &dc->current_state->res_ctx.pipe_ctx[i]; in dcn32_disable_phantom_streams()
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/drivers/platform/x86/siemens/
A Dsimatic-ipc-batt.c38 long current_state; member
96 priv.current_state = simatic_ipc_batt_read_io(dev); in simatic_ipc_batt_read_value()
98 priv.current_state = simatic_ipc_batt_read_gpio(); in simatic_ipc_batt_read_value()
101 if (priv.current_state < SIMATIC_IPC_BATT_LEVEL_FULL) in simatic_ipc_batt_read_value()
105 return priv.current_state; in simatic_ipc_batt_read_value()
/drivers/gpu/drm/amd/display/dc/hwss/dcn401/
A Ddcn401_hwseq.c79 dc->current_state, in dcn401_initialize_min_clocks()
238 hws->funcs.init_pipes(dc, dc->current_state); in dcn401_init_hw()
1265 if (!dc->ctx->dmub_srv || !dc->current_state) in dcn401_apply_idle_power_optimizations()
1270 if (dc->current_state->streams[i] != NULL && in dcn401_apply_idle_power_optimizations()
1523 &dc->current_state->res_ctx, in update_dsc_for_odm_change()
1627 if (dc->current_state) { in dcn401_hardware_release()
1884 &dc->current_state->res_ctx.pipe_ctx[i]; in dcn401_reset_hw_ctx_wrap()
2121 dc->hwss.detect_pipe_changes(dc->current_state, context, &dc->current_state->res_ctx.pipe_ctx[i], in dcn401_program_front_end_for_ctx()
2177 &dc->current_state->res_ctx.pipe_ctx[i]); in dcn401_program_front_end_for_ctx()
2257 &dc->current_state->res_ctx.pipe_ctx[i]); in dcn401_post_unlock_program_front_end()
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/drivers/pwm/
A Dpwm-keembay.c123 struct pwm_state current_state; in keembay_pwm_apply() local
139 keembay_pwm_get_state(chip, pwm, &current_state); in keembay_pwm_apply()
142 if (current_state.enabled) in keembay_pwm_apply()
173 if (state->enabled && !current_state.enabled) in keembay_pwm_apply()
/drivers/thermal/
A Dcpuidle_cooling.c129 unsigned long current_state = idle_cdev->state; in cpuidle_cooling_set_cur_state() local
140 if (current_state == 0 && state > 0) { in cpuidle_cooling_set_cur_state()
142 } else if (current_state > 0 && !state) { in cpuidle_cooling_set_cur_state()
/drivers/gpu/drm/amd/display/dc/hwss/dcn30/
A Ddcn30_hwseq.c733 hws->funcs.init_pipes(dc, dc->current_state); in dcn30_init_hw()
921 if (dc->current_state) { in dcn30_apply_idle_power_optimizations()
925 for (i = 0; i < dc->current_state->stream_count; i++) { in dcn30_apply_idle_power_optimizations()
926 if (dc->current_state->stream_status[i].plane_count) in dcn30_apply_idle_power_optimizations()
931 if (i == dc->current_state->stream_count) { in dcn30_apply_idle_power_optimizations()
943 stream = dc->current_state->streams[0]; in dcn30_apply_idle_power_optimizations()
964 if (dc->current_state->stream_count == 1 && in dcn30_apply_idle_power_optimizations()
966 dc->current_state->stream_status[0].plane_count == 1 && in dcn30_apply_idle_power_optimizations()
1146 dc_dmub_setup_subvp_dmub_command(dc, dc->current_state, false); in dcn30_hardware_release()
1153 struct pipe_ctx *pipe = &dc->current_state->res_ctx.pipe_ctx[i]; in dcn30_hardware_release()
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/drivers/net/wireless/broadcom/b43/
A Dlo.c555 int current_state; member
591 if (d->current_state == 0) { in lo_probe_possible_loctls()
595 begin = d->current_state - 1; in lo_probe_possible_loctls()
596 end = d->current_state + 1; in lo_probe_possible_loctls()
598 begin = d->current_state - 2; in lo_probe_possible_loctls()
599 end = d->current_state + 2; in lo_probe_possible_loctls()
608 d->current_state = i; in lo_probe_possible_loctls()
638 d->current_state = i; in lo_probe_possible_loctls()
680 d.current_state = 0; in lo_probe_loctls_statemachine()
683 (d.current_state >= 0 in lo_probe_loctls_statemachine()
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/drivers/md/dm-vdo/
A Dadmin-state.h53 const struct admin_state_code *current_state; member
72 return READ_ONCE(state->current_state); in vdo_get_admin_state_code()
84 WRITE_ONCE(state->current_state, code); in vdo_set_admin_state_code()
/drivers/gpu/drm/amd/display/amdgpu_dm/
A Damdgpu_dm_psr.c118 mod_power_only_edp(dc->current_state, stream); in amdgpu_dm_link_setup_psr()
232 for (i = 0; i < dm->dc->current_state->stream_count ; i++) { in amdgpu_dm_psr_is_active_allowed()
234 struct dc_stream_state *stream = dm->dc->current_state->streams[i]; in amdgpu_dm_psr_is_active_allowed()
/drivers/gpu/drm/amd/display/dc/dcn10/
A Ddcn10_hw_sequencer_debug.c435 …pix_clk = dc->current_state->res_ctx.pipe_ctx[i].stream_res.pix_clk_params.requested_pix_clk_100hz… in dcn10_get_otg_states()
478 dc->current_state->bw_ctx.bw.dcn.clk.dcfclk_khz, in dcn10_get_clock_states()
479 dc->current_state->bw_ctx.bw.dcn.clk.dcfclk_deep_sleep_khz, in dcn10_get_clock_states()
480 dc->current_state->bw_ctx.bw.dcn.clk.dispclk_khz, in dcn10_get_clock_states()
481 dc->current_state->bw_ctx.bw.dcn.clk.dppclk_khz, in dcn10_get_clock_states()
482 dc->current_state->bw_ctx.bw.dcn.clk.fclk_khz, in dcn10_get_clock_states()
483 dc->current_state->bw_ctx.bw.dcn.clk.socclk_khz); in dcn10_get_clock_states()
/drivers/acpi/acpica/
A Dacconvert.h36 cv_process_comment(struct asl_comment_state current_state,
40 cv_process_comment_type2(struct asl_comment_state current_state,
/drivers/gpu/drm/radeon/
A Drs780_dpm.c380 struct igp_ps *current_state = rs780_get_ps(rdev->pm.dpm.current_ps); in rs780_force_voltage() local
382 if ((current_state->max_voltage == RS780_VDDC_LEVEL_HIGH) && in rs780_force_voltage()
383 (current_state->min_voltage == RS780_VDDC_LEVEL_HIGH)) in rs780_force_voltage()
407 struct igp_ps *current_state = rs780_get_ps(rdev->pm.dpm.current_ps); in rs780_force_fbdiv() local
409 if (current_state->sclk_low == current_state->sclk_high) in rs780_force_fbdiv()
568 struct igp_ps *current_state = rs780_get_ps(old_ps); in rs780_set_uvd_clock_before_set_eng_clock() local
574 if (new_state->sclk_high >= current_state->sclk_high) in rs780_set_uvd_clock_before_set_eng_clock()
585 struct igp_ps *current_state = rs780_get_ps(old_ps); in rs780_set_uvd_clock_after_set_eng_clock() local
591 if (new_state->sclk_high < current_state->sclk_high) in rs780_set_uvd_clock_after_set_eng_clock()
/drivers/platform/x86/intel/atomisp2/
A Dpm.c104 pdev->current_state = PCI_D3cold; in isp_pci_suspend()
115 pdev->current_state = PCI_D0; in isp_pci_resume()
/drivers/gpu/drm/amd/display/dc/hwss/dcn20/
A Ddcn20_hwseq.c2067 if (dc->current_state->res_ctx.pipe_ctx[i].plane_state) in dcn20_program_front_end_for_ctx()
2082 dcn20_detect_pipe_changes(dc->current_state, context, &dc->current_state->res_ctx.pipe_ctx[i], in dcn20_program_front_end_for_ctx()
2091 pipe = &dc->current_state->res_ctx.pipe_ctx[i]; in dcn20_program_front_end_for_ctx()
2136 hws->funcs.plane_atomic_disconnect(dc, dc->current_state, in dcn20_program_front_end_for_ctx()
2137 &dc->current_state->res_ctx.pipe_ctx[i]); in dcn20_program_front_end_for_ctx()
2194 dc->current_state->stream_status[0].plane_count == 1 && in dcn20_program_front_end_for_ctx()
2252 &dc->current_state->res_ctx.pipe_ctx[i]); in dcn20_post_unlock_program_front_end()
2256 dc->hwss.disable_plane(dc, dc->current_state, &dc->current_state->res_ctx.pipe_ctx[i]); in dcn20_post_unlock_program_front_end()
2355 if (dc->current_state->stream_status[0].plane_count == 1 && in dcn20_post_unlock_program_front_end()
2905 &dc->current_state->res_ctx.pipe_ctx[i]; in dcn20_reset_hw_ctx_wrap()
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