| /drivers/gpu/drm/amd/display/dmub/src/ |
| A D | dmub_dcn30.c | 88 const struct dmub_window *cw0, in dmub_dcn30_backdoor_load() argument
100 dmub_dcn30_translate_addr(&cw0->offset, fb_base, fb_offset, &offset); in dmub_dcn30_backdoor_load()
104 REG_WRITE(DMCUB_REGION3_CW0_BASE_ADDRESS, cw0->region.base); in dmub_dcn30_backdoor_load()
106 DMCUB_REGION3_CW0_TOP_ADDRESS, cw0->region.top, in dmub_dcn30_backdoor_load()
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| A D | dmub_dcn35.c | 163 const struct dmub_window *cw0, in dmub_dcn35_backdoor_load() argument
171 dmub_dcn35_translate_addr(&cw0->offset, fb_base, fb_offset, &offset); in dmub_dcn35_backdoor_load()
175 REG_WRITE(DMCUB_REGION3_CW0_BASE_ADDRESS, cw0->region.base); in dmub_dcn35_backdoor_load()
177 DMCUB_REGION3_CW0_TOP_ADDRESS, cw0->region.top, in dmub_dcn35_backdoor_load()
194 const struct dmub_window *cw0, in dmub_dcn35_backdoor_load_zfb_mode() argument
200 offset = cw0->offset; in dmub_dcn35_backdoor_load_zfb_mode()
203 REG_WRITE(DMCUB_REGION3_CW0_BASE_ADDRESS, cw0->region.base); in dmub_dcn35_backdoor_load_zfb_mode()
205 DMCUB_REGION3_CW0_TOP_ADDRESS, cw0->region.top, in dmub_dcn35_backdoor_load_zfb_mode()
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| A D | dmub_dcn32.c | 152 const struct dmub_window *cw0, in dmub_dcn32_backdoor_load() argument
162 dmub_dcn32_translate_addr(&cw0->offset, fb_base, fb_offset, &offset); in dmub_dcn32_backdoor_load()
166 REG_WRITE(DMCUB_REGION3_CW0_BASE_ADDRESS, cw0->region.base); in dmub_dcn32_backdoor_load()
168 DMCUB_REGION3_CW0_TOP_ADDRESS, cw0->region.top, in dmub_dcn32_backdoor_load()
185 const struct dmub_window *cw0, in dmub_dcn32_backdoor_load_zfb_mode() argument
192 offset = cw0->offset; in dmub_dcn32_backdoor_load_zfb_mode()
196 REG_WRITE(DMCUB_REGION3_CW0_BASE_ADDRESS, cw0->region.base); in dmub_dcn32_backdoor_load_zfb_mode()
198 DMCUB_REGION3_CW0_TOP_ADDRESS, cw0->region.top, in dmub_dcn32_backdoor_load_zfb_mode()
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| A D | dmub_dcn401.c | 127 const struct dmub_window *cw0, in dmub_dcn401_backdoor_load() argument
140 dmub_dcn401_translate_addr(&cw0->offset, fb_base, fb_offset, &offset); in dmub_dcn401_backdoor_load()
144 REG_WRITE(DMCUB_REGION3_CW0_BASE_ADDRESS, cw0->region.base); in dmub_dcn401_backdoor_load()
146 DMCUB_REGION3_CW0_TOP_ADDRESS, cw0->region.top, in dmub_dcn401_backdoor_load()
164 const struct dmub_window *cw0, in dmub_dcn401_backdoor_load_zfb_mode() argument
174 offset = cw0->offset; in dmub_dcn401_backdoor_load_zfb_mode()
178 REG_WRITE(DMCUB_REGION3_CW0_BASE_ADDRESS, cw0->region.base); in dmub_dcn401_backdoor_load_zfb_mode()
180 DMCUB_REGION3_CW0_TOP_ADDRESS, cw0->region.top, in dmub_dcn401_backdoor_load_zfb_mode()
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| A D | dmub_dcn20.c | 155 const struct dmub_window *cw0, in dmub_dcn20_backdoor_load() argument
167 dmub_dcn20_translate_addr(&cw0->offset, fb_base, fb_offset, &offset); in dmub_dcn20_backdoor_load()
171 REG_WRITE(DMCUB_REGION3_CW0_BASE_ADDRESS, cw0->region.base); in dmub_dcn20_backdoor_load()
173 DMCUB_REGION3_CW0_TOP_ADDRESS, cw0->region.top, in dmub_dcn20_backdoor_load()
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| A D | dmub_dcn31.c | 158 const struct dmub_window *cw0, in dmub_dcn31_backdoor_load() argument
168 dmub_dcn31_translate_addr(&cw0->offset, fb_base, fb_offset, &offset); in dmub_dcn31_backdoor_load()
172 REG_WRITE(DMCUB_REGION3_CW0_BASE_ADDRESS, cw0->region.base); in dmub_dcn31_backdoor_load()
174 DMCUB_REGION3_CW0_TOP_ADDRESS, cw0->region.top, in dmub_dcn31_backdoor_load()
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| A D | dmub_dcn30.h | 38 const struct dmub_window *cw0,
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| A D | dmub_srv.c | 660 struct dmub_window cw0, cw1, cw2, cw3, cw4, cw5, cw6, region6; in dmub_srv_hw_init() local
682 cw0.offset.quad_part = inst_fb->gpu_addr; in dmub_srv_hw_init()
683 cw0.region.base = DMUB_CW0_BASE; in dmub_srv_hw_init()
684 cw0.region.top = cw0.region.base + inst_fb->size - 1; in dmub_srv_hw_init()
703 dmub->hw_funcs.backdoor_load_zfb_mode(dmub, &cw0, &cw1); in dmub_srv_hw_init()
705 dmub->hw_funcs.backdoor_load(dmub, &cw0, &cw1); in dmub_srv_hw_init()
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| A D | dmub_dcn32.h | 197 const struct dmub_window *cw0,
201 const struct dmub_window *cw0,
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| A D | dmub_dcn35.h | 210 const struct dmub_window *cw0,
214 const struct dmub_window *cw0,
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| A D | dmub_dcn401.h | 207 const struct dmub_window *cw0,
211 const struct dmub_window *cw0,
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| A D | dmub_dcn20.h | 192 const struct dmub_window *cw0,
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| A D | dmub_dcn31.h | 194 const struct dmub_window *cw0,
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| /drivers/gpu/drm/amd/display/dmub/ |
| A D | dmub_srv.h | 412 const struct dmub_window *cw0,
416 const struct dmub_window *cw0,
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