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Searched refs:d1vga_control (Results 1 – 10 of 10) sorted by relevance

/drivers/gpu/drm/radeon/
A Dradeon_bios.c253 u32 d1vga_control; in ni_read_disabled_bios() local
260 d1vga_control = RREG32(AVIVO_D1VGA_CONTROL); in ni_read_disabled_bios()
285 WREG32(AVIVO_D1VGA_CONTROL, d1vga_control); in ni_read_disabled_bios()
297 uint32_t d1vga_control; in r700_read_disabled_bios() local
307 d1vga_control = RREG32(AVIVO_D1VGA_CONTROL); in r700_read_disabled_bios()
355 WREG32(AVIVO_D1VGA_CONTROL, d1vga_control); in r700_read_disabled_bios()
366 uint32_t d1vga_control; in r600_read_disabled_bios() local
380 d1vga_control = RREG32(AVIVO_D1VGA_CONTROL); in r600_read_disabled_bios()
426 WREG32(AVIVO_D1VGA_CONTROL, d1vga_control); in r600_read_disabled_bios()
444 uint32_t d1vga_control; in avivo_read_disabled_bios() local
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/drivers/gpu/drm/amd/amdgpu/
A Dcik.c970 u32 d1vga_control = 0; in cik_read_disabled_bios() local
978 d1vga_control = RREG32(mmD1VGA_CONTROL); in cik_read_disabled_bios()
989 (d1vga_control & ~(D1VGA_CONTROL__D1VGA_MODE_ENABLE_MASK | in cik_read_disabled_bios()
1004 WREG32(mmD1VGA_CONTROL, d1vga_control); in cik_read_disabled_bios()
A Dvi.c593 u32 d1vga_control = 0; in vi_read_disabled_bios() local
601 d1vga_control = RREG32(mmD1VGA_CONTROL); in vi_read_disabled_bios()
612 (d1vga_control & ~(D1VGA_CONTROL__D1VGA_MODE_ENABLE_MASK | in vi_read_disabled_bios()
627 WREG32(mmD1VGA_CONTROL, d1vga_control); in vi_read_disabled_bios()
A Dgmc_v11_0.c505 u32 d1vga_control = RREG32_SOC15(DCE, 0, regD1VGA_CONTROL); in gmc_v11_0_get_vbios_fb_size() local
508 if (REG_GET_FIELD(d1vga_control, D1VGA_CONTROL, D1VGA_MODE_ENABLE)) { in gmc_v11_0_get_vbios_fb_size()
A Dsi.c1275 u32 d1vga_control = 0; in si_read_disabled_bios() local
1283 d1vga_control = RREG32(mmD1VGA_CONTROL); in si_read_disabled_bios()
1294 (d1vga_control & ~(D1VGA_CONTROL__D1VGA_MODE_ENABLE_MASK | in si_read_disabled_bios()
1309 WREG32(mmD1VGA_CONTROL, d1vga_control); in si_read_disabled_bios()
A Dgmc_v10_0.c541 u32 d1vga_control = RREG32_SOC15(DCE, 0, mmD1VGA_CONTROL); in gmc_v10_0_get_vbios_fb_size() local
544 if (REG_GET_FIELD(d1vga_control, D1VGA_CONTROL, D1VGA_MODE_ENABLE)) { in gmc_v10_0_get_vbios_fb_size()
A Dgmc_v6_0.c797 u32 d1vga_control = RREG32(mmD1VGA_CONTROL); in gmc_v6_0_get_vbios_fb_size() local
800 if (REG_GET_FIELD(d1vga_control, D1VGA_CONTROL, D1VGA_MODE_ENABLE)) { in gmc_v6_0_get_vbios_fb_size()
A Dgmc_v7_0.c966 u32 d1vga_control = RREG32(mmD1VGA_CONTROL); in gmc_v7_0_get_vbios_fb_size() local
969 if (REG_GET_FIELD(d1vga_control, D1VGA_CONTROL, D1VGA_MODE_ENABLE)) { in gmc_v7_0_get_vbios_fb_size()
A Dgmc_v8_0.c1072 u32 d1vga_control = RREG32(mmD1VGA_CONTROL); in gmc_v8_0_get_vbios_fb_size() local
1075 if (REG_GET_FIELD(d1vga_control, D1VGA_CONTROL, D1VGA_MODE_ENABLE)) { in gmc_v8_0_get_vbios_fb_size()
A Dgmc_v9_0.c1338 u32 d1vga_control = RREG32_SOC15(DCE, 0, mmD1VGA_CONTROL); in gmc_v9_0_get_vbios_fb_size() local
1343 if (REG_GET_FIELD(d1vga_control, D1VGA_CONTROL, D1VGA_MODE_ENABLE)) { in gmc_v9_0_get_vbios_fb_size()

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