| /drivers/misc/ocxl/ |
| A D | trace.h | 135 TP_PROTO(void *spa, u64 pe, u64 dsisr, u64 dar, u64 tfc),
136 TP_ARGS(spa, pe, dsisr, dar, tfc),
142 __field(u64, dar)
150 __entry->dar = dar;
158 __entry->dar,
164 TP_PROTO(void *spa, u64 pe, u64 dsisr, u64 dar, u64 tfc),
165 TP_ARGS(spa, pe, dsisr, dar, tfc)
169 TP_PROTO(void *spa, u64 pe, u64 dsisr, u64 dar, u64 tfc),
170 TP_ARGS(spa, pe, dsisr, dar, tfc)
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| A D | link.c | 73 u64 dar; member
108 static void read_irq(struct spa *spa, u64 *dsisr, u64 *dar, u64 *pe) in read_irq() argument
113 *dar = in_be64(spa->reg_dar); in read_irq()
132 spa->xsl_fault.dsisr, spa->xsl_fault.dar, reg); in ack_irq()
159 fault->dar, fault->dsisr); in xsl_fault_handler_bh()
175 if (get_region_id(fault->dar) != USER_REGION_ID) in xsl_fault_handler_bh()
179 hash_page_mm(fault->pe_data.mm, fault->dar, access, 0x300, in xsl_fault_handler_bh()
193 u64 dsisr, dar, pe_handle; in xsl_fault_handler() local
199 read_irq(spa, &dsisr, &dar, &pe_handle); in xsl_fault_handler()
200 trace_ocxl_fault(spa->spa_mem, pe_handle, dsisr, dar, -1); in xsl_fault_handler()
[all …]
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| /drivers/dma/dw-edma/ |
| A D | dw-hdma-v0-core.c | 156 u32 control, u32 size, u64 sar, u64 dar) in dw_hdma_v0_write_ll_data() argument
166 lli->dar.reg = dar; in dw_hdma_v0_write_ll_data()
173 writeq(dar, &lli->dar.reg); in dw_hdma_v0_write_ll_data()
205 child->sar, child->dar); in dw_hdma_v0_core_write_chunk()
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| A D | dw-edma-v0-core.c | 280 u32 control, u32 size, u64 sar, u64 dar) in dw_edma_v0_write_ll_data() argument
290 lli->dar.reg = dar; in dw_edma_v0_write_ll_data()
297 writeq(dar, &lli->dar.reg); in dw_edma_v0_write_ll_data()
339 child->sar, child->dar); in dw_edma_v0_core_write_chunk()
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| A D | dw-hdma-v0-regs.h | 54 } dar; member
114 } dar; member
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| A D | dw-edma-v0-regs.h | 44 } dar; member
218 } dar; member
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| A D | dw-hdma-v0-debugfs.c | 93 CTX_REGISTER(dw, dar.lsb, dir, ch), in dw_hdma_debugfs_regs_ch()
94 CTX_REGISTER(dw, dar.msb, dir, ch), in dw_hdma_debugfs_regs_ch()
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| A D | dw-edma-v0-debugfs.c | 128 CTX_REGISTER(dw, dar.lsb, dir, ch), in dw_edma_debugfs_regs_ch()
129 CTX_REGISTER(dw, dar.msb, dir, ch), in dw_edma_debugfs_regs_ch()
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| A D | dw-edma-core.c | 476 burst->dar = xfer->xfer.cyclic.paddr; in dw_edma_device_transfer()
479 burst->dar = sg_dma_address(sg); in dw_edma_device_transfer()
488 burst->dar = dst_addr; in dw_edma_device_transfer()
491 burst->dar = dst_addr; in dw_edma_device_transfer()
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| A D | dw-edma-core.h | 48 u64 dar; member
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| /drivers/dma/ |
| A D | idma64.c | 242 u64 sar, dar; in idma64_hw_desc_fill() local
249 dar = config->dst_addr; in idma64_hw_desc_fill()
256 dar = hw->phys; in idma64_hw_desc_fill()
260 dst_width = __ffs(dar | hw->len | 4); in idma64_hw_desc_fill()
264 lli->dar = dar; in idma64_hw_desc_fill()
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| A D | idma64.h | 98 u64 dar; member
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| A D | fsldma.h | 112 u64 dar; /* 0x18 - Destination Address Register */ member
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| /drivers/dma/sh/ |
| A D | shdma.h | 46 u32 dar; /* DAR / destination address */ member
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| A D | shdmac.c | 217 sh_dmae_writel(sh_chan, hw->dar, DAR); in dmae_set_reg()
290 sh_desc->hw.tcr, sh_desc->hw.sar, sh_desc->hw.dar); in sh_dmae_start_xfer()
387 sh_desc->hw.dar = dst; in sh_dmae_desc_setup()
463 (sh_desc->hw.dar + sh_desc->hw.tcr) == dar_buf) || in sh_dmae_desc_completed()
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| A D | rcar-dmac.c | 50 u32 dar; member
773 hwdesc->dar = chunk->dst_addr; in rcar_dmac_fill_hwdesc()
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| /drivers/comedi/drivers/ |
| A D | mite.h | 26 u32 dar; member
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| /drivers/dma/dw/ |
| A D | core.c | 162 channel_writel(dwc, DAR, lli_read(desc, dar)); in dwc_do_single_block()
415 lli_read(desc, dar), in dwc_dump_lli()
584 lli_write(desc, dar, dest + offset); in dwc_prep_dma_memcpy()
672 lli_write(desc, dar, reg); in dwc_prep_slave_sg()
720 lli_write(desc, dar, mem); in dwc_prep_slave_sg()
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| A D | regs.h | 372 __le32 dar; member
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| /drivers/dma/dw-axi-dmac/ |
| A D | dw-axi-dmac.h | 79 __le64 dar; member
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| A D | dw-axi-dmac-platform.c | 621 desc->lli->dar = cpu_to_le64(adr); in write_desc_dar()
1044 le64_to_cpu(desc->lli->dar), in axi_chan_dump_lli()
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