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/drivers/gpu/drm/amd/amdgpu/
A Dmmhub_v2_3.c495 uint32_t def, data, def1, data1; in mmhub_v2_3_update_medium_grain_clock_gating() local
502 data1 &= ~(DAGB0_CNTL_MISC2__DISABLE_WRREQ_CG_MASK | in mmhub_v2_3_update_medium_grain_clock_gating()
511 data1 |= (DAGB0_CNTL_MISC2__DISABLE_WRREQ_CG_MASK | in mmhub_v2_3_update_medium_grain_clock_gating()
521 if (def1 != data1) in mmhub_v2_3_update_medium_grain_clock_gating()
522 WREG32_SOC15(MMHUB, 0, mmDAGB0_CNTL_MISC2, data1); in mmhub_v2_3_update_medium_grain_clock_gating()
529 uint32_t def, data, def1, data1, def2, data2; in mmhub_v2_3_update_medium_grain_light_sleep() local
537 data1 &= ~(DAGB0_WR_CGTT_CLK_CTRL__LS_OVERRIDE_MASK | in mmhub_v2_3_update_medium_grain_light_sleep()
549 data1 |= (DAGB0_WR_CGTT_CLK_CTRL__LS_OVERRIDE_MASK | in mmhub_v2_3_update_medium_grain_light_sleep()
563 if (def1 != data1) in mmhub_v2_3_update_medium_grain_light_sleep()
564 WREG32_SOC15(MMHUB, 0, mmDAGB0_WR_CGTT_CLK_CTRL, data1); in mmhub_v2_3_update_medium_grain_light_sleep()
[all …]
A Dmmhub_v2_0.c566 uint32_t def, data, def1, data1; in mmhub_v2_0_update_medium_grain_clock_gating() local
579 def1 = data1 = RREG32_SOC15(MMHUB, 0, mmDAGB0_CNTL_MISC2); in mmhub_v2_0_update_medium_grain_clock_gating()
586 data1 &= ~(DAGB0_CNTL_MISC2__DISABLE_WRREQ_CG_MASK | in mmhub_v2_0_update_medium_grain_clock_gating()
596 data1 |= (DAGB0_CNTL_MISC2__DISABLE_WRREQ_CG_MASK | in mmhub_v2_0_update_medium_grain_clock_gating()
608 if (def1 != data1) in mmhub_v2_0_update_medium_grain_clock_gating()
609 WREG32_SOC15(MMHUB, 0, mmDAGB0_CNTL_MISC2_Sienna_Cichlid, data1); in mmhub_v2_0_update_medium_grain_clock_gating()
614 if (def1 != data1) in mmhub_v2_0_update_medium_grain_clock_gating()
615 WREG32_SOC15(MMHUB, 0, mmDAGB0_CNTL_MISC2, data1); in mmhub_v2_0_update_medium_grain_clock_gating()
674 u32 data, data1; in mmhub_v2_0_get_clockgating() local
691 data1 = RREG32_SOC15(MMHUB, 0, mmDAGB0_CNTL_MISC2); in mmhub_v2_0_get_clockgating()
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A Dvcn_sw_ring.c69 uint32_t data0, data1, mask; in vcn_dec_sw_ring_emit_vm_flush() local
75 data1 = lower_32_bits(pd_addr); in vcn_dec_sw_ring_emit_vm_flush()
77 vcn_dec_sw_ring_emit_reg_wait(ring, data0, data1, mask); in vcn_dec_sw_ring_emit_vm_flush()
A Duvd_v5_0.c635 uint32_t data1, data3, suvd_flags; in uvd_v5_0_enable_clock_gating() local
637 data1 = RREG32(mmUVD_SUVD_CGC_GATE); in uvd_v5_0_enable_clock_gating()
669 data1 |= suvd_flags; in uvd_v5_0_enable_clock_gating()
672 data1 = 0; in uvd_v5_0_enable_clock_gating()
675 WREG32(mmUVD_SUVD_CGC_GATE, data1); in uvd_v5_0_enable_clock_gating()
729 uint32_t data, data1, cgc_flags, suvd_flags;
732 data1 = RREG32(mmUVD_SUVD_CGC_GATE);
760 data1 |= suvd_flags;
763 WREG32(mmUVD_SUVD_CGC_GATE, data1);
A Damdgpu_vf_error.c54 u32 data1, data2, data3; in amdgpu_vf_error_trans_all() local
77 data1 = AMDGIM_ERROR_CODE_FLAGS_TO_MAILBOX(adev->virt.vf_errors.code[index], in amdgpu_vf_error_trans_all()
82 adev->virt.ops->trans_msg(adev, IDH_LOG_VF_ERROR, data1, data2, data3); in amdgpu_vf_error_trans_all()
A Dmmhub_v1_0.c501 uint32_t def, data, def1, data1, def2 = 0, data2 = 0; in mmhub_v1_0_update_medium_grain_clock_gating() local
506 def1 = data1 = RREG32_SOC15(MMHUB, 0, mmDAGB0_CNTL_MISC2); in mmhub_v1_0_update_medium_grain_clock_gating()
509 def1 = data1 = RREG32_SOC15(MMHUB, 0, mmDAGB0_CNTL_MISC2_RV); in mmhub_v1_0_update_medium_grain_clock_gating()
514 data1 &= ~(DAGB0_CNTL_MISC2__DISABLE_WRREQ_CG_MASK | in mmhub_v1_0_update_medium_grain_clock_gating()
531 data1 |= (DAGB0_CNTL_MISC2__DISABLE_WRREQ_CG_MASK | in mmhub_v1_0_update_medium_grain_clock_gating()
550 if (def1 != data1) { in mmhub_v1_0_update_medium_grain_clock_gating()
552 WREG32_SOC15(MMHUB, 0, mmDAGB0_CNTL_MISC2, data1); in mmhub_v1_0_update_medium_grain_clock_gating()
554 WREG32_SOC15(MMHUB, 0, mmDAGB0_CNTL_MISC2_RV, data1); in mmhub_v1_0_update_medium_grain_clock_gating()
603 int data, data1; in mmhub_v1_0_get_clockgating() local
610 data1 = RREG32_SOC15(MMHUB, 0, mmDAGB0_CNTL_MISC2); in mmhub_v1_0_get_clockgating()
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A Dmxgpu_nv.c138 enum idh_request req, u32 data1, u32 data2, u32 data3) in xgpu_nv_mailbox_trans_msg() argument
158 dev_dbg(adev->dev, "trans_msg req = 0x%x, data1 = 0x%x\n", req, data1); in xgpu_nv_mailbox_trans_msg()
160 WREG32_NO_KIQ(mmMAILBOX_MSGBUF_TRN_DW1, data1); in xgpu_nv_mailbox_trans_msg()
174 enum idh_request req, u32 data1, u32 data2, u32 data3) in xgpu_nv_send_access_requests_with_param() argument
184 xgpu_nv_mailbox_trans_msg(adev, req, data1, data2, data3); in xgpu_nv_send_access_requests_with_param()
196 if (data1 != 0) in xgpu_nv_send_access_requests_with_param()
/drivers/input/rmi4/
A Drmi_f12.c41 const struct rmi_register_desc_item *data1; member
171 int objects = f12->data1->num_subpackets; in rmi_f12_process_objects()
182 switch (data1[0]) { in rmi_f12_process_objects()
199 obj->x = (data1[2] << 8) | data1[1]; in rmi_f12_process_objects()
200 obj->y = (data1[4] << 8) | data1[3]; in rmi_f12_process_objects()
201 obj->z = data1[5]; in rmi_f12_process_objects()
202 obj->wx = data1[6]; in rmi_f12_process_objects()
203 obj->wy = data1[7]; in rmi_f12_process_objects()
207 data1 += F12_DATA1_BYTES_PER_OBJ; in rmi_f12_process_objects()
250 if (f12->data1) in rmi_f12_attention()
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/drivers/gpu/drm/xe/
A Dxe_pcode.c58 static int __pcode_mailbox_rw(struct xe_tile *tile, u32 mbox, u32 *data0, u32 *data1, in __pcode_mailbox_rw() argument
72 xe_mmio_write32(mmio, PCODE_DATA1, data1 ? *data1 : 0); in __pcode_mailbox_rw()
82 if (data1) in __pcode_mailbox_rw()
83 *data1 = xe_mmio_read32(mmio, PCODE_DATA1); in __pcode_mailbox_rw()
89 static int pcode_mailbox_rw(struct xe_tile *tile, u32 mbox, u32 *data0, u32 *data1, in pcode_mailbox_rw() argument
98 return __pcode_mailbox_rw(tile, mbox, data0, data1, timeout_ms, return_data, atomic); in pcode_mailbox_rw()
112 int xe_pcode_write64_timeout(struct xe_tile *tile, u32 mbox, u32 data0, u32 data1, int timeout) in xe_pcode_write64_timeout() argument
117 err = pcode_mailbox_rw(tile, mbox, &data0, &data1, timeout, false, false); in xe_pcode_write64_timeout()
/drivers/media/test-drivers/vivid/
A Dvivid-vbi-gen.c245 struct v4l2_sliced_vbi_data *data1 = vbi->data + 1; in vivid_vbi_gen_sliced() local
276 data1->id = V4L2_SLICED_CAPTION_525; in vivid_vbi_gen_sliced()
277 data1->field = 1; in vivid_vbi_gen_sliced()
278 data1->line = 21; in vivid_vbi_gen_sliced()
298 data1->data[0] = vbi->time_of_day_packet[frame * 2]; in vivid_vbi_gen_sliced()
299 data1->data[1] = vbi->time_of_day_packet[frame * 2 + 1]; in vivid_vbi_gen_sliced()
302 data1->data[0] = calc_parity(0); in vivid_vbi_gen_sliced()
303 data1->data[1] = calc_parity(0); in vivid_vbi_gen_sliced()
/drivers/media/usb/gspca/
A Dspca508.c1352 int data1, data2; in sd_config() local
1358 data1 = reg_read(gspca_dev, 0x8104); in sd_config()
1361 data2, data1); in sd_config()
1363 data1 = reg_read(gspca_dev, 0x8106); in sd_config()
1366 data2, data1); in sd_config()
1368 data1 = reg_read(gspca_dev, 0x8621); in sd_config()
1370 data1); in sd_config()
A Dpac7311.c616 u8 data0, data1; in sd_int_pkt_scan() local
620 data1 = data[1]; in sd_int_pkt_scan()
621 if ((data0 == 0x00 && data1 == 0x11) || in sd_int_pkt_scan()
622 (data0 == 0x22 && data1 == 0x33) || in sd_int_pkt_scan()
623 (data0 == 0x44 && data1 == 0x55) || in sd_int_pkt_scan()
624 (data0 == 0x66 && data1 == 0x77) || in sd_int_pkt_scan()
625 (data0 == 0x88 && data1 == 0x99) || in sd_int_pkt_scan()
626 (data0 == 0xaa && data1 == 0xbb) || in sd_int_pkt_scan()
627 (data0 == 0xcc && data1 == 0xdd) || in sd_int_pkt_scan()
628 (data0 == 0xee && data1 == 0xff)) { in sd_int_pkt_scan()
A Dpac7302.c865 u8 data0, data1; in sd_int_pkt_scan() local
869 data1 = data[1]; in sd_int_pkt_scan()
870 if ((data0 == 0x00 && data1 == 0x11) || in sd_int_pkt_scan()
871 (data0 == 0x22 && data1 == 0x33) || in sd_int_pkt_scan()
872 (data0 == 0x44 && data1 == 0x55) || in sd_int_pkt_scan()
873 (data0 == 0x66 && data1 == 0x77) || in sd_int_pkt_scan()
874 (data0 == 0x88 && data1 == 0x99) || in sd_int_pkt_scan()
875 (data0 == 0xaa && data1 == 0xbb) || in sd_int_pkt_scan()
876 (data0 == 0xcc && data1 == 0xdd) || in sd_int_pkt_scan()
877 (data0 == 0xee && data1 == 0xff)) { in sd_int_pkt_scan()
A Dt613.c86 const u8 data1[10]; member
144 .data1 =
166 .data1 =
188 .data1 =
209 .data1 = {0xc0, 0x38, 0x08, 0x10, 0xc0, 0x30, 0x10, 0x40,
642 reg_w_ixbuf(gspca_dev, 0xd0, sensor->data1, sizeof sensor->data1); in sd_init()
664 reg_w_ixbuf(gspca_dev, 0xd0, sensor->data1, sizeof sensor->data1); in sd_init()
/drivers/input/joystick/
A Dturbografx.c77 int data1, data2, i; in tgfx_timer() local
85 data1 = parport_read_status(tgfx->pd->port) ^ 0x7f; in tgfx_timer()
88 input_report_abs(dev, ABS_X, !!(data1 & TGFX_RIGHT) - !!(data1 & TGFX_LEFT)); in tgfx_timer()
89 input_report_abs(dev, ABS_Y, !!(data1 & TGFX_DOWN ) - !!(data1 & TGFX_UP )); in tgfx_timer()
91 input_report_key(dev, BTN_TRIGGER, (data1 & TGFX_TRIGGER)); in tgfx_timer()
/drivers/net/wireless/intel/iwlwifi/fw/
A Ddump.c38 u32 data1; /* error-specific data */ member
92 u32 data1; /* error-specific data */ member
160 IWL_ERR(fwrt, "0x%08X | umac data1\n", table.data1); in iwl_fwrt_dump_umac_error_log()
240 IWL_ERR(fwrt, "0x%08X | data1\n", table.data1); in iwl_fwrt_dump_lmac_error_log()
283 u32 data1, data2, data3; member
323 IWL_ERR(fwrt, "0x%08X | tcm data1\n", table.data1); in iwl_fwrt_dump_tcm_error_log()
352 u32 data1, data2, data3; member
418 u32 error, data1; in iwl_fwrt_dump_iml_error_log() local
422 data1 = UMAG_SB_CPU_1_STATUS; in iwl_fwrt_dump_iml_error_log()
426 data1 = SB_CPU_1_STATUS; in iwl_fwrt_dump_iml_error_log()
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/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/
A Dgt215.c31 u32 process, u32 message, u32 data0, u32 data1) in gt215_pmu_send() argument
69 nvkm_wr32(device, 0x10a1c4, data1); in gt215_pmu_send()
91 u32 process, message, data0, data1; in gt215_pmu_recv() local
109 data1 = nvkm_rd32(device, 0x10a1c4); in gt215_pmu_recv()
120 pmu->recv.data[1] = data1; in gt215_pmu_recv()
135 process, message, data0, data1); in gt215_pmu_recv()
/drivers/net/wireless/intel/iwlwifi/mld/
A Drx.c23 __le32 data1; member
50 phy_data->data1 = desc->v3.phy_data1; in iwl_mld_fill_phy_data()
463 le16_encode_bits(le32_get_bits(phy_data->data1, in iwl_mld_decode_he_phy_data()
467 le16_encode_bits(le32_get_bits(phy_data->data1, in iwl_mld_decode_he_phy_data()
553 he->data1 |= in iwl_mld_rx_he()
565 he->data1 |= cpu_to_le16(he_type >> RATE_MCS_HE_TYPE_POS); in iwl_mld_rx_he()
712 __le32 data1 = phy_data->data1; in iwl_mld_decode_eht_ext_mu() local
729 (usig, data1, IWL_RX_PHY_DATA1_EHT_MU_NUM_SIG_SYM_USIGA2, in iwl_mld_decode_eht_ext_mu()
940 __le32 data1 = phy_data->data1; in iwl_mld_decode_eht_phy_data() local
1239 le32_get_bits(phy_data->data1, in iwl_mld_rx_fill_status()
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/drivers/hwmon/occ/
A Dp8_i2c.c89 u32 data0, u32 data1) in p8_i2c_occ_putscom_u32() argument
94 memcpy(buf + 4, &data1, 4); in p8_i2c_occ_putscom_u32()
102 __be32 data0 = 0, data1 = 0; in p8_i2c_occ_putscom_be() local
107 memcpy(&data1, data + 4, min_t(size_t, len, 4)); in p8_i2c_occ_putscom_be()
111 be32_to_cpu(data1)); in p8_i2c_occ_putscom_be()
/drivers/net/wireless/mediatek/mt76/
A Dmt76_connac3_mac.c53 he->data1 |= HE_BITS(DATA1_BW_RU_ALLOC_KNOWN); in mt76_connac3_mac_decode_he_radiotap_ru()
109 .data1 = HE_BITS(DATA1_DATA_MCS_KNOWN) | in mt76_connac3_mac_decode_he_radiotap()
143 he->data1 |= HE_BITS(DATA1_FORMAT_SU) | in mt76_connac3_mac_decode_he_radiotap()
152 he->data1 |= HE_BITS(DATA1_FORMAT_EXT_SU) | in mt76_connac3_mac_decode_he_radiotap()
159 he->data1 |= HE_BITS(DATA1_FORMAT_MU) | in mt76_connac3_mac_decode_he_radiotap()
169 he->data1 |= HE_BITS(DATA1_FORMAT_TRIG) | in mt76_connac3_mac_decode_he_radiotap()
/drivers/tee/optee/
A Dffa_abi.c324 .data1 = (u32)global_handle, in optee_ffa_shm_unregister()
540 u32 w4 = data->data1; in optee_ffa_yielding_call()
567 data->data1 = w4; in optee_ffa_yielding_call()
590 data->data1 = 0; in optee_ffa_yielding_call()
623 .data1 = (u32)shm->sec_world_id, in optee_ffa_do_call_with_arg()
677 data.data1 < OPTEE_FFA_VERSION_MINOR) { in optee_ffa_api_is_compatbile()
679 data.data0, data.data1); in optee_ffa_api_is_compatbile()
693 data.data0, data.data1, data.data2); in optee_ffa_api_is_compatbile()
695 pr_info("revision %lu.%lu", data.data0, data.data1); in optee_ffa_api_is_compatbile()
721 *rpc_param_count = (u8)data.data1; in optee_ffa_exchange_caps()
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/drivers/hid/
A Dhid-roccat-kovaplus.c310 roccat_report.data1 = profile + 1; in kovaplus_sysfs_set_actual_profile()
554 kovaplus_profile_activated(kovaplus, button_report->data1 - 1); in kovaplus_keep_values_up_to_date()
557 kovaplus->actual_cpi = kovaplus_convert_event_cpi(button_report->data1); in kovaplus_keep_values_up_to_date()
560 kovaplus->actual_x_sensitivity = button_report->data1; in kovaplus_keep_values_up_to_date()
589 roccat_report.button = button_report->data1; in kovaplus_report_to_chrdev()
594 roccat_report.data1 = kovaplus_convert_event_cpi(button_report->data1); in kovaplus_report_to_chrdev()
596 roccat_report.data1 = button_report->data1; in kovaplus_report_to_chrdev()
/drivers/soc/qcom/
A Dspm.c332 unsigned int vctl, data0, data1, avs_ctl, sts; in smp_set_vdd_v1_1() local
342 data1 = spm_register_read(drv, SPM_REG_PMIC_DATA_1); in smp_set_vdd_v1_1()
357 data1 = FIELD_SET(data1, SPM_PMIC_DATA_1_MIN_VSEL, volt_sel); in smp_set_vdd_v1_1()
358 data1 = FIELD_SET(data1, SPM_PMIC_DATA_1_MAX_VSEL, volt_sel); in smp_set_vdd_v1_1()
362 spm_register_write(drv, SPM_REG_PMIC_DATA_1, data1); in smp_set_vdd_v1_1()
/drivers/scsi/fnic/
A Dfnic.h565 void *data1; member
568 void *data1, void *data2);
576 return iter->fn(iter->fnic, sc, iter->data1, iter->data2); in fnic_io_iter_handler()
582 void *data1, void *data2), in fnic_scsi_io_iter() argument
583 void *data1, void *data2) in fnic_scsi_io_iter()
588 .data1 = data1, in fnic_scsi_io_iter()
/drivers/net/ethernet/apm/xgene/
A Dxgene_enet_sgmac.c334 u32 data, data1, data2, offset; in xgene_sgmac_init() local
390 data1 = xgene_enet_rd_csr(p, pause_thres_reg); in xgene_sgmac_init()
394 data1 = (data1 & 0xffff0000) | DEF_PAUSE_THRES; in xgene_sgmac_init()
397 data1 = (data1 & 0xffff) | (DEF_PAUSE_THRES << 16); in xgene_sgmac_init()
401 xgene_enet_wr_csr(p, pause_thres_reg, data1); in xgene_sgmac_init()

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