| /drivers/staging/media/atomisp/pci/runtime/inputfifo/src/ |
| A D | inputfifo.c | 216 const unsigned short *data2, in inputfifo_send_line2() argument 226 assert((data2) || (width2 == 0)); in inputfifo_send_line2() 268 for (i = 0; i < width2; i++, data2++) { in inputfifo_send_line2() 283 data2[0], 0); in inputfifo_send_line2() 286 data2[0], data2[1]); in inputfifo_send_line2() 289 data2++; in inputfifo_send_line2() 292 inputfifo_send_data_b(data2[0]); in inputfifo_send_line2() 294 inputfifo_send_data_a(data2[0]); in inputfifo_send_line2() 463 const unsigned short *data2, in ia_css_inputfifo_send_line() argument 469 assert((data2) || (width2 == 0)); in ia_css_inputfifo_send_line() [all …]
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| /drivers/gpu/drm/ast/ |
| A D | ast_2300.c | 181 data2 = 3; in cbr_scan() 187 data2 &= data; in cbr_scan() 188 if (!data2) in cbr_scan() 196 return data2; in cbr_scan() 217 data2 = 0xffff; in cbr_scan2() 224 if (!data2) in cbr_scan2() 232 return data2; in cbr_scan2() 802 data2 = ((data2 & 0xff) >> 3) + 3; in ddr3_init() 804 data2 = ((data2 & 0xff) >> 2) + 5; in ddr3_init() 1164 data2 = ((data2 & 0xff) >> 3) + 3; in ddr2_init() [all …]
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| A D | ast_2500.c | 359 u32 data, data2, pass, retrycnt; in ddr4_init_2500() local 410 data2 = data >> 8; in ddr4_init_2500() 412 if (data > data2) in ddr4_init_2500() 413 data = data2; in ddr4_init_2500()
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| /drivers/net/ethernet/broadcom/bnxt/ |
| A D | bnxt_ptp.h | 41 #define EVENT_DATA2_PPS_EVENT_TYPE(data2) \ argument 42 ((data2) & ASYNC_EVENT_CMPL_PPS_TIMESTAMP_EVENT_DATA2_EVENT_TYPE) 44 #define EVENT_DATA2_PPS_PIN_NUM(data2) \ argument 45 (((data2) & \ 62 #define EVENT_PPS_TS(data2, data1) \ argument 63 (((u64)((data2) & BNXT_DATA2_UPPER_MSK) << BNXT_DATA2_UPPER_SFT) |\ 160 void bnxt_ptp_pps_event(struct bnxt *bp, u32 data1, u32 data2);
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| /drivers/gpu/drm/nouveau/nvkm/engine/gr/ |
| A D | ctxgf117.c | 201 u32 data[6] = {}, data2[2] = {}; in gf117_grctx_generate_rop_mapping() local 217 data2[0] = (ntpcv << 16); in gf117_grctx_generate_rop_mapping() 218 data2[0] |= (shift << 21); in gf117_grctx_generate_rop_mapping() 219 data2[0] |= (((1 << (0 + 5)) % ntpcv) << 24); in gf117_grctx_generate_rop_mapping() 221 data2[1] |= ((1 << (i + 5)) % ntpcv) << ((i - 1) * 5); in gf117_grctx_generate_rop_mapping() 231 gr->screen_tile_row_offset | data2[0]); in gf117_grctx_generate_rop_mapping() 232 nvkm_wr32(device, 0x41bfe4, data2[1]); in gf117_grctx_generate_rop_mapping()
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| A D | ctxgf100.c | 1096 u32 data[6] = {}, data2[2] = {}; in gf100_grctx_generate_rop_mapping() local 1112 data2[0] = (ntpcv << 16); in gf100_grctx_generate_rop_mapping() 1113 data2[0] |= (shift << 21); in gf100_grctx_generate_rop_mapping() 1114 data2[0] |= (((1 << (0 + 5)) % ntpcv) << 24); in gf100_grctx_generate_rop_mapping() 1116 data2[1] |= ((1 << (i + 5)) % ntpcv) << ((i - 1) * 5); in gf100_grctx_generate_rop_mapping() 1126 gr->screen_tile_row_offset | data2[0]); in gf100_grctx_generate_rop_mapping() 1127 nvkm_wr32(device, 0x419be4, data2[1]); in gf100_grctx_generate_rop_mapping()
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| /drivers/input/joystick/ |
| A D | turbografx.c | 77 int data1, data2, i; in tgfx_timer() local 86 data2 = parport_read_control(tgfx->pd->port) ^ 0x04; /* CAVEAT parport */ in tgfx_timer() 92 input_report_key(dev, BTN_THUMB, (data2 & TGFX_THUMB )); in tgfx_timer() 93 input_report_key(dev, BTN_THUMB2, (data2 & TGFX_THUMB2 )); in tgfx_timer() 94 input_report_key(dev, BTN_TOP, (data2 & TGFX_TOP )); in tgfx_timer() 95 input_report_key(dev, BTN_TOP2, (data2 & TGFX_TOP2 )); in tgfx_timer()
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| /drivers/media/usb/gspca/ |
| A D | spca508.c | 1352 int data1, data2; in sd_config() local 1359 data2 = reg_read(gspca_dev, 0x8105); in sd_config() 1361 data2, data1); in sd_config() 1364 data2 = reg_read(gspca_dev, 0x8107); in sd_config() 1366 data2, data1); in sd_config()
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| A D | t613.c | 87 const u8 data2[9]; member 147 .data2 = 169 .data2 = 191 .data2 = 211 .data2 = {0x40, 0x80, 0xc0, 0x50, 0xa0, 0xf0, 0x53, 0xa6, 643 reg_w_ixbuf(gspca_dev, 0xc7, sensor->data2, sizeof sensor->data2); in sd_init() 665 reg_w_ixbuf(gspca_dev, 0xc7, sensor->data2, sizeof sensor->data2); in sd_init()
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| /drivers/gpu/drm/amd/amdgpu/ |
| A D | mmhub_v2_3.c | 529 uint32_t def, data, def1, data1, def2, data2; in mmhub_v2_3_update_medium_grain_light_sleep() local 533 def2 = data2 = RREG32_SOC15(MMHUB, 0, mmDAGB0_RD_CGTT_CLK_CTRL); in mmhub_v2_3_update_medium_grain_light_sleep() 542 data2 &= ~(DAGB0_RD_CGTT_CLK_CTRL__LS_OVERRIDE_MASK | in mmhub_v2_3_update_medium_grain_light_sleep() 554 data2 |= (DAGB0_RD_CGTT_CLK_CTRL__LS_OVERRIDE_MASK | in mmhub_v2_3_update_medium_grain_light_sleep() 565 if (def2 != data2) in mmhub_v2_3_update_medium_grain_light_sleep() 566 WREG32_SOC15(MMHUB, 0, mmDAGB0_RD_CGTT_CLK_CTRL, data2); in mmhub_v2_3_update_medium_grain_light_sleep() 585 int data, data1, data2, data3; in mmhub_v2_3_get_clockgating() local 592 data2 = RREG32_SOC15(MMHUB, 0, mmDAGB0_WR_CGTT_CLK_CTRL); in mmhub_v2_3_get_clockgating() 608 && !(data2 & (DAGB0_WR_CGTT_CLK_CTRL__LS_OVERRIDE_MASK | in mmhub_v2_3_get_clockgating()
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| A D | amdgpu_vf_error.c | 54 u32 data1, data2, data3; in amdgpu_vf_error_trans_all() local 79 data2 = adev->virt.vf_errors.data[index] & 0xFFFFFFFF; in amdgpu_vf_error_trans_all() 82 adev->virt.ops->trans_msg(adev, IDH_LOG_VF_ERROR, data1, data2, data3); in amdgpu_vf_error_trans_all()
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| A D | mmhub_v3_0.c | 547 uint32_t def1, data1, def2 = 0, data2 = 0; in mmhub_v3_0_update_medium_grain_clock_gating() 553 def2 = data2 = RREG32_SOC15(MMHUB, 0, regDAGB1_CNTL_MISC2); in mmhub_v3_0_update_medium_grain_clock_gating() 566 data2 &= ~(DAGB1_CNTL_MISC2__DISABLE_WRREQ_CG_MASK | in mmhub_v3_0_update_medium_grain_clock_gating() 583 data2 |= (DAGB1_CNTL_MISC2__DISABLE_WRREQ_CG_MASK | in mmhub_v3_0_update_medium_grain_clock_gating() 598 if (def2 != data2) in mmhub_v3_0_update_medium_grain_clock_gating() 599 WREG32_SOC15(MMHUB, 0, regDAGB1_CNTL_MISC2, data2); in mmhub_v3_0_update_medium_grain_clock_gating()
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| A D | mmhub_v4_1_0.c | 543 uint32_t def1, data1, def2 = 0, data2 = 0; in mmhub_v4_1_0_update_medium_grain_clock_gating() local 548 def2 = data2 = RREG32_SOC15(MMHUB, 0, regDAGB1_CNTL_MISC2); in mmhub_v4_1_0_update_medium_grain_clock_gating() 557 data2 &= ~(DAGB1_CNTL_MISC2__DISABLE_RDRET_TAP_CHAIN_FGCG_MASK | in mmhub_v4_1_0_update_medium_grain_clock_gating() 566 data2 |= (DAGB1_CNTL_MISC2__DISABLE_RDRET_TAP_CHAIN_FGCG_MASK | in mmhub_v4_1_0_update_medium_grain_clock_gating() 577 if (def2 != data2) in mmhub_v4_1_0_update_medium_grain_clock_gating() 578 WREG32_SOC15(MMHUB, 0, regDAGB1_CNTL_MISC2, data2); in mmhub_v4_1_0_update_medium_grain_clock_gating()
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| /drivers/net/wireless/intel/iwlwifi/fw/ |
| A D | dump.c | 39 u32 data2; /* error-specific data */ member 93 u32 data2; /* error-specific data */ member 161 IWL_ERR(fwrt, "0x%08X | umac data2\n", table.data2); in iwl_fwrt_dump_umac_error_log() 241 IWL_ERR(fwrt, "0x%08X | data2\n", table.data2); in iwl_fwrt_dump_lmac_error_log() 283 u32 data1, data2, data3; member 324 IWL_ERR(fwrt, "0x%08X | tcm data2\n", table.data2); in iwl_fwrt_dump_tcm_error_log() 352 u32 data1, data2, data3; member 397 IWL_ERR(fwrt, "0x%08X | rcm data2\n", table.data2); in iwl_fwrt_dump_rcm_error_log()
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| /drivers/video/fbdev/sis/ |
| A D | init.c | 2654 unsigned short data2, data3; in SiS_SetCRT1ModeRegs() local 2726 if(data3) data2 /= data3; in SiS_SetCRT1ModeRegs() 2727 if(data2 >= 0x50) { in SiS_SetCRT1ModeRegs() 2748 data2 = SiS_Pr->CSRClock; in SiS_SetCRT1ModeRegs() 2751 data2 = SiS_Pr->SiS_VCLKData[data2].CLOCK; in SiS_SetCRT1ModeRegs() 2755 if(data3) data2 *= data3; in SiS_SetCRT1ModeRegs() 2757 data2 = ((unsigned int)(SiS_GetMCLK(SiS_Pr) * 1024)) / data2; in SiS_SetCRT1ModeRegs() 2910 data2 = 0; in SiS_LoadDAC() 2911 if(data & 0x01) data2 += 0x2A; in SiS_LoadDAC() 2912 if(data & 0x02) data2 += 0x15; in SiS_LoadDAC() [all …]
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| /drivers/scsi/fnic/ |
| A D | fnic.h | 566 void *data2; member 568 void *data1, void *data2); 576 return iter->fn(iter->fnic, sc, iter->data1, iter->data2); in fnic_io_iter_handler() 582 void *data1, void *data2), in fnic_scsi_io_iter() argument 583 void *data1, void *data2) in fnic_scsi_io_iter() 589 .data2 = data2, in fnic_scsi_io_iter()
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| /drivers/pci/controller/dwc/ |
| A D | pci-imx6.c | 144 u32 data2; member 1018 u32 data1, data2; in imx_pcie_add_lut() local 1048 if (rid == FIELD_GET(IMX95_PE0_LUT_REQID, data2)) { in imx_pcie_add_lut() 1067 data2 = IMX95_PE0_LUT_MASK; /* Match all bits of RID */ in imx_pcie_add_lut() 1068 data2 |= FIELD_PREP(IMX95_PE0_LUT_REQID, rid); in imx_pcie_add_lut() 1078 u32 data2; in imx_pcie_remove_lut() local 1087 if (FIELD_GET(IMX95_PE0_LUT_REQID, data2) == rid) { in imx_pcie_remove_lut() 1502 u32 data1, data2; in imx_pcie_lut_save() local 1512 imx_pcie->luts[i].data2 = data2; in imx_pcie_lut_save() 1515 imx_pcie->luts[i].data2 = 0; in imx_pcie_lut_save() [all …]
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| /drivers/net/ethernet/apm/xgene/ |
| A D | xgene_enet_sgmac.c | 334 u32 data, data1, data2, offset; in xgene_sgmac_init() local 391 data2 = xgene_enet_rd_csr(p, pause_off_thres_reg); in xgene_sgmac_init() 395 data2 = (data2 & 0xffff0000) | DEF_PAUSE_OFF_THRES; in xgene_sgmac_init() 398 data2 = (data2 & 0xffff) | (DEF_PAUSE_OFF_THRES << 16); in xgene_sgmac_init() 402 xgene_enet_wr_csr(p, pause_off_thres_reg, data2); in xgene_sgmac_init()
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| /drivers/hid/ |
| A D | hid-roccat-isku.h | 70 uint8_t data2; member 84 uint8_t data2; member
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| A D | hid-roccat-koneplus.h | 73 uint8_t data2; member 109 uint8_t data2; member
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| A D | hid-roccat-kovaplus.h | 81 uint8_t data2; member 115 uint8_t data2; member
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| /drivers/char/tpm/ |
| A D | tpm_crb_ffa.c | 221 .data2 = a0, in __tpm_crb_ffa_try_send_receive() 297 *major = CRB_FFA_MAJOR_VERSION(tpm_crb_ffa->direct_msg_data.data2); in tpm_crb_ffa_get_interface_version() 298 *minor = CRB_FFA_MINOR_VERSION(tpm_crb_ffa->direct_msg_data.data2); in tpm_crb_ffa_get_interface_version()
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| /drivers/tee/optee/ |
| A D | ffa_abi.c | 325 .data2 = (u32)(global_handle >> 32) in optee_ffa_shm_unregister() 541 u32 w5 = data->data2; in optee_ffa_yielding_call() 568 data->data2 = w5; in optee_ffa_yielding_call() 591 data->data2 = 0; in optee_ffa_yielding_call() 624 .data2 = (u32)(shm->sec_world_id >> 32), in optee_ffa_do_call_with_arg() 691 if (data.data2) in optee_ffa_api_is_compatbile() 693 data.data0, data.data1, data.data2); in optee_ffa_api_is_compatbile() 722 *sec_caps = data.data2; in optee_ffa_exchange_caps()
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| /drivers/net/wireless/virtual/ |
| A D | mac80211_hwsim.c | 1830 if (data == data2) in mac80211_hwsim_tx_frame_no_nl() 1833 if (!data2->started || (data2->idle && !data2->tmp_chan) || in mac80211_hwsim_tx_frame_no_nl() 5802 if (!data2) in hwsim_tx_info_frame_received_nl() 5807 data2->netgroup) in hwsim_tx_info_frame_received_nl() 5907 if (!data2) in hwsim_cloned_frame_received_nl() 5910 if (data2->use_chanctx) { in hwsim_cloned_frame_received_nl() 5911 if (data2->tmp_chan) in hwsim_cloned_frame_received_nl() 5914 channel = data2->channel; in hwsim_cloned_frame_received_nl() 5919 data2->netgroup) in hwsim_cloned_frame_received_nl() 5928 if ((data2->idle && !data2->tmp_chan) || !data2->started) in hwsim_cloned_frame_received_nl() [all …]
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| /drivers/net/wireless/intel/iwlwifi/mld/ |
| A D | rx.c | 24 __le32 data2; member 51 phy_data->data2 = desc->v3.phy_data2; in iwl_mld_fill_phy_data() 269 he->data2 |= le16_encode_bits(offs, in iwl_mld_decode_he_phy_ru_alloc() 274 he->data2 |= in iwl_mld_decode_he_phy_ru_alloc() 304 u32 phy_data2 = le32_to_cpu(phy_data->data2); in iwl_mld_decode_he_mu_ext() 375 he->data4 |= le16_encode_bits(le32_get_bits(phy_data->data2, in iwl_mld_decode_he_phy_data() 378 he->data4 |= le16_encode_bits(le32_get_bits(phy_data->data2, in iwl_mld_decode_he_phy_data() 381 he->data4 |= le16_encode_bits(le32_get_bits(phy_data->data2, in iwl_mld_decode_he_phy_data() 384 he->data4 |= le16_encode_bits(le32_get_bits(phy_data->data2, in iwl_mld_decode_he_phy_data() 502 .data2 = cpu_to_le16(IEEE80211_RADIOTAP_HE_DATA2_GI_KNOWN | in iwl_mld_rx_he() [all …]
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